Re: [edk2-devel] [PATCH for-next] MdeModulePkg/PciBusDxe: catch unimplemented extended config space reads

["Ard Biesheuvel" <ard.biesheuvel@linaro.org>]

On Tue, 4 Jun 2019 at 23:44, Laszlo Ersek <lersek@redhat.com> wrote:
>
> When assigning a physical PCIe device to a QEMU/KVM guest, PciBusDxe may
> find that the extended config space is not (fully) implemented. In
> LocatePciExpressCapabilityRegBlock(), "CapabilityEntry" may be read as
> 0xFFFF_FFFF at a given config space offset, after which the loop gets
> stuck spinning on offset 0xFFC (the read at offset 0xFFC returns
> 0xFFFF_FFFF most likely as well).
>
> Another scenario (not related to virtualization) for triggering the above
> is when a Conventional PCI bus -- exposed by a PCIe-to-PCI bridge in the
> topology -- intervenes between a PCI Express Root Port and a PCI Express
> Endpoint. The Conventional PCI bus limits the accessible config space of
> the PCI Express Endpoint, even though the endpoint advertizes the PCI
> Express capability. Here's a diagram, courtesy of Alex Williamson:
>
>   [PCIe Root Port]--[PCIe-to-PCI]--[PCI-to-PCIe]--[PCIe EP]
>                               ->|  |<- Conventional PCI bus
>
> Catch reads of 0xFFFF_FFFF in LocatePciExpressCapabilityRegBlock(), and
> break out of the scan with a warning message. The function will return
> EFI_NOT_FOUND.
>
> Cc: Alex Williamson <alex.williamson@redhat.com>
> Cc: Hao A Wu <hao.a.wu@intel.com>
> Cc: Jian J Wang <jian.j.wang@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Star Zeng <star.zeng@intel.com>
> Signed-off-by: Laszlo Ersek <lersek@redhat.com>
> ---
>
> Notes:
>     Repo:   https://github.com/lersek/edk2.git
>     Branch: pcibus_no_ext_conf
>
>  MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
>
> diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
> index 214aeecdd40a..6283d602207c 100644
> --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
> +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
> @@ -236,6 +236,19 @@ LocatePciExpressCapabilityRegBlock (
>        break;
>      }
>
> +    if (CapabilityEntry == MAX_UINT32) {

Should we check here that the offset > 0x100 ? Otherwise, this affects
more than just the extended config space.

> +      DEBUG ((
> +        DEBUG_WARN,
> +        "%a: [%02x|%02x|%02x] failed to access config space at offset 0x%x\n",
> +        __FUNCTION__,
> +        PciIoDevice->BusNumber,
> +        PciIoDevice->DeviceNumber,
> +        PciIoDevice->FunctionNumber,
> +        CapabilityPtr
> +        ));
> +      break;
> +    }
> +
>      CapabilityID = (UINT16) CapabilityEntry;
>
>      if (CapabilityID == CapId) {
> --
> 2.19.1.3.g30247aa5d201
>
>
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