From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=C3S7mAKS; spf=pass (domain: linaro.org, ip: 209.85.166.195, mailfrom: ard.biesheuvel@linaro.org) Received: from mail-it1-f195.google.com (mail-it1-f195.google.com [209.85.166.195]) by groups.io with SMTP; Wed, 05 Jun 2019 02:25:42 -0700 Received: by mail-it1-f195.google.com with SMTP id m187so2436740ite.3 for ; Wed, 05 Jun 2019 02:25:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=p5yeX5We41szERIu8tWiMpEzny4YiYvgXucmHMiuySQ=; b=C3S7mAKS5om5a9ghlh3tJ6r0x5peNNI97s88Fk64ghp113W4TXwxEroXnpxybCId3O AEb0t8U3DP6fWrh+zWTiukhNwARM/XOIES/2F4Lgc1I5nWHR3ii6rXrpwsUL5IuqIcez 1/mADbKC5vF2wPK+Artntu0wcH127QurWrmDwgU71/4VlKx0lmTamJH5zNk9ekR9nD80 JOCnOX4EnygauChKl8UOxB+/a5sT+pNl0zd6RiZsc5Ym50rURGmbBRazVBEog6SzTt1f 0T5wsjHhr1RcAbTozbxNZKMoFzddfsCBiu1cJefvlgx+cvtzMXgIU0f6e8pibS35Kwjw n4vQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=p5yeX5We41szERIu8tWiMpEzny4YiYvgXucmHMiuySQ=; b=qCzzUdwU1kno3RxgY1OriPlIB/SLJ9XmIUpOQzJDWNUM0rzUUc13d02lo1ULT++I7s UlY6acUfRD+vHGedjT6qdS7cewQznEOK+Q3HAHhjdE/3tw+rvu22YQO0IRnv9wSdMtzw P8JaEpK3u0JfBekHEC71cepQRcIwp2yQA5wSM1VRpeev+H2nVl+0jbvGeJX0wbrps0dk /C0U5vilWPE9itDvcA9Bwqb2+bu+WqIBzeZOEN+NiH0v+wuSXtS4kFEQfOwM5bCAJXy9 qClsrer1RGJylxABTIHEGyUNaNqEqRFRcq6SAOAkgtPzGVxx0Ulsrx3jNGi8BYiZKchd Xd3A== X-Gm-Message-State: APjAAAVNiTPDQjtSKbfj0W0XqHaC5cv/TYaDDD7D3dspftR9Kc/dLbIs /Og+jI7CjQD6NKkXB4SdJ2xng97NZGGedhOL7zUCTRFohFM= X-Google-Smtp-Source: APXvYqw/XXWEN256bDzgxbY+Vxjv0ege8dJYWjRUkdbqY8zjDrwVikCh2C7kma9UvNm8MCwQ4UVm4s83MjIe7mLiEOc= X-Received: by 2002:a05:660c:44a:: with SMTP id d10mr4940383itl.153.1559726741227; Wed, 05 Jun 2019 02:25:41 -0700 (PDT) MIME-Version: 1.0 References: <20190604214424.456-1-lersek@redhat.com> In-Reply-To: <20190604214424.456-1-lersek@redhat.com> From: "Ard Biesheuvel" Date: Wed, 5 Jun 2019 11:25:28 +0200 Message-ID: Subject: Re: [edk2-devel] [PATCH for-next] MdeModulePkg/PciBusDxe: catch unimplemented extended config space reads To: edk2-devel-groups-io , Laszlo Ersek Cc: Alex Williamson , Hao A Wu , Jian J Wang , Ray Ni , Star Zeng Content-Type: text/plain; charset="UTF-8" On Tue, 4 Jun 2019 at 23:44, Laszlo Ersek wrote: > > When assigning a physical PCIe device to a QEMU/KVM guest, PciBusDxe may > find that the extended config space is not (fully) implemented. In > LocatePciExpressCapabilityRegBlock(), "CapabilityEntry" may be read as > 0xFFFF_FFFF at a given config space offset, after which the loop gets > stuck spinning on offset 0xFFC (the read at offset 0xFFC returns > 0xFFFF_FFFF most likely as well). > > Another scenario (not related to virtualization) for triggering the above > is when a Conventional PCI bus -- exposed by a PCIe-to-PCI bridge in the > topology -- intervenes between a PCI Express Root Port and a PCI Express > Endpoint. The Conventional PCI bus limits the accessible config space of > the PCI Express Endpoint, even though the endpoint advertizes the PCI > Express capability. Here's a diagram, courtesy of Alex Williamson: > > [PCIe Root Port]--[PCIe-to-PCI]--[PCI-to-PCIe]--[PCIe EP] > ->| |<- Conventional PCI bus > > Catch reads of 0xFFFF_FFFF in LocatePciExpressCapabilityRegBlock(), and > break out of the scan with a warning message. The function will return > EFI_NOT_FOUND. > > Cc: Alex Williamson > Cc: Hao A Wu > Cc: Jian J Wang > Cc: Ray Ni > Cc: Star Zeng > Signed-off-by: Laszlo Ersek > --- > > Notes: > Repo: https://github.com/lersek/edk2.git > Branch: pcibus_no_ext_conf > > MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c > index 214aeecdd40a..6283d602207c 100644 > --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c > @@ -236,6 +236,19 @@ LocatePciExpressCapabilityRegBlock ( > break; > } > > + if (CapabilityEntry == MAX_UINT32) { Should we check here that the offset > 0x100 ? Otherwise, this affects more than just the extended config space. > + DEBUG (( > + DEBUG_WARN, > + "%a: [%02x|%02x|%02x] failed to access config space at offset 0x%x\n", > + __FUNCTION__, > + PciIoDevice->BusNumber, > + PciIoDevice->DeviceNumber, > + PciIoDevice->FunctionNumber, > + CapabilityPtr > + )); > + break; > + } > + > CapabilityID = (UINT16) CapabilityEntry; > > if (CapabilityID == CapId) { > -- > 2.19.1.3.g30247aa5d201 > > > ------------ > Groups.io Links: You receive all messages sent to this group. > > View/Reply Online (#41893): https://edk2.groups.io/g/devel/message/41893 > Mute This Topic: https://groups.io/mt/31931246/1761188 > Group Owner: devel+owner@edk2.groups.io > Unsubscribe: https://edk2.groups.io/g/devel/unsub [ard.biesheuvel@linaro.org] > ------------ >