From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c0b::22e; helo=mail-it0-x22e.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-it0-x22e.google.com (mail-it0-x22e.google.com [IPv6:2607:f8b0:4001:c0b::22e]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id F1D55207E36AD for ; Sun, 13 May 2018 03:16:49 -0700 (PDT) Received: by mail-it0-x22e.google.com with SMTP id c3-v6so7289155itj.4 for ; Sun, 13 May 2018 03:16:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=g3ZLsJjHKLAKEpKkSDPXXw0mE3Ua8LHCoaDlDj+0OMo=; b=KO/ijh7TKXAd3mv/u9OPcm0bD3FZi82McJFHQ6nWqcoOm7hxfwMrTMYRZTdRxKJ6ZZ 8CVsqTNsD0UFGWXbJARqSYQN+jY11DBC641jYn+m5/AzfvPoGETQ7ELewIlm5+J8R/uL A7fHZ7m0VoCnFfW25JXev9khrzhh0sANfBZ4c= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=g3ZLsJjHKLAKEpKkSDPXXw0mE3Ua8LHCoaDlDj+0OMo=; b=kkvSDKs/Tr1/g/jZj8fEaKqIfOgXaYS/fn5rLluXahkAqLZCiGa/tBd6XPpt63xPgA WJD20pcba5lZO4glCC6EUqemmnEQOKMFw/KEIEJlI0jCz8PT/BauNv9G2BSCBw5ARLZn waKAJUjZ/s6XxKZm/WlO5a2Dj/0X7oIZx1hWHC1bPK/uqzL9Tgi7W1GP7uLi1LgfvnKB T3+t+CESkLme36MRzfp82be8Tm/JCVdVVlx083XqITk00+1HeIouKLkO2phyvgTCkfBh mnopT1WjBwn2+DVmxqnu6PZworGsUOKchgvFidq+rzOy1vo+ovv7aRFHT6OCNfO/BTLI kqIA== X-Gm-Message-State: ALKqPwcaLuWC9IFhyuz3YkOKiOwQSydExbaRC7oz9pP/XZbKdZYGX0ym kv+U0jGDjL+7FM+EV17vdhKLhDAExfEa7lFDSa8e2LaLPT0= X-Google-Smtp-Source: AB8JxZrTPzzvG5eMbJjffL1AB+HtF/SdDB8au2xEi+RsGXqWsxKn3EOYb8tYgYS1Ci7IT6yTYEx/6YRfVNGhm4GPrQQ= X-Received: by 2002:a24:af45:: with SMTP id l5-v6mr5199957iti.106.1526206608691; Sun, 13 May 2018 03:16:48 -0700 (PDT) MIME-Version: 1.0 Received: by 10.107.187.134 with HTTP; Sun, 13 May 2018 03:16:47 -0700 (PDT) In-Reply-To: References: From: Ard Biesheuvel Date: Sun, 13 May 2018 12:16:47 +0200 Message-ID: To: Michael Zimmermann Cc: "edk2-devel@lists.01.org" , Leif Lindholm Subject: Re: reasoning beehind prohibiting VFP/NEON on AArch32 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 13 May 2018 10:16:50 -0000 Content-Type: text/plain; charset="UTF-8" On 13 May 2018 at 11:48, Michael Zimmermann wrote: > So basically using them should be safe as long as you're in > EfiGetCurrentTpl() < TPL_HIGH_LEVEL, right? No, the other way around. You should raise the TPL to TPL_HIGH_LEVEL to prevent being interrupted by something that may corrupt the NEON registers. > Also, it'd probably be trivial to add VFP/NEON regs to > EFI_SYSTEM_CONTEXT_ARM though that wouldn't help when writing apps for > existing uefi platforms. EFI_SYSTEM_CONTEXT_ARM is covered by the UEFI spec, so that is not going to change. > On Sun, May 13, 2018 at 9:32 AM Ard Biesheuvel > wrote: > >> On 12 May 2018 at 23:11, Michael Zimmermann > wrote: >> > For AArch32 the spec says in 2.3.5.3: >> >> Floating point, SIMD, vector operations and other instruction set >> > extensions must not >> > be used. >> > >> > For AArch64 the spec says in 2.3.6.4: >> >> Floating point and SIMD instructions may be used. >> > >> > So is there a reason why AArch32 is not allowed to use Floating point >> > operations? >> > I'd understand if this restriction was limited to runtime services only > but >> > I don't see how it makes sense for boot services. >> > >> > I've written a patch which adds NEON support to FrameBufferBltLib to >> > increase the rendering performance(by a lot actually) for 24bit displays >> > and thought about sending it to the mailing list - that's why the > question >> > came up. >> > > >> The reason for the difference between AArch64 and the other EFI >> architectures is that AArch64 does not have a softfloat ABI, so it is >> impossible to compile floating point code [portably] without enabling >> VFP/NEON. This is why AArch64 is the exception here. > >> Currently, the AArch32 CPU context structure [EFI_SYSTEM_CONTEXT_ARM] >> does not cover VFP/NEON registers, and so they are not >> preserved/restored when an interrupt is taken. This means you cannot >> use VFP/NEON registers in an event handler or you will corrupt the >> VFP/NEON state of the interrupted context.