From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c06::242; helo=mail-io0-x242.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-io0-x242.google.com (mail-io0-x242.google.com [IPv6:2607:f8b0:4001:c06::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7509B223C1775 for ; Wed, 21 Feb 2018 04:04:11 -0800 (PST) Received: by mail-io0-x242.google.com with SMTP id g21so1906356ioj.5 for ; Wed, 21 Feb 2018 04:10:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=wQ8t2NYNQM4Yd5AHthsMKUait3xxS74vYvmFaoBHj3A=; b=MFWgsWO9kXzWa7Ul8TaOtFyleg6tM1rmxPA9Nbhdpx3Q/OR5M87FA+4EQ5GN+GvHbg XgWN1rne2d4DitaK6LxHZc/n3RK3eUV0I1JC0RC3UOvQTu8enJX3cKgpKxMs5uf7Owpb oAFHBaCeoM0U6TEIYoPDrq8oeUCXEGud4p5rk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=wQ8t2NYNQM4Yd5AHthsMKUait3xxS74vYvmFaoBHj3A=; b=ZUsDjzrx9XxgQZHuKX5YSno26DaPdnlVdtHhdv8t5gNS5l2FjGUd+8QxyGpwYmgMpu 8Ls2j8gk3vlITKYQOv32Y57Emtkxo8vACcpMNZFGhMQ7BUuq6YocJ4vcxE7WUSpGC/pY q7v8ZhOwwiFrlpgBjHxh12xcaQqxsPATzXU4Cq3BpRGjTU7oiAxVTk96Djsn6waxuhh0 G23eKJtQjFJ2eEDOFdXs5rZS9C+Lido3Fwhw1vAAG6ri54RIhrmYozyDReTWaOYbXbZE wisQGnLOxGnq95i/B4nlx3iSZ1EXPjrnpq6qXBb+OXQSWSradgBL1YBlZx3lhN+oibZ+ 74IQ== X-Gm-Message-State: APf1xPCTqHMO31WSovZPT54t1RAyGPKoc7aLxZ/oGuxj2UGuzlIU+rYE HSCfbzsdlH58CBMwy5H8wAavaX1u5nEXP+FigbvxjT2I X-Google-Smtp-Source: AG47ELujWQRnzc5tR0MzDl+mM6xX0x/ZbPLWVF4WNZ5mkgXYlCUZ5fQaogW0AHSVJwTpswbp+EqBOl/3T6EqD/INjgU= X-Received: by 10.107.41.16 with SMTP id p16mr3819969iop.173.1519215009981; Wed, 21 Feb 2018 04:10:09 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.138.209 with HTTP; Wed, 21 Feb 2018 04:10:09 -0800 (PST) In-Reply-To: <20180215172054.27452-1-ard.biesheuvel@linaro.org> References: <20180215172054.27452-1-ard.biesheuvel@linaro.org> From: Ard Biesheuvel Date: Wed, 21 Feb 2018 12:10:09 +0000 Message-ID: To: "edk2-devel@lists.01.org" Cc: Leif Lindholm , Joakim Bech , Ard Biesheuvel Subject: Re: [PATCH edk2-platforms 0/5] Add Secure96 mezzanine support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 Feb 2018 12:04:11 -0000 Content-Type: text/plain; charset="UTF-8" On 15 February 2018 at 17:20, Ard Biesheuvel wrote: > This series adds preliminary support for the Secure96 mezzanine board, > an expansion board that can be plugged into the low speed connector on > the Socionext SynQuacer based Developer Box platform. > > I have attempted to implement this in a reusable way, i.e., the secure96 > specific parts are in separate drivers which could theoretically be > imported by other platforms as well. > > I am presenting this to discuss the approach. My end goal is to wire up > the Atmel SHA204A on this board in UEFI so it can be used as a random > number generator, but this should be mostly orthogonal (and if it isn't, > we can add it on top). > > Ard Biesheuvel (5): > Silicon/SynQuaver/DeviceTree: add node for SPI controller > Silicon/SynQuaver/DeviceTree: add node for I2C controller I have pushed these two (with the title corrected) > Platform: add support for 96boards Secure96 mezzanine adapter > Silicon/SynQuacer/PlatformDxe: add menu option to select mezzanine > Platform/Socionext/DeveloperBox: add Secure96 support > > Platform/96boards/Secure96/DeviceTree/DeviceTree.inf | 40 +++++ > Platform/96boards/Secure96/DeviceTree/Secure96.dts | 74 ++++++++++ > Platform/96boards/Secure96/Secure96.dec | 56 +++++++ > Platform/96boards/Secure96/Secure96Dxe/Secure96Dxe.c | 153 ++++++++++++++++++++ > Platform/96boards/Secure96/Secure96Dxe/Secure96Dxe.inf | 51 +++++++ > Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 21 +++ > Platform/Socionext/DeveloperBox/DeveloperBox.fdf | 6 + > Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 36 +++++ > Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c | 8 + > Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | 2 + > Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.uni | 6 + > Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.vfr | 8 + > Silicon/Socionext/SynQuacer/Include/Platform/VarStore.h | 6 +- > 13 files changed, 466 insertions(+), 1 deletion(-) > create mode 100644 Platform/96boards/Secure96/DeviceTree/DeviceTree.inf > create mode 100644 Platform/96boards/Secure96/DeviceTree/Secure96.dts > create mode 100644 Platform/96boards/Secure96/Secure96.dec > create mode 100644 Platform/96boards/Secure96/Secure96Dxe/Secure96Dxe.c > create mode 100644 Platform/96boards/Secure96/Secure96Dxe/Secure96Dxe.inf > > -- > 2.11.0 >