From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c0b::244; helo=mail-it0-x244.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-it0-x244.google.com (mail-it0-x244.google.com [IPv6:2607:f8b0:4001:c0b::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id B4EFE2237A4CC for ; Sat, 3 Feb 2018 07:07:47 -0800 (PST) Received: by mail-it0-x244.google.com with SMTP id h129so11224295ita.2 for ; Sat, 03 Feb 2018 07:13:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=Nla1M4zJPIYn9Q4fKGKXkBYxe82Rqer/2vHOkzOrj7c=; b=AGjiJOSDRFnnVJHPUmqUoc2rCS6kd5HBTpjTU6fWh9/+xvzB17MTMLu/BJePb+OR/0 mn1cB1iXCorUY/E73am6kwsqPH821Nwnd9wpE8uBGdhrKHq09E09pyHEqpLat1ABLKDi l9fIiodCkJfk45Jxu4Qd4HFJbw44a6ZvxXVqw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=Nla1M4zJPIYn9Q4fKGKXkBYxe82Rqer/2vHOkzOrj7c=; b=XWuM5oV0wzNoUpnTLFENt0yacTc8N8P3g7S+OI9+XRogY7TWh6mdKy/DPLB/S/R7lz wZSEMg/jfoSoAm9iiF9Zfb3GF2uenmdxLOSTQik/I28YEMVTuzpRgnsOmxVTYT02eH+j 0EBrEQf3tbNPpn7gn7a+BLeCwqSBtKloga7lzcbb0Qbu1WfhLxmBBUQl2xwvqKhecDYH BQr/hkBs6GT/K+O/cSBHByUL3+3hnambg7GoUf/1GCQUVR+CiljGVKFw10GQXJLqSsPe MkFKgyuLm7fmrXB6M9jeZQ+hX3wZTf3bP6A0BB4obhCgJ+yPLq+EjEk+qB+MboMV+wFz +BEg== X-Gm-Message-State: AKwxytcGLvvcYo4w4KXYmE940FUHOOf77wOM074EBN/MAQBQOdSQDRoZ rmTV+aIFrZw38mVB4ihP700PmeLmA8/xsjLqK0YtoQ== X-Google-Smtp-Source: AH8x226CsZ6zwXBrabiAUnn4JUdyluZgtsycR0tIM7u+RCSoemXcJlbTO+ozaM3thLCcVopb2PVR5Na//QGViTQ0MzY= X-Received: by 10.36.108.208 with SMTP id w199mr21408219itb.102.1517670806295; Sat, 03 Feb 2018 07:13:26 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.112.13 with HTTP; Sat, 3 Feb 2018 07:13:25 -0800 (PST) In-Reply-To: <20180203134447.087c12a1@why.wild-wind.fr.eu.org> References: <20180201160435.3010-1-ard.biesheuvel@linaro.org> <20180201160435.3010-3-ard.biesheuvel@linaro.org> <20180203134447.087c12a1@why.wild-wind.fr.eu.org> From: Ard Biesheuvel Date: Sat, 3 Feb 2018 16:13:25 +0100 Message-ID: To: Marc Zyngier Cc: "edk2-devel@lists.01.org" , Leif Lindholm , Alan Ott Subject: Re: [PATCH edk2-non-osi 2/2] Silicon/AMD/Styx: update ArmTrustedFirmware.bin X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 03 Feb 2018 15:07:49 -0000 Content-Type: text/plain; charset="UTF-8" On 3 February 2018 at 14:44, Marc Zyngier wrote: > On Thu, 1 Feb 2018 16:42:53 +0000 > Ard Biesheuvel wrote: > >> On 1 February 2018 at 16:04, Ard Biesheuvel wrote: >> > The ARM Trusted Firmware build we have been using up until now was built >> > with optimizations disabled (which means every variable manipulation >> > involves a load, the operation itself and a store), and runs with the >> > MMU disabled, making it needlessly slow. >> > >> > This appears to be due to the fact that >> > a) the page tables are not set up correctly, so not all memory can be >> > accessed from EL3 >> > b) the handling of SMC service calls does not take into account that >> > these calls may be made with the MMU off (e.g., by UEFI PEI). >> > >> > These issues have been fixed in the source code, which should hopefully >> > remove any performance bottlenecks that may become more noticeable now >> > that we are going to call into the secure firmware more often to perform >> > Spectre variant 2 mitigations, which have been backported as well. >> > >> > So update the binary image to a RELEASE build that was created with >> > optimizations enabled, and has the above fixes incorporated. >> > >> > Contributed-under: TianoCore Contribution Agreement 1.1 >> > Signed-off-by: Ard Biesheuvel >> > --- >> > Silicon/AMD/Styx/ArmTrustedFirmware.bin | Bin 75344 -> 34320 bytes >> > 1 file changed, 0 insertions(+), 0 deletions(-) >> > >> >> Note to Marc: this is the exact image I shared with you as >> bl31.bin-release earlier today, so if that works as expected, could >> you report back here please? Thanks. > > To confirm, this firmware boots perfectly on Cello, and the new SMCCC > 1.1 is now reported by the kernel (with in-flight patches): > > [ 0.000000] psci: probing for conduit method from DT. > [ 0.000000] psci: PSCIv1.0 detected in firmware. > [ 0.000000] psci: Using standard PSCI v0.2 function IDs > [ 0.000000] psci: MIGRATE_INFO_TYPE not supported. > [ 0.000000] psci: SMC Calling Convention v1.1 > > as well as ARM_SMCCC_ARCH_WORKAROUND_1, allowing for efficient > mitigation of Spectre v2. I guess we have quite a few Seattle/Overdrive > and OD1000 that now need this to be deployed. > > Thanks a lot Ard! > Liekwise. Let me know if you need help upgrading those Overdrive systems.