From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c0b::241; helo=mail-it0-x241.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-it0-x241.google.com (mail-it0-x241.google.com [IPv6:2607:f8b0:4001:c0b::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5046C2194D387 for ; Thu, 6 Sep 2018 07:12:42 -0700 (PDT) Received: by mail-it0-x241.google.com with SMTP id 139-v6so14327668itf.0 for ; Thu, 06 Sep 2018 07:12:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=pyTugVRgalJTRwtifUamdg2CRDWjc2g2mJxmQjPf4Q8=; b=AE3ek+6UrWNDrXdLP3UFmvhrxEPmne8YYfdcbrqiLMXlP9Bd3kMKEFJwgvrTRqIP/w 6ARTNQxiscHGDE5rb8mHAwWvUTepNIW/WkIj+uMNQ7aLUPg9yiN8+gGZclwltRqia9dD aDxevCKnl8hxje17J1SElDk5N7evK+QjF7sX0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=pyTugVRgalJTRwtifUamdg2CRDWjc2g2mJxmQjPf4Q8=; b=OHIZh6rdFvf1FC34dGRenms8XYcs4J79sVXdsbSdZTXcWEV/F5DTOV5wXI4pllAlmt Hmz8xnq/u9S8/AxH0+x/zNDQTrEwz2ujY83qOzp2cl+/krpHiT6twCODdUB9dY9rSKv6 y4DxKlX7PrjGYILGsfLloBLMcM0JJI6HaEs8LX6pxq/f++sG8+krm/lixTOvun3IirFJ kI4RmQ4ZpdHvSkEFLvbdpN6p3pzaG4uVGy8fxrSt33FXf2gjbr6Wqybqq5LeXTs/RM0O hU47apKKE50oHcQQVYlfhGnD+XE6DgESxZm5iniMIh8sgkfNBpc8ay5XKhazCOa2eSkl k4pA== X-Gm-Message-State: APzg51ADGn1OHgrDZ05VArmV3Hg8QG9PineZPy7CeI+4WMGO2Uqec2SV MP4QYHgxKWQf31LBvlVdIv6IZbt+3SZZ6UaaBIGZcA== X-Google-Smtp-Source: ANB0VdZ4XLVJaqQTu08rJnkGjWeQ5o0PMJ8LJVuuIgCfGgwMKc9mkkHAjfj8YnHhPQdqd2y7Wlf1uRi4rv5agsxGbVA= X-Received: by 2002:a24:8309:: with SMTP id d9-v6mr2673618ite.123.1536243161566; Thu, 06 Sep 2018 07:12:41 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a6b:1c06:0:0:0:0:0 with HTTP; Thu, 6 Sep 2018 07:12:41 -0700 (PDT) In-Reply-To: <1535950453-27147-1-git-send-email-mw@semihalf.com> References: <1535950453-27147-1-git-send-email-mw@semihalf.com> From: Ard Biesheuvel Date: Thu, 6 Sep 2018 16:12:41 +0200 Message-ID: To: Marcin Wojtas Cc: "edk2-devel@lists.01.org" , "Tian, Feng" , "Kinney, Michael D" , "Gao, Liming" , Leif Lindholm , Nadav Haklai , =?UTF-8?B?SmFuIETEhWJyb8Wb?= Subject: Re: [PATCH 0/7] SdMmc fixes and SdMmcOverride extension X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 06 Sep 2018 14:12:42 -0000 Content-Type: text/plain; charset="UTF-8" On 3 September 2018 at 06:54, Marcin Wojtas wrote: > Hi, > > This patchset extends SdMmcOverride protocol with new callbacks: > * UhsSignaling - allow writing custom values to HostControl2 register > * SwitchClockFreqPost - perform additional opperations after clock switch > * BaseClockFreq - allow overriding base clock frequency > Also a couple of fixes for MMC, card detection and reset are submitted. > More details can be found in the commit messages. > > Patches are available in the github: > https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/sdmmc-override-upstream-r20180902 > > Please note that extending SdMmcOverride protocol was impacting > so far the only user of it (Synquacer controller). In paralel > edk2-platforms patchset, a patch can be found: > ("Silicon/SynQuacer/PlatformDxe: Modify initialization of SdMmcOverride") > which immunizes for above and future extensions of the protocol: > https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/xenon-upstream-r20180902 > > I'm looking forward to the comments and remarks. > Could we split this into a series of fixes/compliance tweaks, and a set of changes to the SD/MMC override protocol hooks that need to be added to accommodate Xenon? I suppose the former can be merged without much hassle, but the latter may provoke some fierce discussion, I'm afraid. > Marcin Wojtas (3): > MdeModulePkg/SdMmcPciHcDxe: Fix HS200 operation > MdeModulePkg/SdMmcPciHcDxe: Adjust eMMC clock and bus width sequence > MdeModulePkg/SdMmcPciHcDxe: Execute card detect only for RemovableSlot > > Tomasz Michalec (4): > MdeModulePkg/SdMmcPciHcDxe: Add UhsSignaling to SdMmcOverride protocol > MdeModulePkg/SdMmcPciHcDxe: Add SwitchClockFreqPost to SdMmcOverride > MdeModulePkg/SdMmcPciHcDxe: Allow overriding base clock frequency > MdeModulePkg/SdMmcPciHcDxe: Fix SdMmcHcReset to set only necesery bits > > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h | 6 + > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h | 67 +++++- > MdeModulePkg/Include/Protocol/SdMmcOverride.h | 83 ++++++- > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c | 246 +++++++++++++------- > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c | 55 ++++- > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c | 37 ++- > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 102 ++++++-- > 7 files changed, 467 insertions(+), 129 deletions(-) > > -- > 2.7.4 >