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From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Date: Thu, 9 Feb 2017 16:30:50 +0000
Message-ID: <CAKv+Gu9UYtyW9pauPW1kK+CO9NA=0Mt8dBTk22LzqqLw+MaP8g@mail.gmail.com>
To: "Yao, Jiewen" <jiewen.yao@intel.com>
Cc: "Tian, Feng" <feng.tian@intel.com>, 
 "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>,
 Leif Lindholm <leif.lindholm@linaro.org>, 
 "Kinney, Michael D" <michael.d.kinney@intel.com>, "Fan,
 Jeff" <jeff.fan@intel.com>, "Zeng, Star" <star.zeng@intel.com>
Subject: Re: [PATCH V3 0/4] DXE Memory Protection
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On 9 February 2017 at 16:29, Yao, Jiewen <jiewen.yao@intel.com> wrote:
> Very good point.
>
> Can ARCH64 set 4K paging for 64K aligned runtime memory?
>

UEFI always uses 4 KB, but the OS may use 64 KB, so to create the
virtual address map it needs the runtime regions to be 64 KB aligned.

>
>
> If yes, how about we use
>
> =E2=80=9CImageRecord->ImageSize =3D ALIGN_VALUE(LoadedImage->ImageSize,
> EFI_PAGE_SIZE);=E2=80=9D
>

Perfect, thanks.

>
>
> From: Ard Biesheuvel [mailto:ard.biesheuvel@linaro.org]
> Sent: Thursday, February 9, 2017 8:21 AM
> To: Yao, Jiewen <jiewen.yao@intel.com>
> Cc: Tian, Feng <feng.tian@intel.com>; edk2-devel@lists.01.org; Leif Lindh=
olm
> <leif.lindholm@linaro.org>; Kinney, Michael D <michael.d.kinney@intel.com=
>;
> Fan, Jeff <jeff.fan@intel.com>; Zeng, Star <star.zeng@intel.com>
> Subject: Re: [edk2] [PATCH V3 0/4] DXE Memory Protection
>
>
>
> On 9 February 2017 at 15:28, Ard Biesheuvel <ard.biesheuvel@linaro.org>
> wrote:
>
>
>> On 9 February 2017 at 15:27, Yao, Jiewen <jiewen.yao@intel.com> wrote:
>>> 1)       That is great. I appreciate your quick response and help.
>>>
>>> I will drop my patch for ARM 2/4, and wait for yours.
>>>
>>
>> OK
>>
>>>
>>>
>>> 2)       For ImageEnd alignment issue, I agree with you.
>>>
>>> I plan to round up with:
>>>
>>> ImageRecord->ImageSize =3D ALIGN_VALUE(LoadedImage->ImageSize,
>>> SectionAlignment);
>>>
>>> before SetUefiImageProtectionAttributes (ImageRecord, Protect);
>>>
>>
>> Great, that should fix my issue!
>>
>
> Actually, does that still work correctly with 64 KB section alignment?
> I don't think the PE/COFF loader rounds up the allocation to section
> alignment, does it?