use of EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE

use of EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE

[Ard Biesheuvel]

The UEFI spec describes the EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE
attribute as follows:

"""
EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE
This bit may only be used in the Attributes parameter to
AllocateBuffer(). If this bit is set, then the PCI controller
that is requesting a buffer through AllocateBuffer() is
capable of producing PCI Dual Address Cycles, so it is able to
access a 64-bit address space. If this bit is not set, then the PCI
controller that is requesting a buffer through
AllocateBuffer() is not capable of producing PCI Dual
Address Cycles, so it is only able to access a 32-bit address space.
"""

However, both the UEFI driver writer's guide, and the de facto use in
Tianocore violate this, i.e., it use the pattern

"""
//
// Enable Command register and Dual Address Cycle
//
Status = PciIo->Attributes (
    PciIo,
    EfiPciIoAttributeOperationEnable,
    (PciSupports & EFI_PCI_DEVICE_ENABLE) |
    EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE,
    NULL
    );
"""

to enable it in the PCI I/O layer, and the Map/Unmap implementations
will switch to 64-bit flavors of the map operation, by the likes of

"""
  if ((PciIoDevice->Attributes &
EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE) != 0) {
    Operation = (EFI_PCI_IO_PROTOCOL_OPERATION) (Operation +
EfiPciOperationBusMasterRead64);
  }
"""

So what should we be doing in new code that needs to support 64-bit DMA?

-- 
Ard.

Re: use of EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE

[Ard Biesheuvel]

Please ignore -- as Alan pointed out off list, I had
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL and EFI_PCI_IO_PROTOCOL mixed up.


On 27 August 2016 at 17:37, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
> The UEFI spec describes the EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE
> attribute as follows:
>
> """
> EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE
> This bit may only be used in the Attributes parameter to
> AllocateBuffer(). If this bit is set, then the PCI controller
> that is requesting a buffer through AllocateBuffer() is
> capable of producing PCI Dual Address Cycles, so it is able to
> access a 64-bit address space. If this bit is not set, then the PCI
> controller that is requesting a buffer through
> AllocateBuffer() is not capable of producing PCI Dual
> Address Cycles, so it is only able to access a 32-bit address space.
> """
>
> However, both the UEFI driver writer's guide, and the de facto use in
> Tianocore violate this, i.e., it use the pattern
>
> """
> //
> // Enable Command register and Dual Address Cycle
> //
> Status = PciIo->Attributes (
>     PciIo,
>     EfiPciIoAttributeOperationEnable,
>     (PciSupports & EFI_PCI_DEVICE_ENABLE) |
>     EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE,
>     NULL
>     );
> """
>
> to enable it in the PCI I/O layer, and the Map/Unmap implementations
> will switch to 64-bit flavors of the map operation, by the likes of
>
> """
>   if ((PciIoDevice->Attributes &
> EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE) != 0) {
>     Operation = (EFI_PCI_IO_PROTOCOL_OPERATION) (Operation +
> EfiPciOperationBusMasterRead64);
>   }
> """
>
> So what should we be doing in new code that needs to support 64-bit DMA?
>
> --
> Ard.