From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c06::22c; helo=mail-io0-x22c.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-io0-x22c.google.com (mail-io0-x22c.google.com [IPv6:2607:f8b0:4001:c06::22c]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id DC0E222361E6D for ; Thu, 8 Feb 2018 02:20:44 -0800 (PST) Received: by mail-io0-x22c.google.com with SMTP id f34so5228541ioi.13 for ; Thu, 08 Feb 2018 02:26:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=gwzLVwre4Z5nWKU6TF/5gnA9IMWFDfjNpQMpSrZ9uZE=; b=XKArCIGAvwQk0f+TM4ZwSJv9i9HQ6j24HOmKrlnmK+ZzqJpxiw8VOiVOKtwLkXhzxB NB5T770HP7Q2hy3bvxZbiFJ+uKxSB7uUnqiWAslwciIwr4zpw2p8otVpdVSla1LocTEF yFDI59BiQ5Pd2FtwmEBy7tFZqqCwjh4JEZSew= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=gwzLVwre4Z5nWKU6TF/5gnA9IMWFDfjNpQMpSrZ9uZE=; b=KG/6snFJzxJTTr4n+og32UN0USepZYt+PFVApil8YBmwg+pkMKxThpwforFkgkPdOY Hk8pcRF0dm/LY1N42mSIvJ7EpM1OJXkTpvLzQ/W/e6wI2sGVVDt2UvixPmMlQHEuV5Rl sjHY6jOMPY81w3SCB0S5GWSl+5u73NKR+VGXhfgK+GKPAJK4kQXYmCXUIn3qpFL7H4qu aEEjj20LIcPDTU5Fg+F/h4mblv8nYbuJHEO0OCWCtRkZoS0vTsDKZwnaq031dRShW122 e5U6y4v5n19hywHu4lekgRb66/ZH5YYgiSxJW4rD2LZastoZObOse1q7Q55lu39EO+Kt RqKA== X-Gm-Message-State: APf1xPC3cc5ZlXq0PCmBK8yGoMMVlORYxv3hgfZ13iyNJ3PkafNcwdSc 2L6qNSdhWWWHiG4/ddqa218rpUKHODv8F8FYqw+aZA== X-Google-Smtp-Source: AH8x226R+92DLKrGTMuZVkXsN6llUV3TJvYH2NSv8NikVHg6gkVdTgwO/t4bCuatCLYd/o84lcII/i42Bss/jTSmnyA= X-Received: by 10.107.20.194 with SMTP id 185mr178400iou.127.1518085588781; Thu, 08 Feb 2018 02:26:28 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.112.13 with HTTP; Thu, 8 Feb 2018 02:26:28 -0800 (PST) In-Reply-To: <20180208102157.jabpvo6gbj6fozjl@bivouac.eciton.net> References: <20180208101812.4353-1-ard.biesheuvel@linaro.org> <20180208102157.jabpvo6gbj6fozjl@bivouac.eciton.net> From: Ard Biesheuvel Date: Thu, 8 Feb 2018 10:26:28 +0000 Message-ID: To: Leif Lindholm Cc: "edk2-devel@lists.01.org" , Masahisa Kojima Subject: Re: [PATCH edk2-platforms] Silicon/SynQuacer/PlatformDxe: disable eMMC DDR50 support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Feb 2018 10:20:45 -0000 Content-Type: text/plain; charset="UTF-8" On 8 February 2018 at 10:21, Leif Lindholm wrote: > On Thu, Feb 08, 2018 at 10:18:12AM +0000, Ard Biesheuvel wrote: >> We already disable SDR104 support on the SynQuacer eMMC controller to >> work around the need for a special tuning quirk that is difficult to >> implement without modifying the generic driver, even in the presence >> of a SD/MMC override protocol designed to carry such quirks. >> >> Unfortunately, as it turns out, DDR50 does not work either with the >> particular 8 GB Kingston part that has been fitted on the rev0.2/0.3 >> 96board samples. Since the mode UEFI drives the eMMC in is independent >> from what the OS chooses, and the fact that you would not use eMMC in >> the first place if performance was a major concern, let's just disable >> DDR50 as well, and fall back to SDR50 mode. >> >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Ard Biesheuvel > > Reviewed-by: Leif Lindholm > Thanks, pushed.