Re: [PATCH edk2-platforms v2] Silicon/SynQuacer: enable coherent DMA for NETSEC and eMMC

[Ard Biesheuvel <ard.biesheuvel@linaro.org>]

On 1 December 2017 at 12:57, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> On Thu, Nov 30, 2017 at 06:53:55PM +0000, Ard Biesheuvel wrote:
>> As it turns out, it is surprisingly easy to configure both the NETSEC
>> and eMMC devices as cache coherent for DMA, given that they are both
>> behind the same SMMU which is already configured in passthrough mode
>> by the firmware running on the SCP.
>>
>> So update the static SMMU configuration to make memory accesses performed
>> by these devices inner shareable inner/outer writeback cacheable, which
>> makes them cache coherent with the CPUs.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>
> Looks fine to me:
> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> (If you want to hold back for Tested-by:s, feel free to.)
>

Thanks. It actually depends on the patch that adds the EMMC driver
stack, which depends on the SD/MMC override patches for EDK2, so it
needs to wait anyway.