From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-io0-x231.google.com (mail-io0-x231.google.com [IPv6:2607:f8b0:4001:c06::231]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id C5FA52095C3BE for ; Wed, 19 Apr 2017 00:46:02 -0700 (PDT) Received: by mail-io0-x231.google.com with SMTP id a103so16156426ioj.1 for ; Wed, 19 Apr 2017 00:46:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=02iRQ7fLTUS0EI2CHJP7CI9GdJnnBxkDgz2YwT1bn6c=; b=BH+p6jEFafZw6K4LXdX7iSuWprKDSqJvWqa+pbWGeIlo2+6UmPfWTxHwIyTSbYWbAd +Jm6kOX9ZPrKH6J4ycRW4AY79+vqukreQv5h3JXxHChOQ+aSIT5LSMJi5L8kw2waIg8c zMGp+d1VGBYV8cYChnDP3FRRqLav0cYGbJIhs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=02iRQ7fLTUS0EI2CHJP7CI9GdJnnBxkDgz2YwT1bn6c=; b=Xv2Q6iMlCZfWifnUgwodUJxH0quu9YR2huyiwxVCW7lzk3Fkiq9m8X1dA3L7Po9utS FLEPQ79Gvb01NbLzYpjAvtYorrof/UEbphgyCO+0+6dxxKwDGvQe3qnUtcqtbdT+uorJ TAhWBQjSI52p0Ega5jUVbjPem0L+JaLxyeY01y8BOX3Ne//kpL3eeGGxiDd1h6JCEd9H C4N0HxV0VonEp+UftBlw8e73IP6viueOTgucffp9ofCvLdNzVZn7n6uCugvTTd9Mc0Qr pRdTTL8xj9AGyN6BUUc2n7g6B8bYpMtfa2BzrBCnJqcE8Mtgmq8CAg2ZqATnrjFX1Pk6 tHLg== X-Gm-Message-State: AN3rC/5JA6CWCHy6Kao0S3s5XSWjJ1GC/SDmOLumK5s4lWraGDJqDnr1 sWD9m8ysBUH11r668oyVUjI/fEyAAfZC X-Received: by 10.107.186.134 with SMTP id k128mr1567616iof.83.1492587962109; Wed, 19 Apr 2017 00:46:02 -0700 (PDT) MIME-Version: 1.0 Received: by 10.107.201.76 with HTTP; Wed, 19 Apr 2017 00:46:01 -0700 (PDT) In-Reply-To: <74D8A39837DF1E4DA445A8C0B3885C503A92E62F@shsmsx102.ccr.corp.intel.com> References: <1492585843-10974-1-git-send-email-ard.biesheuvel@linaro.org> <74D8A39837DF1E4DA445A8C0B3885C503A92E62F@shsmsx102.ccr.corp.intel.com> From: Ard Biesheuvel Date: Wed, 19 Apr 2017 08:46:01 +0100 Message-ID: To: "Yao, Jiewen" Cc: "edk2-devel@lists.01.org" , "Gao, Liming" , "Kinney, Michael D" , "leif.lindholm@linaro.org" Subject: Re: [PATCH v2] MdePkg/IndustryStandard: add definitions for ACPI 6.0 IORT X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 19 Apr 2017 07:46:03 -0000 Content-Type: text/plain; charset=UTF-8 On 19 April 2017 at 08:24, Yao, Jiewen wrote: > Hi Ard > Is there any special reason that we use INT32 instead of UINT32 in EFI_ACPI_6_0_IO_REMAPPING_TABLE? > > + INT32 NumNodes; > + INT32 NodeOffset; > + INT32 Reserved; > > I am just curious. > No, simply an oversight on my part. I will fix that up before committing. Thanks, Ard. >> -----Original Message----- >> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Ard >> Biesheuvel >> Sent: Wednesday, April 19, 2017 3:11 PM >> To: edk2-devel@lists.01.org; Gao, Liming ; Kinney, >> Michael D >> Cc: leif.lindholm@linaro.org; Ard Biesheuvel >> Subject: [edk2] [PATCH v2] MdePkg/IndustryStandard: add definitions for ACPI >> 6.0 IORT >> >> This adds #defines and struct typedefs for the various node types in >> the ACPI 6.0 IO Remapping Table (IORT). >> >> Contributed-under: TianoCore Contribution Agreement 1.0 >> Signed-off-by: Ard Biesheuvel >> --- >> v2: added PDF link to file header >> updated comment style to align with other ACPI header files >> >> MdePkg/Include/IndustryStandard/IoRemappingTable.h | 183 >> ++++++++++++++++++++ >> 1 file changed, 183 insertions(+) >> >> diff --git a/MdePkg/Include/IndustryStandard/IoRemappingTable.h >> b/MdePkg/Include/IndustryStandard/IoRemappingTable.h >> new file mode 100644 >> index 000000000000..310819b03ff5 >> --- /dev/null >> +++ b/MdePkg/Include/IndustryStandard/IoRemappingTable.h >> @@ -0,0 +1,183 @@ >> +/** @file >> + ACPI IO Remapping Table (IORT) as specified in ARM spec DEN0049B >> + >> + >> http://infocenter.arm.com/help/topic/com.arm.doc.den0049b/DEN0049B_IO_Re >> mapping_Table.pdf >> + >> + Copyright (c) 2017, Linaro Limited. All rights reserved.
>> + >> + This program and the accompanying materials >> + are licensed and made available under the terms and conditions of the BSD >> License >> + which accompanies this distribution. The full text of the license may be >> found at >> + http://opensource.org/licenses/bsd-license.php >> + >> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, >> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS >> OR IMPLIED. >> +**/ >> + >> +#ifndef __IO_REMAPPING_TABLE_H__ >> +#define __IO_REMAPPING_TABLE_H__ >> + >> +#include >> + >> +#define EFI_ACPI_IO_REMAPPING_TABLE_REVISION 0x0 >> + >> +#define EFI_ACPI_IORT_TYPE_ITS_GROUP 0x0 >> +#define EFI_ACPI_IORT_TYPE_NAMED_COMP 0x1 >> +#define EFI_ACPI_IORT_TYPE_ROOT_COMPLEX 0x2 >> +#define EFI_ACPI_IORT_TYPE_SMMUv1v2 0x3 >> +#define EFI_ACPI_IORT_TYPE_SMMUv3 0x4 >> + >> +#define EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA BIT0 >> + >> +#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_TR BIT0 >> +#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_WA BIT1 >> +#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_RA BIT2 >> +#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_AHO BIT3 >> + >> +#define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM BIT0 >> +#define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_DACS BIT1 >> + >> +#define EFI_ACPI_IORT_SMMUv1v2_MODEL_v1 0x0 >> +#define EFI_ACPI_IORT_SMMUv1v2_MODEL_v2 0x1 >> +#define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU400 0x2 >> +#define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU500 0x3 >> + >> +#define EFI_ACPI_IORT_SMMUv1v2_FLAG_DVM BIT0 >> +#define EFI_ACPI_IORT_SMMUv1v2_FLAG_COH_WALK BIT1 >> + >> +#define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL 0x0 >> +#define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_EDGE 0x1 >> + >> +#define EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE BIT0 >> +#define EFI_ACPI_IORT_SMMUv3_FLAG_HTTU_OVERRIDE BIT1 >> + >> +#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED 0x0 >> +#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED 0x1 >> + >> +#define EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE BIT0 >> + >> +#pragma pack(1) >> + >> +/// >> +/// Table header >> +/// >> +typedef struct { >> + EFI_ACPI_DESCRIPTION_HEADER Header; >> + INT32 NumNodes; >> + INT32 NodeOffset; >> + INT32 Reserved; >> +} EFI_ACPI_6_0_IO_REMAPPING_TABLE; >> + >> +/// >> +/// Definition for ID mapping table shared by all node types >> +/// >> +typedef struct { >> + UINT32 InputBase; >> + UINT32 NumIds; >> + UINT32 OutputBase; >> + UINT32 OutputReference; >> + UINT32 Flags; >> +} EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE; >> + >> +/// >> +/// Node header definition shared by all node types >> +/// >> +typedef struct { >> + UINT8 Type; >> + UINT16 Length; >> + UINT8 Revision; >> + UINT32 Reserved; >> + UINT32 NumIdMappings; >> + UINT32 IdReference; >> +} EFI_ACPI_6_0_IO_REMAPPING_NODE; >> + >> +/// >> +/// Node type 0: ITS node >> +/// >> +typedef struct { >> + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; >> + >> + UINT32 NumItsIdentifiers; >> +//UINT32 >> ItsIdentifiers[NumItsIdentifiers]; >> +} EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE; >> + >> +/// >> +/// Node type 1: root complex node >> +/// >> +typedef struct { >> + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; >> + >> + UINT32 CacheCoherent; >> + UINT8 AllocationHints; >> + UINT16 Reserved; >> + UINT8 MemoryAccessFlags; >> + >> + UINT32 AtsAttribute; >> + UINT32 PciSegmentNumber; >> +} EFI_ACPI_6_0_IO_REMAPPING_RC_NODE; >> + >> +/// >> +/// Node type 2: named component node >> +/// >> +typedef struct { >> + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; >> + >> + UINT32 Flags; >> + UINT32 CacheCoherent; >> + UINT8 AllocationHints; >> + UINT16 Reserved; >> + UINT8 MemoryAccessFlags; >> + UINT8 AddressSizeLimit; >> +//UINT8 ObjectName[]; >> +} EFI_ACPI_6_0_IO_REMAPPING_NAMED_COMP_NODE; >> + >> +/// >> +/// Node type 3: SMMUv1 or SMMUv2 node >> +/// >> +typedef struct { >> + UINT32 Interrupt; >> + UINT32 InterruptFlags; >> +} EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT; >> + >> +typedef struct { >> + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; >> + >> + UINT64 Base; >> + UINT64 Span; >> + UINT32 Model; >> + UINT32 Flags; >> + UINT32 GlobalInterruptArrayRef; >> + UINT32 NumContextInterrupts; >> + UINT32 ContextInterruptArrayRef; >> + UINT32 NumPmuInterrupts; >> + UINT32 PmuInterruptArrayRef; >> + >> + UINT32 SMMU_NSgIrpt; >> + UINT32 SMMU_NSgIrptFlags; >> + UINT32 SMMU_NSgCfgIrpt; >> + UINT32 SMMU_NSgCfgIrptFlags; >> + >> +//EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT >> ContextInterrupt[NumContextInterrupts]; >> +//EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT >> PmuInterrupt[NumPmuInterrupts]; >> +} EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE; >> + >> +/// >> +/// Node type 4: SMMUv4 node >> +/// >> +typedef struct { >> + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; >> + >> + UINT64 Base; >> + UINT32 Flags; >> + UINT32 Reserved; >> + UINT64 VatosAddress; >> + UINT32 Model; >> + UINT32 Event; >> + UINT32 Pri; >> + UINT32 Gerr; >> + UINT32 Sync; >> +} EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE; >> + >> +#pragma pack() >> + >> +#endif >> -- >> 2.7.4 >> >> _______________________________________________ >> edk2-devel mailing list >> edk2-devel@lists.01.org >> https://lists.01.org/mailman/listinfo/edk2-devel