From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-it0-x22f.google.com (mail-it0-x22f.google.com [IPv6:2607:f8b0:4001:c0b::22f]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5C3301A1E0B for ; Mon, 26 Sep 2016 15:51:08 -0700 (PDT) Received: by mail-it0-x22f.google.com with SMTP id x192so16230422itb.0 for ; Mon, 26 Sep 2016 15:51:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=CD8hmId4Iga8U6iKaiUOB18Mf/r2Q8N2xM6s+987dQ8=; b=fhoV9NE8uCY2Qn4lGd8tqPFs90nY2yPJp9g8ocGFpQvqnYdYbjq3kLV13vsUkxhzRM bYMyk5UNGSaX5naXXM6pjqBGSmmI19iem8d9zTXqzg9zo8dZaoqMp4VXUjX9nMhvnCc3 7ZjcvbOvYcZ3UU/QlpgBS+UlckDFbXLao60tQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=CD8hmId4Iga8U6iKaiUOB18Mf/r2Q8N2xM6s+987dQ8=; b=E69AxxjEpYLIA7y5Oo9AhR5h2pFxjUH9d4nRoEv/qEEVUbGX4oVMANICFPMUio+Imh TfbYqpYmUMv6vPiEcF9U0WfCiDgPQNlbFTARE8UcmWyqxIHa4OkEE2rD43mxyrk4zdnX MxnaBB1CSdPiqPoqIzF+XF2wKEpFk+zKndRoHXv91VurL8Dz2iRzV16KnlGMr3Jtl8Yp VGisTg65by7KnC/dKBl60n92MdG/ZyCK1iL/JLCzotGQ8FQwgejCm+AwP0yfFNFKRAIr 0mllUp+ceOdWgepGNh3QkbVWA94GuMAv5wrWPrbceLz3YVkZS+hYgL0IyaJwR9Rq24jL ABVQ== X-Gm-Message-State: AA6/9Rn30Mt1NCncjVWItZjQlO3m1OziBk5s4s+fjLK8V7/rpSw9TrTx1JNGKfhgUKdBg12ykadquJiWIF9c6LOG X-Received: by 10.36.137.9 with SMTP id s9mr447648itd.58.1474930267609; Mon, 26 Sep 2016 15:51:07 -0700 (PDT) MIME-Version: 1.0 Received: by 10.36.204.195 with HTTP; Mon, 26 Sep 2016 15:51:07 -0700 (PDT) In-Reply-To: References: From: Ard Biesheuvel Date: Mon, 26 Sep 2016 15:51:07 -0700 Message-ID: To: Kurt Kennett Cc: "edk2-devel@lists.01.org" , Leif Lindholm Subject: Re: [PATCH] ArmPkg-Drivers/CpuDxe: Fix Mmu Initialization Problem. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 26 Sep 2016 22:51:08 -0000 Content-Type: text/plain; charset=UTF-8 On 26 September 2016 at 15:49, Kurt Kennett wrote: > During Mmu initialization in the CpuDxe, for a page table any bits set > in the 'NextSectionAttributes' are garbage and were set from bits that > are actually part of the pagetable address. We clear it out to zero > so that the SyncCacheConfigPage will use the page attributes instead > of trying to convert the (bogus) section attributes into page > attributes. > > Contributed-under: TianoCore Contribution Agreement 1.0 > > Signed-off-by: Kurt Kennett > --- > ArmPkg/Drivers/CpuDxe/Arm/Mmu.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c > b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c index 63da8ba..64ef1bb 100644 > --- a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c > +++ b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c > @@ -297,6 +297,11 @@ SyncCacheConfig ( > } > NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE; > } else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(FirstLevelTable[i])) { > + // In this case any bits set in the 'NextSectionAttributes' are garbage and were set from > + // bits that are actually part of the pagetable address. We clear it out to zero so that > + // the SyncCacheConfigPage will use the page attributes instead of trying to convert the > + // section attributes into page attributes > + NextSectionAttributes = 0; > Status = SyncCacheConfigPage ( > i,FirstLevelTable[i], > NumberOfDescriptors, MemorySpaceMap, > -- > 2.9.0.windows > Reviewed-by: Ard Biesheuve Pushed as f6be48e9907d Thanks Kurt!