From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: Pete Batard <pete@akeo.ie>
Cc: "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Subject: Re: [PATCH v2 edk2-platforms 04/20] Platform/Broadcom/RPi3: Add ACPI Tables
Date: Wed, 12 Dec 2018 21:52:42 +0100 [thread overview]
Message-ID: <CAKv+Gu9iQpkzT0QG3p__yttmYT=oW2P2wOCXdBG3vcVA6eZRRg@mail.gmail.com> (raw)
In-Reply-To: <20181210123853.4864-5-pete@akeo.ie>
On Mon, 10 Dec 2018 at 13:39, Pete Batard <pete@akeo.ie> wrote:
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Pete Batard <pete@akeo.ie>
> ---
> Platform/Broadcom/Bcm283x/AcpiTables/AcpiTables.inf | 51 ++
> Platform/Broadcom/Bcm283x/AcpiTables/Csrt.aslc | 337 +++++++++++++
> Platform/Broadcom/Bcm283x/AcpiTables/Dbg2.aslc | 32 ++
> Platform/Broadcom/Bcm283x/AcpiTables/Dsdt.asl | 523 ++++++++++++++++++++
> Platform/Broadcom/Bcm283x/AcpiTables/Fadt.aslc | 50 ++
> Platform/Broadcom/Bcm283x/AcpiTables/Gtdt.aslc | 31 ++
> Platform/Broadcom/Bcm283x/AcpiTables/Madt.aslc | 60 +++
> Platform/Broadcom/Bcm283x/AcpiTables/Pep.asl | 92 ++++
> Platform/Broadcom/Bcm283x/AcpiTables/Pep.c | 84 ++++
> Platform/Broadcom/Bcm283x/AcpiTables/Pep.h | 126 +++++
> Platform/Broadcom/Bcm283x/AcpiTables/Platform.h | 82 +++
> Platform/Broadcom/Bcm283x/AcpiTables/Rhpx.asl | 201 ++++++++
> Platform/Broadcom/Bcm283x/AcpiTables/Sdhc.asl | 105 ++++
> Platform/Broadcom/Bcm283x/AcpiTables/Spcr.asl | 53 ++
> Platform/Broadcom/Bcm283x/AcpiTables/Uart.asl | 155 ++++++
> 15 files changed, 1982 insertions(+)
>
I'm not crazt about the hexdump-style files in this patch but I can
live with it.
One remark below.
> diff --git a/Platform/Broadcom/Bcm283x/AcpiTables/AcpiTables.inf b/Platform/Broadcom/Bcm283x/AcpiTables/AcpiTables.inf
> new file mode 100644
> index 000000000000..db0270270cf9
> --- /dev/null
> +++ b/Platform/Broadcom/Bcm283x/AcpiTables/AcpiTables.inf
> @@ -0,0 +1,51 @@
> +#/** @file
> +#
> +# ACPI table data and ASL sources required to boot the platform.
> +#
> +# Copyright (c) 2017, Andrey Warkentin <andrey.warkentin@gmail.com>
> +# Copyright (c) Microsoft Corporation. All rights reserved.
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the BSD License
> +# which accompanies this distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +#**/
> +
> +[Defines]
> + INF_VERSION = 0x00010005
I'll mention it here but it applies everywhere: please use 0x0001001A
as the INF version.
(In general, use the latest published version of each file type)
> + BASE_NAME = AcpiTables
> + FILE_GUID = 7E374E25-8E01-4FEE-87F2-390C23C606CD
> + MODULE_TYPE = USER_DEFINED
> + VERSION_STRING = 1.0
> +
> +#
> +# The following information is for reference only and not required by the build tools.
> +#
> +# VALID_ARCHITECTURES = AARCH64
> +#
> +
> +[Sources]
> + Platform.h
> + Madt.aslc
> + Fadt.aslc
> + Dbg2.aslc
> + Gtdt.aslc
> + Dsdt.asl
> + Csrt.aslc
> + Spcr.asl
> +
> +[Packages]
> + MdePkg/MdePkg.dec
> + EmbeddedPkg/EmbeddedPkg.dec
> +
> +[FixedPcd]
> + gEmbeddedTokenSpaceGuid.PcdInterruptBaseAddress
> +
> +[BuildOptions]
> + # The default '-mcmodel=small' used with DEBUG produces a GenFw error when compiling CSRT.acpi:
> + # "AARCH64 small code model requires identical ELF and PE/COFF section offsets modulo 4 KB."
> + GCC:DEBUG_*_AARCH64_CC_FLAGS = -mcmodel=tiny
> diff --git a/Platform/Broadcom/Bcm283x/AcpiTables/Csrt.aslc b/Platform/Broadcom/Bcm283x/AcpiTables/Csrt.aslc
> new file mode 100644
> index 000000000000..926942ec8da3
> --- /dev/null
> +++ b/Platform/Broadcom/Bcm283x/AcpiTables/Csrt.aslc
> @@ -0,0 +1,337 @@
> +/** @file
> + *
> + * Core System Resource Table (CSRT)
> + *
> + * Copyright (c) Microsoft Corporation. All rights reserved.
> + *
> + * This program and the accompanying materials
> + * are licensed and made available under the terms and conditions of the BSD License
> + * which accompanies this distribution. The full text of the license may be found at
> + * http://opensource.org/licenses/bsd-license.php
> + *
> + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> + *
> + **/
> +
> +#include "Platform.h"
> +
> +#define DMA_MAX_REQ_LINES 32
> +
> +#pragma pack(push, 1)
> +
> +//------------------------------------------------------------------------
> +// DMA Controller Vendor Data for RPi3
> +//------------------------------------------------------------------------
> +typedef struct
> +{
> + UINT32 Length;
> + UINT32 Type;
> + UINT64 ChannelsBaseAddress;
> + UINT32 ChannelsBaseSize;
> + UINT64 ControllerBaseAddress;
> + UINT32 ControllerBaseSize;
> + UINT32 ChannelCount;
> + UINT32 ControllerInterrupt;
> + UINT32 MinimumRequestLine;
> + UINT32 MaximumRequestLine;
> + BOOLEAN CacheCoherent;
> +} DMA_CONTROLLER_VENDOR_DATA;
> +
> +//------------------------------------------------------------------------
> +// DMA Controller on RPi3
> +//------------------------------------------------------------------------
> +typedef struct
> +{
> + EFI_ACPI_5_0_CSRT_RESOURCE_DESCRIPTOR_HEADER DmaControllerHeader;
> + DMA_CONTROLLER_VENDOR_DATA ControllerVendorData;
> +} RD_DMA_CONTROLLER;
> +
> +//------------------------------------------------------------------------
> +// DMA Channel Vendor Data for RPi3
> +//------------------------------------------------------------------------
> +typedef struct
> +{
> + UINT32 ChannelNumber;
> + UINT32 ChannelInterrupt;
> + UINT16 IsReservedChannel;
> + UINT16 NoSrcNoDestAddrIncr;
> +} DMA_CHANNEL_VENDOR_DATA;
> +
> +//------------------------------------------------------------------------
> +// DMA Channel on RPi3
> +//------------------------------------------------------------------------
> +typedef struct
> +{
> + EFI_ACPI_5_0_CSRT_RESOURCE_DESCRIPTOR_HEADER DmaChannelHeader;
> + DMA_CHANNEL_VENDOR_DATA ChannelVendorData;
> +} RD_DMA_CHANNEL;
> +
> +//------------------------------------------------------------------------
> +// DMA Resource Group on RPi3
> +//------------------------------------------------------------------------
> +
> +typedef struct
> +{
> + EFI_ACPI_5_0_CSRT_RESOURCE_GROUP_HEADER ResGroupHeader;
> + RD_DMA_CONTROLLER DmaController;
> + RD_DMA_CHANNEL DmaChannels[RPI3_DMA_CHANNEL_COUNT];
> +} RG_DMA;
> +
> +//----------------------------------------------------------------------------
> +// CSRT table structure for RPi3 platform - current revision only includes DMA
> +//----------------------------------------------------------------------------
> +typedef struct
> +{
> +// Standard ACPI Header
> + EFI_ACPI_DESCRIPTION_HEADER CsrtHeader;
> +
> +// DMA Resource Group
> + RG_DMA DmaResourceGroup;
> +
> +} EFI_ACPI_5_0_CSRT_TABLE;
> +
> +
> +
> +EFI_ACPI_5_0_CSRT_TABLE Csrt =
> +{
> + //------------------------------------------------------------------------
> + // ACPI Table Header
> + //------------------------------------------------------------------------
> + {
> + EFI_ACPI_5_0_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE, // Signature "CSRT"
> + sizeof(EFI_ACPI_DESCRIPTION_HEADER) + sizeof(RG_DMA), // Length
> + EFI_ACPI_5_0_CSRT_REVISION, // Revision
> + 0x00, // Checksum calculated at runtime.
> + EFI_ACPI_OEM_ID, // OEMID is a 6 bytes long field "BC2836"
> + EFI_ACPI_OEM_TABLE_ID, // OEM table identification(8 bytes long) "RPI3EDK2"
> + EFI_ACPI_OEM_REVISION, // OEM revision number.
> + EFI_ACPI_CREATOR_ID, // ASL compiler vendor ID.
> + EFI_ACPI_CREATOR_REVISION // ASL compiler revision number.
> + },
> +
> + //------------------------------------------------------------------------
> + // DMA Resource Group
> + //------------------------------------------------------------------------
> + {
> +
> + //------------------------------------------------------------------------
> + // DMA Resource Group Header
> + //------------------------------------------------------------------------
> + {
> + sizeof(RG_DMA), // Resource Group Length
> + EFI_ACPI_VENDOR_ID, // VendorId
> + 0, // SubvendorId
> + EFI_ACPI_CSRT_DEVICE_ID_DMA, // DeviceId 9
> + 0, // SubdeviceId
> + 0, // Revision
> + 0, // Reserved
> + 0 // SharedInfoLength
> + },
> +
> +
> + //-------------------------------------------------------------------------------
> + // Resource Descriptor - DMA Controller
> + //-------------------------------------------------------------------------------
> + {
> + {
> + sizeof(RD_DMA_CONTROLLER), // Length of this Resource Descriptor
> + EFI_ACPI_CSRT_RESOURCE_TYPE_DMA, // Type for this resource 3=DMA
> + EFI_ACPI_CSRT_RESOURCE_SUBTYPE_DMA_CONTROLLER, // Subtype for this resource 1=DMA Controller
> + EFI_ACPI_CSRT_RESOURCE_ID_IN_DMA_GRP+0, // ResourceId - 1st DMA controller
> + },
> + {
> + sizeof(DMA_CONTROLLER_VENDOR_DATA), // controller vendor data here
> + 1,
> + 0x3F007000, // Base address for channels
> + RPI3_DMA_CHANNEL_COUNT*0x100, // Base size = Number of channels x 0x100 size for each channel
> + 0x3F007FE0, // Base address for controller
> + 8, // Base size = two registers
> + RPI3_DMA_USED_CHANNEL_COUNT,
> + 0, // cannot use controller interrupt
> + 0, // Minimum Request Line
> + DMA_MAX_REQ_LINES-1, // Maximum Request Line
> + FALSE,
> + },
> + },
> +
> + //------------------------------------------------------------------------
> + // Resource Descriptor(s) - DMA Channels 0 to n-1
> + //------------------------------------------------------------------------
> + {
> +
> + // channel 0
> + {
> + {
> + sizeof(RD_DMA_CHANNEL), // Length of this Resource Descriptor
> + EFI_ACPI_CSRT_RESOURCE_TYPE_DMA, // Type for this resource 3=DMA
> + EFI_ACPI_CSRT_RESOURCE_SUBTYPE_DMA_CHANNEL, // Subtype for this resource 0=DMA Channel
> + EFI_ACPI_CSRT_RESOURCE_ID_IN_DMA_GRP+1, // ResourceId
> + },
> + {
> + 0, // channel vendor data here
> + 0x30, // 16+32 dma_int[0]
> + 0,
> + 0
> + },
> + },
> +
> + // channel 1 reserved
> + {
> + {
> + sizeof(RD_DMA_CHANNEL),
> + EFI_ACPI_CSRT_RESOURCE_TYPE_DMA,
> + EFI_ACPI_CSRT_RESOURCE_SUBTYPE_DMA_CHANNEL,
> + EFI_ACPI_CSRT_RESOURCE_ID_IN_DMA_GRP+2, // ResourceId
> + },
> + {
> + 1, // channel vendor data here
> + 0x31, // 17+32 dma_int[1]
> + 1,
> + 0
> + },
> + },
> +
> + // channel 2 - VC4 use only
> + {
> + {
> + sizeof(RD_DMA_CHANNEL),
> + EFI_ACPI_CSRT_RESOURCE_TYPE_DMA,
> + EFI_ACPI_CSRT_RESOURCE_SUBTYPE_DMA_CHANNEL,
> + EFI_ACPI_CSRT_RESOURCE_ID_IN_DMA_GRP+3, // ResourceId
> + },
> + {
> + 2, // channel vendor data here
> + 0x32, // 18+32 dma_int[2]
> + 1,
> + 0
> + },
> + },
> +
> + // channel 3 - VC4 use only
> + {
> + {
> + sizeof(RD_DMA_CHANNEL),
> + EFI_ACPI_CSRT_RESOURCE_TYPE_DMA,
> + EFI_ACPI_CSRT_RESOURCE_SUBTYPE_DMA_CHANNEL,
> + EFI_ACPI_CSRT_RESOURCE_ID_IN_DMA_GRP+4,
> + },
> + {
> + 3, // channel vendor data here
> + 0x33, // 19+32 dma_int[3]
> + 1,
> + 0
> + },
> + },
> +
> + // channel 4
> + {
> + {
> + sizeof(RD_DMA_CHANNEL),
> + EFI_ACPI_CSRT_RESOURCE_TYPE_DMA,
> + EFI_ACPI_CSRT_RESOURCE_SUBTYPE_DMA_CHANNEL,
> + EFI_ACPI_CSRT_RESOURCE_ID_IN_DMA_GRP+5,
> + },
> + {
> + 4, // channel vendor data here
> + 0x34, // 20+32 dma_int[4]
> + 0,
> + 1 // SD host controller candidate
> + },
> + },
> +
> + // channel 5
> + {
> + {
> + sizeof(RD_DMA_CHANNEL),
> + EFI_ACPI_CSRT_RESOURCE_TYPE_DMA,
> + EFI_ACPI_CSRT_RESOURCE_SUBTYPE_DMA_CHANNEL,
> + EFI_ACPI_CSRT_RESOURCE_ID_IN_DMA_GRP+6,
> + },
> + {
> + 5, // channel vendor data here
> + 0x35, // 21+32 dma_int[5]
> + 0,
> + 0
> + },
> + },
> +
> + // channel 6 is reserved
> + {
> + {
> + sizeof(RD_DMA_CHANNEL),
> + EFI_ACPI_CSRT_RESOURCE_TYPE_DMA,
> + EFI_ACPI_CSRT_RESOURCE_SUBTYPE_DMA_CHANNEL,
> + EFI_ACPI_CSRT_RESOURCE_ID_IN_DMA_GRP+7,
> + },
> + {
> + 6, // channel vendor data here
> + 0x36, // 22+32 dma_int[6]
> + 1,
> + 0
> + },
> + },
> +
> + // channel 7 is reserved
> + {
> + {
> + sizeof(RD_DMA_CHANNEL),
> + EFI_ACPI_CSRT_RESOURCE_TYPE_DMA,
> + EFI_ACPI_CSRT_RESOURCE_SUBTYPE_DMA_CHANNEL,
> + EFI_ACPI_CSRT_RESOURCE_ID_IN_DMA_GRP+8,
> + },
> + {
> + 7, // channel vendor data here
> + 0x37, // 23+32 dma_int[7]
> + 1,
> + 0
> + },
> + },
> +
> + // channel 8
> + {
> + {
> + sizeof(RD_DMA_CHANNEL),
> + EFI_ACPI_CSRT_RESOURCE_TYPE_DMA,
> + EFI_ACPI_CSRT_RESOURCE_SUBTYPE_DMA_CHANNEL,
> + EFI_ACPI_CSRT_RESOURCE_ID_IN_DMA_GRP+9,
> + },
> + {
> + 8, // channel vendor data here
> + 0x38, // 24+32 dma_int[8]
> + 0,
> + 0
> + },
> + },
> +
> + // channel 9
> + {
> + {
> + sizeof(RD_DMA_CHANNEL),
> + EFI_ACPI_CSRT_RESOURCE_TYPE_DMA,
> + EFI_ACPI_CSRT_RESOURCE_SUBTYPE_DMA_CHANNEL,
> + EFI_ACPI_CSRT_RESOURCE_ID_IN_DMA_GRP+10,
> + },
> + {
> + 9, // channel vendor data here
> + 0x39, // 25+32 dma_int[9]
> + 0,
> + 0
> + },
> + }
> +
> + } // end DMA Channels 0 to 14
> +
> + } // end DMA Resource group
> +};
> +
> +#pragma pack(pop)
> +
> +VOID* ReferenceAcpiTable(VOID)
> +{
> +//
> +// Reference the table being generated to prevent the optimizer from removing the
> +// data structure from the exeutable
> +//
> + return (VOID*)&Csrt;
> +}
> diff --git a/Platform/Broadcom/Bcm283x/AcpiTables/Dbg2.aslc b/Platform/Broadcom/Bcm283x/AcpiTables/Dbg2.aslc
> new file mode 100644
> index 000000000000..b728a5f00cfb
> --- /dev/null
> +++ b/Platform/Broadcom/Bcm283x/AcpiTables/Dbg2.aslc
> @@ -0,0 +1,32 @@
> +/** @file
> + *
> + * Debug Port Table (DBG2)
> + *
> + * Copyright (c) Microsoft Corporation. All rights reserved.
> + *
> + * This program and the accompanying materials
> + * are licensed and made available under the terms and conditions of the BSD License
> + * which accompanies this distribution. The full text of the license may be found at
> + * http://opensource.org/licenses/bsd-license.php
> + *
> + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> + *
> + **/
> +
> +char DBG2[92] = {
> + 0x44, 0x42, 0x47, 0x32, 0x5C, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x4D, 0x53, 0x46, 0x54, 0x20, 0x20, 0x45, 0x44, 0x4B, 0x32,
> + 0x20, 0x20, 0x20, 0x20, 0x01, 0x00, 0x00, 0x00, 0x4D, 0x53,
> + 0x46, 0x54, 0x01, 0x00, 0x00, 0x00, 0x2C, 0x00, 0x00, 0x00,
> + 0x01, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x01, 0x0A, 0x00,
> + 0x26, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x80, 0x10, 0x00,
> + 0x00, 0x00, 0x16, 0x00, 0x22, 0x00, 0x00, 0x20, 0x00, 0x10,
> + 0x00, 0x50, 0x21, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x6C, 0x00,
> + 0x00, 0x00, '\\', '_', 'S', 'B', '.', 'U', 'R', 'T',
> + 'M', 0x00,
> +};
> +
> +void * ReferenceAcpiTable(void) {
> + return (void *) &DBG2;
> +}
> diff --git a/Platform/Broadcom/Bcm283x/AcpiTables/Dsdt.asl b/Platform/Broadcom/Bcm283x/AcpiTables/Dsdt.asl
> new file mode 100644
> index 000000000000..69897cb921f7
> --- /dev/null
> +++ b/Platform/Broadcom/Bcm283x/AcpiTables/Dsdt.asl
> @@ -0,0 +1,523 @@
> +/** @file
> + *
> + * Differentiated System Definition Table (DSDT)
> + *
> + * Copyright (c) 2018, Andrey Warkentin <andrey.warkentin@gmail.com>
> + * Copyright (c) Microsoft Corporation. All rights reserved.
> + *
> + * This program and the accompanying materials
> + * are licensed and made available under the terms and conditions of the BSD License
> + * which accompanies this distribution. The full text of the license may be found at
> + * http://opensource.org/licenses/bsd-license.php
> + *
> + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> + *
> + **/
> +
> +#define BCM_ALT0 0x4
> +#define BCM_ALT1 0x5
> +#define BCM_ALT2 0x6
> +#define BCM_ALT3 0x7
> +#define BCM_ALT4 0x3
> +#define BCM_ALT5 0x2
> +
> +DefinitionBlock ("Dsdt.aml", "DSDT", 5, "MSFT", "EDK2", 2)
> +{
> + Scope (\_SB_)
> + {
> + include("Sdhc.asl")
> + include("Pep.asl")
> +
> + //
> + // Description: This is a Processor Device
> + //
> +
> + Device (CPU0)
> + {
> + Name (_HID, "ACPI0007")
> + Name (_UID, 0x0)
> + Method (_STA)
> + {
> + Return(0xf)
> + }
> + }
> +
> + //
> + // Description: This is a Processor Device
> + //
> +
> + Device (CPU1)
> + {
> + Name (_HID, "ACPI0007")
> + Name (_UID, 0x1)
> + Method (_STA)
> + {
> + Return(0xf)
> + }
> + }
> +
> + //
> + // Description: This is a Processor Device
> + //
> +
> + Device (CPU2)
> + {
> + Name (_HID, "ACPI0007")
> + Name (_UID, 0x2)
> + Method (_STA)
> + {
> + Return(0xf)
> + }
> + }
> +
> + //
> + // Description: This is a Processor Device
> + //
> +
> + Device (CPU3)
> + {
> + Name (_HID, "ACPI0007")
> + Name (_UID, 0x3)
> + Method (_STA)
> + {
> + Return(0xf)
> + }
> + }
> +
> + //
> + // Description: DWC OTG Controller
> + //
> +
> + Device (USB0)
> + {
> + Name (_HID, "BCM2848")
> + Name (_CID, Package() { "DWC_OTG", "DWC2_OTG"})
> + Name (_UID, 0x0)
> + Method (_STA)
> + {
> + Return(0xf)
> + }
> + Method (_CRS, 0x0, Serialized) {
> + Name (RBUF, ResourceTemplate () {
> + MEMORY32FIXED(ReadWrite, 0x3F980000, 0x10000, )
> + Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 0x29 }
> + })
> + Return(RBUF)
> + }
> + }
> +
> + //
> + // Description: Video Core 4 GPU
> + //
> +
> + Device (GPU0)
> + {
> + Name (_HID, "BCM2850")
> + Name (_CID, "VC4")
> + Name (_UID, 0x0)
> + Method (_STA)
> + {
> + Return(0xf)
> + }
> + Method (_CRS, 0x0, Serialized) {
> + Name (RBUF, ResourceTemplate () {
> + // Memory and interrupt for the GPU
> + MEMORY32FIXED(ReadWrite, 0x3FC00000, 0x1000, )
> + Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 0x2A }
> +
> + // HVS - Hardware Video Scalar
> + MEMORY32FIXED(ReadWrite, 0x3F400000, 0x6000, )
> + // The HVS interrupt is reserved by the VPU
> + // Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 0x41 }
> +
> + // PixelValve0 - DSI0 or DPI
> + // MEMORY32FIXED(ReadWrite, 0x3F206000, 0x100, )
> + // Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 0x4D }
> +
> + // PixelValve1 - DS1 or SMI
> + // MEMORY32FIXED(ReadWrite, 0x73F207000, 0x100, )
> + // Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 0x4E }
> +
> + // PixelValve2 - HDMI output - connected to HVS display FIFO 1
> + MEMORY32FIXED(ReadWrite, 0x3F807000, 0x100, )
> + Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 0x4A }
> +
> + // HDMI registers
> + MEMORY32FIXED(ReadWrite, 0x3F902000, 0x600, ) // HDMI registers
> + MEMORY32FIXED(ReadWrite, 0x3F808000, 0x100, ) // HD registers
> + // hdmi_int[0]
> + // Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 0x48 }
> + // hdmi_int[1]
> + // Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 0x49 }
> +
> + // HDMI DDC connection
> + I2CSerialBus(0x50,, 100000,, "\\_SB.I2C2",,,,) // EDID
> + I2CSerialBus(0x30,, 100000,, "\\_SB.I2C2",,,,) // E-DDC Segment Pointer
> + })
> + Return(RBUF)
> + }
> +
> + // GPU Power Management Component Data
> + // Reference : https://github.com/Microsoft/graphics-driver-samples/wiki/Install-Driver-in-a-Windows-VM
> + Method(PMCD, 0, Serialized) {
> +
> + Name(RBUF, Package() {
> + 1, // Version
> + 1, // Number of graphics power components
> +
> + Package() { // Power components package
> +
> + Package() { // GPU component package
> + 0, // Component Index
> + 0, // DXGK_POWER_COMPONENT_MAPPING.ComponentType (0 = DXGK_POWER_COMPONENT_ENGINE)
> + 0, // DXGK_POWER_COMPONENT_MAPPING.NodeIndex
> +
> + Buffer() { // DXGK_POWER_RUNTIME_COMPONENT.ComponentGuid
> + // 9B2D1E26-1575-4747-8FC0-B9EB4BAA2D2B
> + 0x26, 0x1E, 0x2D, 0x9B, 0x75, 0x15, 0x47, 0x47,
> + 0x8f, 0xc0, 0xb9, 0xeb, 0x4b, 0xaa, 0x2d, 0x2b
> + },
> +
> + "VC4_Engine_00",// DXGK_POWER_RUNTIME_COMPONENT.ComponentName
> + 2, // DXGK_POWER_RUNTIME_COMPONENT.StateCount
> +
> + Package() { // DXGK_POWER_RUNTIME_COMPONENT.States[] package
> +
> + Package() { // F0
> + 0, // DXGK_POWER_RUNTIME_STATE.TransitionLatency
> + 0, // DXGK_POWER_RUNTIME_STATE.ResidencyRequirement
> + 1210000, // DXGK_POWER_RUNTIME_STATE.NominalPower (microwatt)
> + },
> +
> + Package() { // F1 - Placeholder
> + 10000, // DXGK_POWER_RUNTIME_STATE.TransitionLatency
> + 10000, // DXGK_POWER_RUNTIME_STATE.ResidencyRequirement
> + 4, // DXGK_POWER_RUNTIME_STATE.NominalPower
> + },
> + }
> + }
> + }
> + })
> + Return(RBUF)
> + }
> + }
> +
> + //
> + // Description: PiQ Mailbox Driver
> + //
> +
> + Device (RPIQ)
> + {
> + Name (_HID, "BCM2849")
> + Name (_CID, "RPIQ")
> + Name (_UID, 0)
> + Method (_STA)
> + {
> + Return(0xf)
> + }
> + Method (_CRS, 0x0, Serialized) {
> + Name (RBUF, ResourceTemplate () {
> + Memory32Fixed (ReadWrite, 0x3F00B880, 0x00000024, )
> + Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 0x61 }
> + })
> + Return (RBUF)
> + }
> + }
> +
> + //
> + // Description: VCHIQ Driver
> + //
> +
> + Device (VCIQ)
> + {
> + Name (_HID, "BCM2835")
> + Name (_CID, "VCIQ")
> + Name (_UID, 0)
> + Name (_DEP, Package() { \_SB.RPIQ })
> + Method (_STA)
> + {
> + Return(0xf)
> + }
> + Method (_CRS, 0x0, Serialized) {
> + Name (RBUF, ResourceTemplate () {
> + Memory32Fixed (ReadWrite, 0x3F00B840, 0x00000010, )
> + Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 0x62 }
> + })
> + Return (RBUF)
> + }
> + }
> +
> + //
> + // Description: VC Shared Memory Driver
> + //
> +
> + Device (VCSM)
> + {
> + Name (_HID, "BCM2856")
> + Name (_CID, "VCSM")
> + Name (_UID, 0)
> + Name (_DEP, Package() { \_SB.VCIQ })
> + Method (_STA)
> + {
> + Return(0xf)
> + }
> + }
> +
> + //
> + // Description: GPIO
> + //
> + Device (GPI0)
> + {
> + Name (_HID, "BCM2845")
> + Name (_CID, "BCMGPIO")
> + Name (_UID, 0x0)
> + Method (_STA)
> + {
> + Return(0xf)
> + }
> + Method (_CRS, 0x0, Serialized) {
> + Name (RBUF, ResourceTemplate () {
> + MEMORY32FIXED(ReadWrite, 0x3F200000, 0xB4, )
> + Interrupt(ResourceConsumer, Level, ActiveHigh, Shared) { 0x51 }
> + Interrupt(ResourceConsumer, Level, ActiveHigh, Shared) { 0x53 }
> + })
> + Return(RBUF)
> + }
> + }
> +
> + //
> + // Description: I2C
> + //
> +
> + Device (I2C1)
> + {
> + Name (_HID, "BCM2841")
> + Name (_CID, "BCMI2C")
> + Name (_UID, 0x1)
> + Method (_STA)
> + {
> + Return(0xf)
> + }
> + Method (_CRS, 0x0, Serialized)
> + {
> + Name (RBUF, ResourceTemplate()
> + {
> + Memory32Fixed(ReadWrite, 0x3F804000, 0x20)
> + Interrupt(ResourceConsumer, Level, ActiveHigh, Shared) {0x55}
> + //
> + // MsftFunctionConfig is encoded as the VendorLong.
> + //
> + // MsftFunctionConfig(Exclusive, PullUp, BCM_ALT0, "\\_SB.GPI0", 0, ResourceConsumer, ) {2, 3}
> + //
> + VendorLong () // Length = 0x31
> + {
> + /* 0000 */ 0x00, 0x60, 0x44, 0xD5, 0xF3, 0x1F, 0x11, 0x60, // .`D....`
> + /* 0008 */ 0x4A, 0xB8, 0xB0, 0x9C, 0x2D, 0x23, 0x30, 0xDD, // J...-#0.
> + /* 0010 */ 0x2F, 0x8D, 0x1D, 0x00, 0x01, 0x10, 0x00, 0x01, // /.......
> + /* 0018 */ 0x04, 0x00, 0x12, 0x00, 0x00, 0x16, 0x00, 0x20, // .......
> + /* 0020 */ 0x00, 0x00, 0x00, 0x02, 0x00, 0x03, 0x00, 0x5C, // .......\
> + /* 0028 */ 0x5F, 0x53, 0x42, 0x2E, 0x47, 0x50, 0x49, 0x30, // _SB.GPI0
> + /* 0030 */ 0x00 // .
> + }
> +
> + })
> + Return(RBUF)
> + }
> + }
> +
> + //
> + // I2C2 is the HDMI DDC connection
> + //
> +
> + Device (I2C2)
> + {
> + Name (_HID, "BCM2841")
> + Name (_CID, "BCMI2C")
> + Name (_UID, 0x2)
> + Method (_STA)
> + {
> + Return(0xf)
> + }
> + Method (_CRS, 0x0, Serialized)
> + {
> + Name (RBUF, ResourceTemplate()
> + {
> + Memory32Fixed(ReadWrite, 0x3F805000, 0x20)
> + Interrupt(ResourceConsumer, Level, ActiveHigh, Shared) {0x55}
> + })
> + Return(RBUF)
> + }
> + }
> +
> + //
> + // Description: SPI
> + //
> +
> + Device (SPI0)
> + {
> + Name (_HID, "BCM2838")
> + Name (_CID, "BCMSPI0")
> + Name (_UID, 0x0)
> + Method (_STA)
> + {
> + Return(0xf)
> + }
> + Method (_CRS, 0x0, Serialized) {
> + Name (RBUF, ResourceTemplate () {
> + MEMORY32FIXED(ReadWrite, 0x3F204000, 0x20, )
> + Interrupt(ResourceConsumer, Level, ActiveHigh, Shared) {0x56}
> +
> + //
> + // MsftFunctionConfig is encoded as the VendorLong.
> + //
> + // MsftFunctionConfig(Exclusive, PullDown, BCM_ALT0, "\\_SB.GPI0", 0, ResourceConsumer, ) {9, 10, 11} // MISO, MOSI, SCLK
> + VendorLong () // Length = 0x33
> + {
> + /* 0000 */ 0x00, 0x60, 0x44, 0xD5, 0xF3, 0x1F, 0x11, 0x60, // .`D....`
> + /* 0008 */ 0x4A, 0xB8, 0xB0, 0x9C, 0x2D, 0x23, 0x30, 0xDD, // J...-#0.
> + /* 0010 */ 0x2F, 0x8D, 0x1F, 0x00, 0x01, 0x10, 0x00, 0x02, // /.......
> + /* 0018 */ 0x04, 0x00, 0x12, 0x00, 0x00, 0x18, 0x00, 0x22, // ......."
> + /* 0020 */ 0x00, 0x00, 0x00, 0x09, 0x00, 0x0A, 0x00, 0x0B, // ........
> + /* 0028 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x2E, 0x47, 0x50, // .\_SB.GP
> + /* 0030 */ 0x49, 0x30, 0x00 // I0.
> + }
> +
> + //
> + // MsftFunctionConfig is encoded as the VendorLong.
> + //
> + // MsftFunctionConfig(Exclusive, PullUp, BCM_ALT0, "\\_SB.GPI0", 0, ResourceConsumer, ) {8} // CE0
> + VendorLong () // Length = 0x2F
> + {
> + /* 0000 */ 0x00, 0x60, 0x44, 0xD5, 0xF3, 0x1F, 0x11, 0x60, // .`D....`
> + /* 0008 */ 0x4A, 0xB8, 0xB0, 0x9C, 0x2D, 0x23, 0x30, 0xDD, // J...-#0.
> + /* 0010 */ 0x2F, 0x8D, 0x1B, 0x00, 0x01, 0x10, 0x00, 0x01, // /.......
> + /* 0018 */ 0x04, 0x00, 0x12, 0x00, 0x00, 0x14, 0x00, 0x1E, // ........
> + /* 0020 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x5C, 0x5F, 0x53, // .....\_S
> + /* 0028 */ 0x42, 0x2E, 0x47, 0x50, 0x49, 0x30, 0x00 // B.GPI0.
> + }
> +
> + //
> + // MsftFunctionConfig is encoded as the VendorLong.
> + //
> + // MsftFunctionConfig(Exclusive, PullUp, BCM_ALT0, "\\_SB.GPI0", 0, ResourceConsumer, ) {7} // CE1
> + VendorLong () // Length = 0x2F
> + {
> + /* 0000 */ 0x00, 0x60, 0x44, 0xD5, 0xF3, 0x1F, 0x11, 0x60, // .`D....`
> + /* 0008 */ 0x4A, 0xB8, 0xB0, 0x9C, 0x2D, 0x23, 0x30, 0xDD, // J...-#0.
> + /* 0010 */ 0x2F, 0x8D, 0x1B, 0x00, 0x01, 0x10, 0x00, 0x01, // /.......
> + /* 0018 */ 0x04, 0x00, 0x12, 0x00, 0x00, 0x14, 0x00, 0x1E, // ........
> + /* 0020 */ 0x00, 0x00, 0x00, 0x07, 0x00, 0x5C, 0x5F, 0x53, // .....\_S
> + /* 0028 */ 0x42, 0x2E, 0x47, 0x50, 0x49, 0x30, 0x00 // B.GPI0.
> + }
> + })
> + Return(RBUF)
> + }
> + }
> +
> + Device (SPI1)
> + {
> + Name (_HID, "BCM2839")
> + Name (_CID, "BCMAUXSPI")
> + Name (_UID, 0x1)
> + Name (_DEP, Package() { \_SB.RPIQ })
> + Method (_STA)
> + {
> + Return(0xf)
> + }
> + Method (_CRS, 0x0, Serialized) {
> + Name (RBUF, ResourceTemplate () {
> + MEMORY32FIXED(ReadWrite, 0x3F215080, 0x40,)
> + Interrupt(ResourceConsumer, Level, ActiveHigh, Shared,) {0x3D}
> +
> + //
> + // MsftFunctionConfig is encoded as the VendorLong.
> + //
> + // MsftFunctionConfig(Exclusive, PullDown, BCM_ALT4, "\\_SB.GPI0", 0, ResourceConsumer, ) {19, 20, 21} // MISO, MOSI, SCLK
> + VendorLong () // Length = 0x33
> + {
> + /* 0000 */ 0x00, 0x60, 0x44, 0xD5, 0xF3, 0x1F, 0x11, 0x60, // .`D....`
> + /* 0008 */ 0x4A, 0xB8, 0xB0, 0x9C, 0x2D, 0x23, 0x30, 0xDD, // J...-#0.
> + /* 0010 */ 0x2F, 0x8D, 0x1F, 0x00, 0x01, 0x10, 0x00, 0x02, // /.......
> + /* 0018 */ 0x03, 0x00, 0x12, 0x00, 0x00, 0x18, 0x00, 0x22, // ......."
> + /* 0020 */ 0x00, 0x00, 0x00, 0x13, 0x00, 0x14, 0x00, 0x15, // ........
> + /* 0028 */ 0x00, 0x5C, 0x5F, 0x53, 0x42, 0x2E, 0x47, 0x50, // .\_SB.GP
> + /* 0030 */ 0x49, 0x30, 0x00 // I0.
> + }
> +
> + //
> + // MsftFunctionConfig is encoded as the VendorLong.
> + //
> + // MsftFunctionConfig(Exclusive, PullDown, BCM_ALT4, "\\_SB.GPI0", 0, ResourceConsumer, ) {16} // CE2
> + VendorLong () // Length = 0x2F
> + {
> + /* 0000 */ 0x00, 0x60, 0x44, 0xD5, 0xF3, 0x1F, 0x11, 0x60, // .`D....`
> + /* 0008 */ 0x4A, 0xB8, 0xB0, 0x9C, 0x2D, 0x23, 0x30, 0xDD, // J...-#0.
> + /* 0010 */ 0x2F, 0x8D, 0x1B, 0x00, 0x01, 0x10, 0x00, 0x02, // /.......
> + /* 0018 */ 0x03, 0x00, 0x12, 0x00, 0x00, 0x14, 0x00, 0x1E, // ........
> + /* 0020 */ 0x00, 0x00, 0x00, 0x10, 0x00, 0x5C, 0x5F, 0x53, // .....\_S
> + /* 0028 */ 0x42, 0x2E, 0x47, 0x50, 0x49, 0x30, 0x00 // B.GPI0.
> + }
> + })
> + Return(RBUF)
> + }
> + }
> +
> + // SPI2 has no pins on GPIO header
> + // Device (SPI2)
> + // {
> + // Name (_HID, "BCM2839")
> + // Name (_CID, "BCMAUXSPI")
> + // Name (_UID, 0x2)
> + // Name (_DEP, Package() { \_SB.RPIQ })
> + // Method (_STA)
> + // {
> + // Return(0xf) // Disabled
> + // }
> + // Method (_CRS, 0x0, Serialized) {
> + // Name (RBUF, ResourceTemplate () {
> + // MEMORY32FIXED(ReadWrite, 0x3F2150C0, 0x40,)
> + // Interrupt(ResourceConsumer, Level, ActiveHigh, Shared,) {0x3D}
> + // })
> + // Return(RBUF)
> + // }
> + // }
> +
> + //
> + // Description: PWM Driver
> + //
> +
> + Device (PWM0)
> + {
> + Name (_HID, "BCM2844")
> + Name (_CID, "BCM2844")
> + Name (_UID, 0)
> + Method (_STA)
> + {
> + Return(0xf)
> + }
> + Method (_CRS, 0x0, Serialized) {
> + Name (RBUF, ResourceTemplate () {
> + // DMA channel 11 control
> + Memory32Fixed (ReadWrite, 0x3F007B00, 0x00000100, )
> + // PWM control
> + Memory32Fixed (ReadWrite, 0x3F20C000, 0x00000028, )
> + // PWM control bus
> + Memory32Fixed (ReadWrite, 0x7E20C000, 0x00000028, )
> + // PWM control uncached
> + Memory32Fixed (ReadWrite, 0xFF20C000, 0x00000028, )
> + // PWM clock control
> + Memory32Fixed (ReadWrite, 0x3F1010A0, 0x00000008, )
> + // Interrupt DMA channel 11
> + Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 0x3B }
> + // DMA channel 11, DREQ 5 for PWM
> + FixedDMA(5, 11, Width32Bit, )
> + })
> + Return (RBUF)
> + }
> + }
> +
> + include("Uart.asl")
> + include("Rhpx.asl")
> + }
> +}
> diff --git a/Platform/Broadcom/Bcm283x/AcpiTables/Fadt.aslc b/Platform/Broadcom/Bcm283x/AcpiTables/Fadt.aslc
> new file mode 100644
> index 000000000000..493a888d3699
> --- /dev/null
> +++ b/Platform/Broadcom/Bcm283x/AcpiTables/Fadt.aslc
> @@ -0,0 +1,50 @@
> +/** @file
> + *
> + * Fixed ACPI Description Table (FADT)
> + *
> + * Copyright (c) 2018, Andrey Warkentin <andrey.warkentin@gmail.com>
> + * Copyright (c) Microsoft Corporation. All rights reserved.
> + *
> + * This program and the accompanying materials
> + * are licensed and made available under the terms and conditions of the BSD License
> + * which accompanies this distribution. The full text of the license may be found at
> + * http://opensource.org/licenses/bsd-license.php
> + *
> + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> + *
> + **/
> +
> +char FACP[268] = {
> + 0x46, 0x41, 0x43, 0x50, 0x0C, 0x01, 0x00, 0x00, 0x05, 0x00, /* 0 */
> + 0x42, 0x43, 0x32, 0x38, 0x33, 0x36, 0x45, 0x44, 0x4B, 0x32, /* 10 */
> + 0x20, 0x20, 0x20, 0x20, 0x01, 0x00, 0x00, 0x00, 0x4D, 0x53, /* 20 */
> + 0x46, 0x54, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 30 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, /* 40 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 50 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 60 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 70 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 80 */
> + 0x00, 0x04, 0x00, 0x00, 0x00, 0xE3, 0x00, 0x00, 0x00, 0x00, /* 90 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, /* 100 */
> + 0x00, 0x00, 0x21, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, /* 110 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, /* 120 */
> + 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 130 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 140 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 150 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 160 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 170 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 180 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 190 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 200 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 210 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 220 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 230 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 240 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 250 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* 268 */
> +};
> +
> +void * ReferenceAcpiTable(void) {
> + return (void *) &FACP;
> +}
> diff --git a/Platform/Broadcom/Bcm283x/AcpiTables/Gtdt.aslc b/Platform/Broadcom/Bcm283x/AcpiTables/Gtdt.aslc
> new file mode 100644
> index 000000000000..764cc6c09fe7
> --- /dev/null
> +++ b/Platform/Broadcom/Bcm283x/AcpiTables/Gtdt.aslc
> @@ -0,0 +1,31 @@
> +/** @file
> + *
> + * Generic Timer Description Table (GTDT)
> + * Automatically generated by AutoAcpi
> + *
> + * Copyright (c) Microsoft Corporation. All rights reserved.
> + *
> + * This program and the accompanying materials
> + * are licensed and made available under the terms and conditions of the BSD License
> + * which accompanies this distribution. The full text of the license may be found at
> + * http://opensource.org/licenses/bsd-license.php
> + *
> + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> + *
> + **/
> +
> +char GTDT[80] = {
> + 0x47, 0x54, 0x44, 0x54, 0x50, 0x00, 0x00, 0x00, 0x01, 0x00,
> + 0x4D, 0x53, 0x46, 0x54, 0x20, 0x20, 0x45, 0x44, 0x4B, 0x32,
> + 0x20, 0x20, 0x20, 0x20, 0x01, 0x00, 0x00, 0x00, 0x4D, 0x53,
> + 0x46, 0x54, 0x01, 0x00, 0x00, 0x00, 0x1C, 0x00, 0x00, 0x40,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
> +};
> +
> +void * ReferenceAcpiTable(void) {
> + return (void *) >DT;
> +}
> diff --git a/Platform/Broadcom/Bcm283x/AcpiTables/Madt.aslc b/Platform/Broadcom/Bcm283x/AcpiTables/Madt.aslc
> new file mode 100644
> index 000000000000..96f3ee469324
> --- /dev/null
> +++ b/Platform/Broadcom/Bcm283x/AcpiTables/Madt.aslc
> @@ -0,0 +1,60 @@
> +/** @file
> + *
> + * Multiple APIC Description Table (MADT)
> + *
> + * Copyright (c) 2018, Andrey Warkentin <andrey.warkentin@gmail.com>
> + * Copyright (c) Microsoft Corporation. All rights reserved.
> + *
> + * This program and the accompanying materials
> + * are licensed and made available under the terms and conditions of the BSD License
> + * which accompanies this distribution. The full text of the license may be found at
> + * http://opensource.org/licenses/bsd-license.php
> + *
> + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> + *
> + **/
> +
> +/*
> + * Even though the BCM2836 doesn't contain a GIC, these
> + * GICC definitions enable multi-core support (with PSCI).
> + *
> + * Mind the signatures in the header, they must be kept.
> + */
> +char APIC[] = {
> + 0x41, 0x50, 0x49, 0x43, 0x6c, 0x01, 0x00, 0x00, 0x03, 0xaf, 0x42, 0x43,
> + 0x32, 0x38, 0x33, 0x36, 0x45, 0x44, 0x4b, 0x32, 0x20, 0x20, 0x20, 0x20,
> + 0x01, 0x00, 0x00, 0x00, 0x4d, 0x53, 0x46, 0x54, 0x01, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0x50, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x01, 0x00, 0x00, 0x00, 0x0b, 0x50, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
> + 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
> + 0x0b, 0x50, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
> + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0b, 0x50, 0x00, 0x00,
> + 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x01, 0x00, 0x00, 0x00
> +};
> +
> +void * ReferenceAcpiTable(void) {
> + return (void *) &APIC;
> +}
> diff --git a/Platform/Broadcom/Bcm283x/AcpiTables/Pep.asl b/Platform/Broadcom/Bcm283x/AcpiTables/Pep.asl
> new file mode 100644
> index 000000000000..c0e07c6eaf42
> --- /dev/null
> +++ b/Platform/Broadcom/Bcm283x/AcpiTables/Pep.asl
> @@ -0,0 +1,92 @@
> +/** @file
> + *
> + * Platform Extension Plugin (PEP).
> + *
> + * Copyright (c) 2018, Andrey Warkentin <andrey.warkentin@gmail.com>
> + * Copyright (c) Microsoft Corporation. All rights reserved.
> + *
> + * This program and the accompanying materials
> + * are licensed and made available under the terms and conditions of the BSD License
> + * which accompanies this distribution. The full text of the license may be found at
> + * http://opensource.org/licenses/bsd-license.php
> + *
> + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> + *
> + **/
> +
> +Device(PEPD)
> +{
> + //
> + // RPI3 PEP virtual device.
> + //
> + Name(_HID, "BCM2854") // note: since pep on rpi3 is virtual device,
> + Name(_CID, "BCM2854") // its device id needs to be generated by Microsoft
> + Name(_UID, 0x0)
> + Name(_CRS, ResourceTemplate () {
> + // No hardware resources for PEP driver are needed.
> + })
> +
> + //
> + // Processor info. PEP proprietary method to return
> + // PEP_PROCESSOR_TABLE_PLAT structure.
> + //
> + // See Pep.h and Pep.c.
> + //
> + Name(_GPI, Buffer() {
> + 0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x5C,0x00,0x5F,0x00,0x53,
> + 0x00,0x42,0x00,0x2E,0x00,0x43,0x00,0x50,0x00,0x55,0x00,0x30,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> + })
> +
> + //
> + // Coordinated state info. PEP proprietary method to return
> + // PEP_COORDINATED_STATE_TABLE_PLAT structure.
> + //
> + // See Pep.h and Pep.c.
> + //
> + Name(_GCI, Buffer() {
> + 0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x01,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,
> + 0x00,0x00,0x00,0x01,0x00,0x00,0x00
> + })
> +
> + //
> + // Device info. PEP proprietary method to return
> + // PEP_DEVICE_TABLE_PLAT structure.
> + //
> + // See Pep.h and Pep.c.
> + //
> +
> + Name(_GDI, Buffer() {
> + 0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x5C,0x00,0x5F,0x00,0x53,
> + 0x00,0x42,0x00,0x2E,0x00,0x49,0x00,0x32,0x00,0x43,0x00,0x30,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,
> + 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
> + 0x00,0x00,0x00,0x00,0x00,0x00,0x00
> + })
> +}
> diff --git a/Platform/Broadcom/Bcm283x/AcpiTables/Pep.c b/Platform/Broadcom/Bcm283x/AcpiTables/Pep.c
> new file mode 100644
> index 000000000000..de457daaa547
> --- /dev/null
> +++ b/Platform/Broadcom/Bcm283x/AcpiTables/Pep.c
> @@ -0,0 +1,84 @@
> +/** @file
> + *
> + * PEP device tables
> + *
> + * Copyright (c) 2018, Andrei Warkentin <andrey.warkentin@gmail.com>
> + * Copyright (c) Microsoft Corporation. All rights reserved.
> + *
> + * This program and the accompanying materials
> + * are licensed and made available under the terms and conditions of the BSD License
> + * which accompanies this distribution. The full text of the license may be found at
> + * http://opensource.org/licenses/bsd-license.php
> + *
> + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> + *
> + **/
> +
> +#include "Pep.h"
> +
> +PEP_PROCESSOR_TABLE_PLAT RPI3Processors = {
> + 1, //Version
> + 1, //NumberProcessors
> + { //ProcessorInfo
> + { //[0]
> + L"\\_SB.CPU0", //DevicePath , wchar_t[16]
> + 0, //FeedbackCounterCount
> + 0x00000000, //Flags
> + 0, //NumberIdleStates
> + 0, //NumberPerfStates
> + { //IdleInfo
> + },
> + { // perfinfo
> + }
> + }
> + }
> +};
> +
> +PEP_COORDINATED_STATE_TABLE_PLAT RPI3CoordinatedStates = {
> + 1, //Version
> + 1, //CoordinatedStateCount
> + { //CordinatedStates[]
> + { //[0]
> + { // DependencyInfo
> + { //[0]
> + 1, //ExpectedState
> + 0, //TargetProcessor
> + 0x0 | 0x2 | 0x4, //LooseDependency = FALSE, InitialState = TRUE, DependentState = TRUE
> + }
> + },
> + SOC_STATE_TYPE, //StateType
> + 0x1, //Flags
> + 0, //Latency
> + 0, //BreakEvenDuration
> + 1, //DependencyCount
> + 1, //MaximumDependencySize
> + }
> + }
> +};
> +
> +PEP_DEVICE_TABLE_PLAT RPI3Devices = {
> + 1, //Version
> + 1, //NumberDevices
> + { //DeviceInfo
> + { //[1]
> + L"\\_SB.I2C0", //DevicePath , wchar_t[16]
> + 0x1 | (1 << 3), //DStateSupportMask (D0 and D3)
> + 1, //NumberCompoenents
> + { //DStateRequirement
> + { //[0]
> + PowerDeviceD3 //DState
> + }
> + },
> + { // FStateRequirement
> + { //[0]
> + { //FState
> + { //[0]
> + 0
> + }
> + }
> + }
> + }
> + }
> + }
> +};
> diff --git a/Platform/Broadcom/Bcm283x/AcpiTables/Pep.h b/Platform/Broadcom/Bcm283x/AcpiTables/Pep.h
> new file mode 100644
> index 000000000000..16d8c460832e
> --- /dev/null
> +++ b/Platform/Broadcom/Bcm283x/AcpiTables/Pep.h
> @@ -0,0 +1,126 @@
> +/** @file
> + *
> + * PEP device defines
> + *
> + * Copyright (c) 2018, Andrei Warkentin <andrey.warkentin@gmail.com>
> + * Copyright (c) Microsoft Corporation. All rights reserved.
> + *
> + * This program and the accompanying materials
> + * are licensed and made available under the terms and conditions of the BSD License
> + * which accompanies this distribution. The full text of the license may be found at
> + * http://opensource.org/licenses/bsd-license.php
> + *
> + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> + *
> + **/
> +
> +/*
> + * Note: Not everything is here. At least SOC_STATE_TYPE is missing.
> + */
> +
> +#ifndef _RPI3PEP_H_INCLUDED_
> +#define _RPI3PEP_H_INCLUDED_
> +
> +#include <IndustryStandard/Acpi50.h>
> +
> +#define PEP_MAX_DEPENDENCIES_PER_STATE 16
> +#define MAX_PROCESSOR_PATH_LENGTH 16
> +#define MAX_DEVICE_PATH_LENGTH 32
> +#define MAX_COMPONENT_COUNT 8
> +#define P_NUMBER_PROCESSORS 1
> +#define P_NUMBER_IDLE_STATES 1
> +#define P_NUMBER_PERF_STATES 0
> +#define P_NUMBER_DEVICES 1
> +#define P_NUMBER_COORDINATED_STATS 1
> +
> +typedef struct _PEP_PROCESSOR_IDLE_STATE_INFO {
> + UINT32 Ulong;
> + UINT32 Latency;
> + UINT32 BreakEvenDuration;
> +} PEP_PROCESSOR_IDLE_STATE_INFO, *PEP_PROCESSOR_IDLE_STATE_INFO;
> +
> +typedef struct _PEP_PROCESSOR_IDLE_INFO_PLAT {
> + //
> + // Processor idle states.
> + //
> + PEP_PROCESSOR_IDLE_STATE_INFO IdleStates[P_NUMBER_IDLE_STATES];
> +} PEP_PROCESSOR_IDLE_INFO_PLAT, *PPEP_PROCESSOR_IDLE_INFO_PLAT;
> +
> +typedef struct COORDINATED_DEPENDENCY_INFO {
> + UINT32 ExpectedState;
> + UINT32 TargetProcessor;
> + UINT32 Ulong;
> +} COORDINATED_DEPENDENCY_INFO, *PCOORDINATED_DEPENDENCY_INFO;
> +
> +typedef struct {
> + COORDINATED_DEPENDENCY_INFO DependencyInfo[PEP_MAX_DEPENDENCIES_PER_STATE];
> + UINT32 StateType;
> + UINT32 Ulong;
> + UINT32 Latency;
> + UINT32 BreakEvenDuration;
> + UINT32 DependencyCount;
> + UINT32 MaximumDependencySize;
> +} COORDINATED_STATE_INFO;
> +
> +typedef struct {
> + UINT32 Unused;
> +} PEP_PROCESSOR_PERF_INFO;
> +
> +typedef struct {
> + UINT32 FState[MAX_COMPONENT_COUNT];
> +} COORDINATED_FSTATE_REQUIREMENT;
> +
> +typedef struct {
> + UINT32 DState;
> +} COORDINATED_DSTATE_REQUIREMENT;
> +
> +//
> +// Top level device table
> +// *N.B. The exact length of the structure is determined by the NumberIdleStates/NumberPerfStates variables.
> +//
> +
> +typedef struct _PEP_PROCESSOR_INFO_PLAT {
> + WCHAR DevicePath[MAX_PROCESSOR_PATH_LENGTH]; // Null-terminated ACPI name
> + ULONG FeedbackCounterCount;
> + ULONG Flags;
> +
> + //
> + // We are putting the idle/perf state count here (instead
> + // of the PEP_PROCESSOR_xxx_INFO structure for the ease of parsing.
> + //
> + ULONG NumberIdleStates;
> + ULONG NumberPerfStates;
> +
> + PEP_PROCESSOR_IDLE_INFO_PLAT IdleInfo;
> + PEP_PROCESSOR_PERF_INFO PerfInfo;
> +} PEP_PROCESSOR_INFO_PLAT, *PPEP_PROCESSOR_INFO_PLAT;
> +
> +typedef struct _PEP_PROCESSOR_TABLE_PLAT {
> + UINT32 Version;
> + UINT32 NumberProcessors;
> + PEP_PROCESSOR_INFO_PLAT ProcessorInfo[P_NUMBER_PROCESSORS];
> +} PEP_PROCESSOR_TABLE_PLAT;
> +
> +typedef struct _PEP_COORDINATED_STATE_TABLE_PLAT {
> + ULONG Version;
> + ULONG CoordinatedStateCount;
> + COORDINATED_STATE_INFO CoordinatedStates[P_NUMBER_COORDINATED_STATS];
> +} PEP_COORDINATED_STATE_TABLE_PLAT, *PPEP_COORDINATED_STATE_TABLE_PLAT;
> +
> +typedef struct _PEP_DEVICE_INFO_PLAT {
> + WCHAR DevicePath[MAX_DEVICE_PATH_LENGTH]; // Null-terminated ACPI name
> + ULONG DStateSupportMask;
> + ULONG NumberComponents;
> +
> + COORDINATED_DSTATE_REQUIREMENT DStateRequirement[P_NUMBER_COORDINATED_STATS];
> + COORDINATED_FSTATE_REQUIREMENT FStateRequirement[P_NUMBER_COORDINATED_STATS];
> +} PEP_DEVICE_INFO_PLAT, *PPEP_DEVICE_INFO_PLAT;
> +
> +typedef struct _PEP_DEVICE_TABLE_PLAT {
> + ULONG Version;
> + ULONG NumberDevices;
> + PEP_DEVICE_INFO_PLAT DeviceInfo[P_NUMBER_DEVICES];
> +} PEP_DEVICE_TABLE_PLAT, *PPEP_DEVICE_TABLE_PLAT;
> +
> +#endif
> diff --git a/Platform/Broadcom/Bcm283x/AcpiTables/Platform.h b/Platform/Broadcom/Bcm283x/AcpiTables/Platform.h
> new file mode 100644
> index 000000000000..826182698fd0
> --- /dev/null
> +++ b/Platform/Broadcom/Bcm283x/AcpiTables/Platform.h
> @@ -0,0 +1,82 @@
> +/** @file
> + *
> + * RPi3 Platform specific defines for constructing ACPI tables
> + *
> + * Copyright (c) 2018, Andrei Warkentin <andrey.warkentin@gmail.com>
> + * Copyright (c) Microsoft Corporation. All rights reserved.
> + *
> + * This program and the accompanying materials
> + * are licensed and made available under the terms and conditions of the BSD License
> + * which accompanies this distribution. The full text of the license may be found at
> + * http://opensource.org/licenses/bsd-license.php
> + *
> + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> + *
> + **/
> +
> +#ifndef _Platform_H_INCLUDED_
> +#define _Platform_H_INCLUDED_
> +
> +#include <IndustryStandard/Acpi50.h>
> +
> +#define EFI_ACPI_OEM_ID {'M','C','R','S','F','T'} // OEMID 6 bytes long
> +#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('R','P','I','3','E','D','K','2') // OEM table id 8 bytes long
> +#define EFI_ACPI_OEM_REVISION 0x02000820
> +#define EFI_ACPI_CREATOR_ID SIGNATURE_32('R','P','I','3')
> +#define EFI_ACPI_CREATOR_REVISION 0x00000097
> +
> +#define EFI_ACPI_VENDOR_ID SIGNATURE_32('M','S','F','T')
> +#define EFI_ACPI_CSRT_REVISION 0x00000005
> +#define EFI_ACPI_CSRT_DEVICE_ID_DMA 0x00000009 // fixed id
> +#define EFI_ACPI_CSRT_RESOURCE_ID_IN_DMA_GRP 0x0 // count up from 0
> +
> +#define RPI3_DMA_CHANNEL_COUNT 10 // all 10 DMA channels are listed, including the reserved ones
> +#define RPI3_DMA_USED_CHANNEL_COUNT 5 // use 5 DMA channels
> +
> +#define EFI_ACPI_5_0_CSRT_REVISION 0x00000000
> +
> +typedef enum
> +{
> + EFI_ACPI_CSRT_RESOURCE_TYPE_RESERVED, // 0
> + EFI_ACPI_CSRT_RESOURCE_TYPE_INTERRUPT, // 1
> + EFI_ACPI_CSRT_RESOURCE_TYPE_TIMER, // 2
> + EFI_ACPI_CSRT_RESOURCE_TYPE_DMA, // 3
> + EFI_ACPI_CSRT_RESOURCE_TYPE_CACHE, // 4
> +}
> +CSRT_RESOURCE_TYPE;
> +
> +typedef enum
> +{
> + EFI_ACPI_CSRT_RESOURCE_SUBTYPE_DMA_CHANNEL, // 0
> + EFI_ACPI_CSRT_RESOURCE_SUBTYPE_DMA_CONTROLLER // 1
> +}
> +CSRT_DMA_SUBTYPE;
> +
> +//------------------------------------------------------------------------
> +// CSRT Resource Group header 24 bytes long
> +//------------------------------------------------------------------------
> +typedef struct
> +{
> + UINT32 Length; // Length
> + UINT32 VendorID; // 4 bytes
> + UINT32 SubVendorId; // 4 bytes
> + UINT16 DeviceId; // 2 bytes
> + UINT16 SubdeviceId; // 2 bytes
> + UINT16 Revision; // 2 bytes
> + UINT16 Reserved; // 2 bytes
> + UINT32 SharedInfoLength; // 4 bytes
> +} EFI_ACPI_5_0_CSRT_RESOURCE_GROUP_HEADER;
> +
> +//------------------------------------------------------------------------
> +// CSRT Resource Descriptor 12 bytes total
> +//------------------------------------------------------------------------
> +typedef struct
> +{
> + UINT32 Length; // 4 bytes
> + UINT16 ResourceType; // 2 bytes
> + UINT16 ResourceSubType; // 2 bytes
> + UINT32 UID; // 4 bytes
> +} EFI_ACPI_5_0_CSRT_RESOURCE_DESCRIPTOR_HEADER;
> +
> +#endif // of _Platform_H_INCLUDED_
> diff --git a/Platform/Broadcom/Bcm283x/AcpiTables/Rhpx.asl b/Platform/Broadcom/Bcm283x/AcpiTables/Rhpx.asl
> new file mode 100644
> index 000000000000..b197aa53fed4
> --- /dev/null
> +++ b/Platform/Broadcom/Bcm283x/AcpiTables/Rhpx.asl
> @@ -0,0 +1,201 @@
> +/** @file
> + *
> + * [DSDT] RHProxy device to enable WinRT API (RHPX)
> + *
> + * Copyright (c) 2018, Andrey Warkentin <andrey.warkentin@gmail.com>
> + * Copyright (c) Microsoft Corporation. All rights reserved.
> + *
> + * This program and the accompanying materials
> + * are licensed and made available under the terms and conditions of the BSD License
> + * which accompanies this distribution. The full text of the license may be found at
> + * http://opensource.org/licenses/bsd-license.php
> + *
> + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> + *
> + **/
> +
> +Device(RHPX)
> +{
> + Name(_HID, "MSFT8000")
> + Name(_CID, "MSFT8000")
> + Name(_UID, 1)
> +
> + Name(_CRS, ResourceTemplate()
> + {
> + // Index 0
> + SPISerialBus( // SCKL - GPIO 11 - Pin 23
> + // MOSI - GPIO 10 - Pin 19
> + // MISO - GPIO 9 - Pin 21
> + // CE0 - GPIO 8 - Pin 24
> + 0, // Device selection (CE0)
> + PolarityLow, // Device selection polarity
> + FourWireMode, // wiremode
> + 8, // databit len
> + ControllerInitiated, // slave mode
> + 4000000, // connection speed
> + ClockPolarityLow, // clock polarity
> + ClockPhaseFirst, // clock phase
> + "\\_SB.SPI0", // ResourceSource: SPI bus controller name
> + 0, // ResourceSourceIndex
> + // Resource usage
> + // DescriptorName: creates name for offset of resource descriptor
> + ) // Vendor Data
> +
> + // Index 1
> + SPISerialBus( // SCKL - GPIO 11 - Pin 23
> + // MOSI - GPIO 10 - Pin 19
> + // MISO - GPIO 9 - Pin 21
> + // CE1 - GPIO 7 - Pin 26
> + 1, // Device selection (CE1)
> + PolarityLow, // Device selection polarity
> + FourWireMode, // wiremode
> + 8, // databit len
> + ControllerInitiated, // slave mode
> + 4000000, // connection speed
> + ClockPolarityLow, // clock polarity
> + ClockPhaseFirst, // clock phase
> + "\\_SB.SPI0", // ResourceSource: SPI bus controller name
> + 0, // ResourceSourceIndex
> + // Resource usage
> + // DescriptorName: creates name for offset of resource descriptor
> + ) // Vendor Data
> +
> + // Index 2
> + I2CSerialBus( // Pin 3 (GPIO2, SDA1), 5 (GPIO3, SCL1)
> + 0xFFFF, // SlaveAddress: placeholder
> + , // SlaveMode: default to ControllerInitiated
> + 0, // ConnectionSpeed: placeholder
> + , // Addressing Mode: default to 7 bit
> + "\\_SB.I2C1", // ResourceSource: I2C bus controller name
> + ,
> + ,
> + , // Descriptor Name: creates name for offset of resource descriptor
> + ) // VendorData
> +
> + // Index 3
> + SPISerialBus( // SPI1_SCLK - GPIO21
> + // SPI1_MOSI - GPIO20
> + // SPI1_MISO - GPIO19
> + // SPI1_CE2_N - GPIO16
> + 2, // Device selection (CE2)
> + PolarityLow, // Device selection polarity
> + FourWireMode, // wiremode
> + 8, // databit len
> + ControllerInitiated, // slave mode
> + 4000000, // connection speed
> + ClockPolarityLow, // clock polarity
> + ClockPhaseFirst, // clock phase
> + "\\_SB.SPI1", // ResourceSource: SPI bus controller name
> + 0, // ResourceSourceIndex
> + // Resource usage
> + // DescriptorName: creates name for offset of resource descriptor
> + ) // Vendor Data
> +
> + // GPIO 2
> + GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 2 }
> + GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPI0",) { 2 }
> + // GPIO 3
> + GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 3 }
> + GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPI0",) { 3 }
> + // GPIO 4
> + GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 4 }
> + GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPI0",) { 4 }
> + // GPIO 5
> + GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 5 }
> + GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPI0",) { 5 }
> + // GPIO 6
> + GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 6 }
> + GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPI0",) { 6 }
> + // GPIO 7
> + GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 7 }
> + GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPI0",) { 7 }
> + // GPIO 8
> + GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 8 }
> + GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPI0",) { 8 }
> + // GPIO 9
> + GpioIO(Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 9 }
> + GpioInt(Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 9 }
> + // GPIO 10
> + GpioIO(Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 10 }
> + GpioInt(Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 10 }
> + // GPIO 11
> + GpioIO(Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 11 }
> + GpioInt(Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 11 }
> + // GPIO 12
> + GpioIO(Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 12 }
> + GpioInt(Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 12 }
> + // GPIO 13
> + GpioIO(Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 13 }
> + GpioInt(Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 13 }
> + // NTRAID#MSFT-7141401-2016/04/7-jordanrh - disable UART muxing
> + // until a proper solution can be created for the dmap conflict
> + // GPIO 14 - UART TX
> + // GpioIO(Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 14 }
> + // GpioInt(Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 14 }
> + // GPIO 15 - UART RX
> + // GpioIO(Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 15 }
> + // GpioInt(Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 15 }
> + // GPIO 16
> + GpioIO(Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 16 }
> + GpioInt(Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 16 }
> + // GPIO 17
> + GpioIO(Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 17 }
> + GpioInt(Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 17 }
> + // GPIO 18
> + GpioIO(Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 18 }
> + GpioInt(Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 18 }
> + // GPIO 19
> + GpioIO(Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 19 }
> + GpioInt(Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 19 }
> + // GPIO 20
> + GpioIO(Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 20 }
> + GpioInt(Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 20 }
> + // GPIO 21
> + GpioIO(Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 21 }
> + GpioInt(Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 21 }
> + // GPIO 22
> + GpioIO(Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 22 }
> + GpioInt(Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 22 }
> + // GPIO 23
> + GpioIO(Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 23 }
> + GpioInt(Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 23 }
> + // GPIO 24
> + GpioIO(Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 24 }
> + GpioInt(Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 24 }
> + // GPIO 25
> + GpioIO(Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 25 }
> + GpioInt(Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 25 }
> + // GPIO 26
> + GpioIO(Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 26 }
> + GpioInt(Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 26 }
> + // GPIO 27
> + GpioIO(Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 27 }
> + GpioInt(Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 27 }
> + })
> +
> + Name(_DSD, Package()
> + {
> + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> + Package()
> + {
> + // Reference http://www.raspberrypi.org/documentation/hardware/raspberrypi/spi/README.md
> + // SPI 0
> + Package(2) { "bus-SPI-SPI0", Package() { 0, 1 }}, // Index 0 & 1
> + Package(2) { "SPI0-MinClockInHz", 7629 }, // 7629 Hz
> + Package(2) { "SPI0-MaxClockInHz", 125000000 }, // 125 MHz
> + Package(2) { "SPI0-SupportedDataBitLengths", Package() { 8 }}, // Data Bit Length
> + // I2C1
> + Package(2) { "bus-I2C-I2C1", Package() { 2 }},
> + // GPIO Pin Count and supported drive modes
> + Package (2) { "GPIO-PinCount", 54 },
> + Package (2) { "GPIO-UseDescriptorPinNumbers", 1 },
> + Package (2) { "GPIO-SupportedDriveModes", 0xf }, // InputHighImpedance, InputPullUp, InputPullDown, OutputCmos
> + // SPI 1
> + Package(2) { "bus-SPI-SPI1", Package() { 3 }}, // Index 3
> + Package(2) { "SPI1-MinClockInHz", 30511 }, // 30.5 kHz
> + Package(2) { "SPI1-MaxClockInHz", 20000000 }, // 20 MHz
> + Package(2) { "SPI1-SupportedDataBitLengths", Package() { 8 }}, // Data Bit Length
> + }
> + })
> +}
> diff --git a/Platform/Broadcom/Bcm283x/AcpiTables/Sdhc.asl b/Platform/Broadcom/Bcm283x/AcpiTables/Sdhc.asl
> new file mode 100644
> index 000000000000..a39138ce5c5c
> --- /dev/null
> +++ b/Platform/Broadcom/Bcm283x/AcpiTables/Sdhc.asl
> @@ -0,0 +1,105 @@
> +/** @file
> + *
> + * [DSDT] SD controller/card definition (SDHC)
> + *
> + * Copyright (c) 2018, Andrey Warkentin <andrey.warkentin@gmail.com>
> + * Copyright (c) Microsoft Corporation. All rights reserved.
> + *
> + * This program and the accompanying materials
> + * are licensed and made available under the terms and conditions of the BSD License
> + * which accompanies this distribution. The full text of the license may be found at
> + * http://opensource.org/licenses/bsd-license.php
> + *
> + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> + *
> + **/
> +
> +//
> +// Note: UEFI can use either SDHost or Arasan. We expose both to the OS.
> +//
> +
> +//
> +// Description: This is ArasanSD 3.0 SD Host Controller.
> +//
> +
> +Device (SDC1)
> +{
> + Name (_HID, "BCM2847")
> + Name (_CID, "ARASAN")
> + Name (_UID, 0x0)
> + Name (_S1D, 0x1)
> + Name (_S2D, 0x1)
> + Name (_S3D, 0x1)
> + Name (_S4D, 0x1)
> + Method (_STA)
> + {
> + Return(0xf)
> + }
> + Method (_CRS, 0x0, Serialized) {
> + Name (RBUF, ResourceTemplate () {
> + MEMORY32FIXED(ReadWrite, 0x3F300000, 0x100, )
> + Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 0x5E }
> + })
> + Return(RBUF)
> + }
> +
> + //
> + // A child device that represents the
> + // sd card, which is marked as non-removable.
> + //
> + Device (SDMM)
> + {
> + Method (_ADR)
> + {
> + Return (0)
> + }
> + Method (_RMV) // Is removable
> + {
> + Return (0) // 0 - fixed
> + }
> + }
> +}
> +
> +
> +//
> +// Description: This is Broadcom SDHost 2.0 SD Host Controller
> +//
> +
> +Device (SDC2)
> +{
> + Name (_HID, "BCM2855")
> + Name (_CID, "SDHST")
> + Name (_UID, 0x0)
> + Name (_S1D, 0x1)
> + Name (_S2D, 0x1)
> + Name (_S3D, 0x1)
> + Name (_S4D, 0x1)
> + Method (_STA)
> + {
> + Return(0xf)
> + }
> + Method (_CRS, 0x0, Serialized) {
> + Name (RBUF, ResourceTemplate () {
> + MEMORY32FIXED(ReadWrite, 0x3F202000, 0x100, )
> + Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 0x58 }
> + })
> + Return(RBUF)
> + }
> +
> + //
> + // A child device that represents the
> + // sd card, which is marked as non-removable.
> + //
> + Device (SDMM)
> + {
> + Method (_ADR)
> + {
> + Return (0)
> + }
> + Method (_RMV) // Is removable
> + {
> + Return (0) // 0 - fixed
> + }
> + }
> +}
> diff --git a/Platform/Broadcom/Bcm283x/AcpiTables/Spcr.asl b/Platform/Broadcom/Bcm283x/AcpiTables/Spcr.asl
> new file mode 100644
> index 000000000000..a6fbfd08e021
> --- /dev/null
> +++ b/Platform/Broadcom/Bcm283x/AcpiTables/Spcr.asl
> @@ -0,0 +1,53 @@
> +/** @file
> + *
> + * Serial Port Console Redirection Table (SPCR)
> + *
> + * Copyright (c) 2017-2018, Andrey Warkentin <andrey.warkentin@gmail.com>
> + *
> + * This program and the accompanying materials
> + * are licensed and made available under the terms and conditions of the BSD License
> + * which accompanies this distribution. The full text of the license may be found at
> + * http://opensource.org/licenses/bsd-license.php
> + *
> + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> + *
> + **/
> +
> +[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table]
> +[004h 0004 4] Table Length : 00000050
> +[008h 0008 1] Revision : 01
> +[009h 0009 1] Checksum : 00
> +[00Ah 0010 6] Oem ID : "RPiEFI"
> +[010h 0016 8] Oem Table ID : "RPi3UEFI"
> +[018h 0024 4] Oem Revision : 00000001
> +[01Ch 0028 4] Asl Compiler ID : "----"
> +[020h 0032 4] Asl Compiler Revision : 00000000
> +
> +[024h 0036 1] Interface Type : 10
> +[025h 0037 3] Reserved : 000000
> +
> +[028h 0040 12] Serial Port Register : [Generic Address Structure]
> +[028h 0040 1] Space ID : 00 [SystemMemory]
> +[029h 0041 1] Bit Width : 20
> +[02Ah 0042 1] Bit Offset : 00
> +[02Bh 0043 1] Encoded Access Width : 02 [DWord Access:32]
> +[02Ch 0044 8] Address : 000000003f215000
> +
> +[034h 0052 1] Interrupt Type : 0E
> +[035h 0053 1] PCAT-compatible IRQ : 00
> +[036h 0054 4] Interrupt : 3D
> +[03Ah 0058 1] Baud Rate : 07
> +[03Bh 0059 1] Parity : 00
> +[03Ch 0060 1] Stop Bits : 01
> +[03Dh 0061 1] Flow Control : 00
> +[03Eh 0062 1] Terminal Type : 00
> +[04Ch 0076 1] Reserved : 00
> +[040h 0064 2] PCI Device ID : FFFF
> +[042h 0066 2] PCI Vendor ID : FFFF
> +[044h 0068 1] PCI Bus : 00
> +[045h 0069 1] PCI Device : 00
> +[046h 0070 1] PCI Function : 00
> +[047h 0071 4] PCI Flags : 00000000
> +[04Bh 0075 1] PCI Segment : 00
> +[04Ch 0076 4] Reserved : 00000000
> diff --git a/Platform/Broadcom/Bcm283x/AcpiTables/Uart.asl b/Platform/Broadcom/Bcm283x/AcpiTables/Uart.asl
> new file mode 100644
> index 000000000000..fa92cf24db91
> --- /dev/null
> +++ b/Platform/Broadcom/Bcm283x/AcpiTables/Uart.asl
> @@ -0,0 +1,155 @@
> +/** @file
> + *
> + * [DSDT] Serial devices (UART).
> + *
> + * Copyright (c) 2018, Andrey Warkentin <andrey.warkentin@gmail.com>
> + * Copyright (c) Microsoft Corporation. All rights reserved.
> + *
> + * This program and the accompanying materials
> + * are licensed and made available under the terms and conditions of the BSD License
> + * which accompanies this distribution. The full text of the license may be found at
> + * http://opensource.org/licenses/bsd-license.php
> + *
> + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> + *
> + **/
> +
> +//
> +// Description: This is the PL011 based UART.
> +//
> +
> +Device (URT0)
> +{
> + Name (_HID, "BCM2837")
> + Name (_CID, "HID3123")
> + Name (_UID, 0x4)
> + Method (_STA)
> + {
> + Return(0xf)
> + }
> + Method (_CRS, 0x0, Serialized) {
> + Name (RBUF, ResourceTemplate () {
> + MEMORY32FIXED(ReadWrite, 0x3F201000, 0x1000, )
> + Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 0x59 }
> + })
> + Return(RBUF)
> + }
> +
> + Name (CLCK, 3000000)
> +
> + Name (_DSD, Package () {
> + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> + Package () {
> + Package (2) { "clock-frequency", CLCK },
> + }
> + })
> +}
> +
> +//
> +// Description: UART Mini.
> +//
> +// This device is referenced in the DBG2 table, which will cause the system to
> +// not start the driver when the debugger is enabled and to mark the device
> +// with problem code 53 (CM_PROB_USED_BY_DEBUGGER).
> +//
> +
> +Device (URTM)
> +{
> + Name (_HID, "BCM2836")
> + Name (_CID, "MINIUART")
> + Name (_UID, 0x0)
> + Method (_STA)
> + {
> + Return(0xf)
> + }
> + Method (_CRS, 0x0, Serialized) {
> + Name (RBUF, ResourceTemplate () {
> + MEMORY32FIXED(ReadWrite, 0x3F215000, 0x70, )
> + Interrupt(ResourceConsumer, Level, ActiveHigh, Shared) {0x3D}
> +
> + // NTRAID#MSFT-7141401-2016/04/7-jordanrh - disable UART muxing
> + // until a proper solution can be created for the dmap conflict.
> + // When muxing is enabled, must consider DBG2 table conflict.
> + // The alternate function resource needs to be reserved when
> + // the kernel debugger is enabled to prevent another client
> + // from muxing the pins away.
> +
> + //
> + // MsftFunctionConfig is encoded as the VendorLong.
> + //
> + // MsftFunctionConfig(Exclusive, PullDown, BCM_ALT5, "\\_SB.GPI0", 0, ResourceConsumer, ) {14, 15}
> + // VendorLong () // Length = 0x31
> + // {
> + // /* 0000 */ 0x00, 0x60, 0x44, 0xD5, 0xF3, 0x1F, 0x11, 0x60, // .`D....`
> + // /* 0008 */ 0x4A, 0xB8, 0xB0, 0x9C, 0x2D, 0x23, 0x30, 0xDD, // J...-#0.
> + // /* 0010 */ 0x2F, 0x8D, 0x1D, 0x00, 0x01, 0x10, 0x00, 0x02, // /.......
> + // /* 0018 */ 0x02, 0x00, 0x12, 0x00, 0x00, 0x16, 0x00, 0x20, // .......
> + // /* 0020 */ 0x00, 0x00, 0x00, 0x0E, 0x00, 0x0F, 0x00, 0x5C, // .......\
> + // /* 0028 */ 0x5F, 0x53, 0x42, 0x2E, 0x47, 0x50, 0x49, 0x30, // _SB.GPI0
> + // /* 0030 */ 0x00 // .
> + //}
> +
> + })
> + Return(RBUF)
> + }
> +}
> +
> +//
> +// Multifunction serial bus device to support Bluetooth function.
> +//
> +
> +Device(BTH0)
> +{
> + Name (_HID, "BCM2EA6")
> + Name (_CID, "BCM2EA6")
> + Method (_STA)
> + {
> + Return(0xf)
> + }
> + Method (_CRS, 0x0, Serialized) {
> + Name (RBUF, ResourceTemplate () {
> + //
> + // BT UART: UART0 (PL011)
> + //
> + UARTSerialBus(
> + 115200, // InitialBaudRate: in BPS
> + , // BitsPerByte: default to 8 bits
> + , // StopBits: Defaults to one bit
> + 0x00, // LinesInUse: 8 1-bit flags to
> + // declare enabled control lines.
> + // Raspberry Pi does not exposed
> + // HW control signals -> not supported.
> + // Optional bits:
> + // - Bit 7 (0x80) Request To Send (RTS)
> + // - Bit 6 (0x40) Clear To Send (CTS)
> + // - Bit 5 (0x20) Data Terminal Ready (DTR)
> + // - Bit 4 (0x10) Data Set Ready (DSR)
> + // - Bit 3 (0x08) Ring Indicator (RI)
> + // - Bit 2 (0x04) Data Carrier Detect (DTD)
> + // - Bit 1 (0x02) Reserved. Must be 0.
> + // - Bit 0 (0x01) Reserved. Must be 0.
> + , // IsBigEndian:
> + // default to LittleEndian.
> + , // Parity: Defaults to no parity
> + , // FlowControl: Defaults to
> + // no flow control.
> + 16, // ReceiveBufferSize
> + 16, // TransmitBufferSize
> + "\\_SB.URT0", // ResourceSource:
> + // UART bus controller name
> + , // ResourceSourceIndex: assumed to be 0
> + , // ResourceUsage: assumed to be
> + // ResourceConsumer
> + UAR0, // DescriptorName: creates name
> + // for offset of resource descriptor
> + ) // Vendor data
> +
> + //
> + // RPIQ connection for BT_ON/OFF
> + //
> + GpioIO(Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.RPIQ", 0, ResourceConsumer, , ) { 128 }
> + })
> + Return(RBUF)
> + }
> +}
> --
> 2.17.0.windows.1
>
next prev parent reply other threads:[~2018-12-12 20:52 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-10 12:38 [PATCH v2 edk2-platforms 00/20] Platform/Broadcom: Add Raspberry Pi 3 support Pete Batard
2018-12-10 12:38 ` [PATCH v2 edk2-platforms 01/20] Platform/Broadcom/RPi3: Add Reset and Memory Init libraries Pete Batard
2018-12-12 20:43 ` Ard Biesheuvel
2018-12-13 10:48 ` Pete Batard
2018-12-10 12:38 ` [PATCH v2 edk2-platforms 02/20] Platform/Broadcom/RPi3: Add Platform library Pete Batard
2018-12-10 12:38 ` [PATCH v2 edk2-platforms 03/20] Platform/Broadcom/RPi3: Add GPIO and RTC libraries Pete Batard
2018-12-12 20:50 ` Ard Biesheuvel
2018-12-13 10:49 ` Pete Batard
2018-12-13 10:55 ` Leif Lindholm
2018-12-10 12:38 ` [PATCH v2 edk2-platforms 04/20] Platform/Broadcom/RPi3: Add ACPI Tables Pete Batard
2018-12-12 20:52 ` Ard Biesheuvel [this message]
2018-12-13 10:49 ` Pete Batard
2018-12-10 12:38 ` [PATCH v2 edk2-platforms 05/20] Platform/Broadcom/RPi3: Add Boot Manager library Pete Batard
2018-12-12 20:56 ` Ard Biesheuvel
2018-12-10 12:38 ` [PATCH v2 edk2-platforms 06/20] Platform/Broadcom/RPi3: Add Interrupt and Device Tree drivers Pete Batard
2018-12-12 21:09 ` Ard Biesheuvel
2018-12-13 10:49 ` Pete Batard
2018-12-10 12:38 ` [PATCH v2 edk2-platforms 07/20] Platform/Broadcom/RPi3: Add Firmware driver Pete Batard
2018-12-12 21:17 ` Ard Biesheuvel
2018-12-13 10:49 ` Pete Batard
2018-12-10 12:38 ` [PATCH v2 edk2-platforms 08/20] Platform/Broadcom/RPi3: Add Display driver Pete Batard
2018-12-14 15:06 ` Ard Biesheuvel
2018-12-10 12:38 ` [PATCH v2 edk2-platforms 09/20] Platform/Broadcom/RPi3: Add Graphic Console driver Pete Batard
2018-12-14 15:31 ` Ard Biesheuvel
2018-12-10 12:38 ` [PATCH v2 edk2-platforms 10/20] Platform/Broadcom/RPi3: Add Base MMC driver Pete Batard
2018-12-10 12:38 ` [PATCH v2 edk2-platforms 11/20] Platform/Broadcom/RPi3: Add Arasan " Pete Batard
2018-12-10 12:38 ` [PATCH v2 edk2-platforms 12/20] Platform/Broadcom/RPi3: Add SD Host driver Pete Batard
2018-12-10 12:38 ` [PATCH v2 edk2-platforms 13/20] Platform/Broadcom/RPi3: Add SMBIOS driver Pete Batard
2018-12-14 15:36 ` Ard Biesheuvel
2018-12-10 12:38 ` [PATCH v2 edk2-platforms 14/20] Platform/Broadcom/RPi3: Add NV Storage driver Pete Batard
2018-12-10 12:38 ` [PATCH v2 edk2-platforms 15/20] Platform/Broadcom/RPi3: Add Platform Config driver Pete Batard
2018-12-10 12:38 ` [PATCH v2 edk2-platforms 16/20] Platform/Broadcom/RPi3: Add Raspberry Pi 3 Platform Pete Batard
2018-12-14 15:39 ` Ard Biesheuvel
2018-12-14 16:21 ` Pete Batard
2018-12-10 12:38 ` [PATCH v2 edk2-platforms 17/20] Platform/Broadcom/RPi3 *NON-OSI*: Add ATF binaries Pete Batard
2018-12-10 12:38 ` [PATCH v2 edk2-platforms 18/20] Platform/Broadcom/RPi3 *NON-OSI*: Add Device Tree binaries Pete Batard
2018-12-10 12:38 ` [PATCH v2 edk2-platforms 19/20] Platform/Broadcom/RPi3 *NON-OSI*: Add USB Host driver Pete Batard
2018-12-10 12:38 ` [PATCH v2 edk2-platforms 20/20] Platform/Broadcom/RPi3 *NON-OSI*: Add Logo driver Pete Batard
2018-12-11 18:10 ` [PATCH v2 edk2-platforms 00/20] Platform/Broadcom: Add Raspberry Pi 3 support Leif Lindholm
2018-12-11 20:16 ` Pete Batard
2018-12-11 21:20 ` Ard Biesheuvel
2018-12-12 18:32 ` Leif Lindholm
2018-12-12 19:53 ` Pete Batard
2018-12-12 20:01 ` Leif Lindholm
2018-12-14 16:14 ` Philippe Mathieu-Daudé
2018-12-14 16:36 ` Leif Lindholm
2018-12-14 17:08 ` Pete Batard
2018-12-14 18:41 ` Leif Lindholm
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