From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-io0-x22e.google.com (mail-io0-x22e.google.com [IPv6:2607:f8b0:4001:c06::22e]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 93DF821A04830 for ; Tue, 2 May 2017 03:14:34 -0700 (PDT) Received: by mail-io0-x22e.google.com with SMTP id a103so150606612ioj.1 for ; Tue, 02 May 2017 03:14:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=iueFtKF+/XnS4hRj/8ZTNQOWBMtkFFQ3G0Buy4B7f0I=; b=h/3jldglU91DRnN3rSBFji7744R7clE3Rrvj/kP18IlWxWQg0vB0mlpngMiHSWBTji Rpimg7wcU5PLdy5xn7tWHlocAU4EVfbfItIjwk6Q+eB9xbP5WOKe+DK9NV2wAUL40MMj RGkCshQCpcMB68zraES1G7E1wvy+DM/7/YTLg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=iueFtKF+/XnS4hRj/8ZTNQOWBMtkFFQ3G0Buy4B7f0I=; b=h27nGnQ/Fh7M/qqJ3xJ2p/C+wAy9twrjFCKZkQLk4/IcNBaFnAJPLskA8BxwoJoDMm xtBYrMpNza+bZKk6bNb1YKWxJdRHn8h6r9MqOUfOz99pZ4BsrFByW+eia7UeN5sDld2p CHt6YeYTRAGdFuZdgnNLgj+sI7re7PARthFbY3kv9zvXpgC3+EOQ9z/HC9f12iGypg+b AlxhY3W6SSqGrJ21VKXWX00b0mJfsFv7AZBOapIoKjCmbdHKe54a1ArXCGE0oN6gTQfx SL89OjWVX2KCYJpXYSw8Z0QfeT2CM7+zbaGEfaBRy0qkEmBWEL7dC80D4ZWkuNsgkjvz FaeQ== X-Gm-Message-State: AN3rC/6nXNZ+JvxpLEU+/J/hWUFmlymghlw9Yr4PDMEfXUNhIqZk3hxI sZSE/u+Yuj9ZfHQGqhuzTco2BsAAXHNx X-Received: by 10.107.175.78 with SMTP id y75mr30864829ioe.87.1493720073612; Tue, 02 May 2017 03:14:33 -0700 (PDT) MIME-Version: 1.0 Received: by 10.107.201.76 with HTTP; Tue, 2 May 2017 03:14:33 -0700 (PDT) In-Reply-To: <1493473694-5064-1-git-send-email-jiewen.yao@intel.com> References: <1493473694-5064-1-git-send-email-jiewen.yao@intel.com> From: Ard Biesheuvel Date: Tue, 2 May 2017 11:14:33 +0100 Message-ID: To: Jiewen Yao Cc: "edk2-devel@lists.01.org" , Ruiyu Ni , Leo Duran , Brijesh Singh Subject: Re: [RFC] [PATCH V4 0/3] Add IOMMU support. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 May 2017 10:14:34 -0000 Content-Type: text/plain; charset=UTF-8 On 29 April 2017 at 14:48, Jiewen Yao wrote: > ================ V4 ============== > Refine the EDKII_IOMMU_PROTOCOL. > > 1) Add AllocateBuffer/FreeBuffer/Map/Unmap() API. > They are similar to DmaLib in EmbeddedPkg and > similar to the previous BmDmaLib (by leo.duran@amd.com). > > These APIs are invoked by PciHostBridge driver > to allocate DMA memory. > > The PciHostBridge driver (IOMMU consumer) is simplified: > It uses IOMMU, if IOMMU protocol is present. > Else it uses original logic. > > 2) Add SetMappingAttribute() API. > It is similar to SetAttribute() API in V1. > > This API is invoked by PciBus driver to set DMA > access attribute (read/write) for device. > > The PciBus driver (IOMMU consumer) is simplified: > It sets access attribute in Map/Unmap, > if IOMMU protocol is present. > > 3) Remove SetRemapAddress/GetRemapAddress() API. > Because PciHostBridge/PciBus can call the APIs defined > above, there is no need to provide remap capability. > > -- Sample producer drivers: > 1) The sample VTd driver (IOMMU producer) > is at https://github.com/jyao1/edk2/tree/dma_v4/IntelSiliconPkg/IntelVTdDxe > > It is added to show the concept. It is not fully implemented yet. > It will not be checked in in this patch. > > 2) The sample AMD SEV driver (IOMMU producer) > is at https://github.com/jyao1/edk2/tree/dma_v4/IntelSiliconPkg/SampleAmdSevDxe > (code is borrowed from leo.duran@amd.com and brijesh.singh@amd.com) > > This is not a right place to put this driver. > > It is added to show the concept. > It is not fully implemented. It will not be checked in. > Please do not use it directly. > > 3) The sample STYX driver (IOMMU producer) > is at https://github.com/jyao1/edk2/tree/dma_v4/IntelSiliconPkg/SampleStyxDxe > (code is borrowed from ard.biesheuvel@linaro.org) > > This is not a right place to put this driver. > > It is added to show the concept. > It is not fully implemented. It will not be checked in. > Please do not use it directly. > With the issue in 3/3 addressed: Tested-by: Ard Biesheuvel on AMD Seattle, with a static remapping driver that I will send out shortly. I am quite happy with this version, but I would like to continue the discussion as to whether we really need SetAttribute() and SetMappingAttribute() -- Ard. > > ================ V3 ============== > 1) Add Remap capability (from Ard Biesheuvel) > Add EDKII_IOMMU_REMAP_ADDRESS API in IOMMU_PROTOCOL. > > NOTE: The code is not fully validated yet. > The purpose is to collect feedback to decide the next step. > > ================ V2 ============== > 1) Enhance Unmap() in PciIo (From Ruiyu Ni) > Maintain a local list of MapInfo and match it in Unmap. > > 2) CopyMem for ReadOperation in PciIo after SetAttribute (Leo Duran) > Fix a bug in V1 that copy mem for read happen before SetAttribute, > which will break AMD SEV solution. > > ================ V1 ============== > > This patch series adds IOMMU protocol and updates the consumer > to support IOMMU based DMA access in UEFI. > > This patch series can support the BmDmaLib request for AMD SEV. > submitted by Duran, Leo and Brijesh Singh . > https://lists.01.org/pipermail/edk2-devel/2017-March/008109.html, and > https://lists.01.org/pipermail/edk2-devel/2017-March/008820.html. > We can have an AMD SEV specific IOMMU driver to produce IOMMU protocol, > and clear SEV in IOMMU->SetAttribute(). > > This patch series can also support Intel VTd based DMA protection, > requested by Jiewen Yao , discussed in > https://lists.01.org/pipermail/edk2-devel/2017-March/008157.html. > We can have an Intel VTd specific IOMMU driver to produce IOMMU protocol, > and update VTd engine to grant or deny access in IOMMU->SetAttribute(). > > This patch series does not provide a full Intel VTd driver, which > will be provide in other patch in the future. > > The purpose of this patch series to review if this IOMMU protocol design > can meet all DMA access and management requirement. > > Cc: Ruiyu Ni > Cc: Leo Duran > Cc: Brijesh Singh > Cc: Ard Biesheuvel > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Jiewen Yao > > Jiewen Yao (3): > MdeModulePkg/Include: Add IOMMU protocol definition. > MdeModulePkg/PciHostBridge: Add IOMMU support. > MdeModulePkg/PciBus: Add IOMMU support. > > MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c | 9 + > MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | 1 + > MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf | 1 + > MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c | 37 +++ > MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c | 37 +++ > MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf | 2 + > MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridge.h | 2 + > MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c | 61 ++++ > MdeModulePkg/Include/Protocol/IoMmu.h | 310 ++++++++++++++++++++ > MdeModulePkg/MdeModulePkg.dec | 3 + > 10 files changed, 463 insertions(+) > create mode 100644 MdeModulePkg/Include/Protocol/IoMmu.h > > -- > 2.7.4.windows.1 >