From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c06::241; helo=mail-io0-x241.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-io0-x241.google.com (mail-io0-x241.google.com [IPv6:2607:f8b0:4001:c06::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id F2851207E4E03 for ; Thu, 24 May 2018 05:27:44 -0700 (PDT) Received: by mail-io0-x241.google.com with SMTP id e20-v6so2042288iof.4 for ; Thu, 24 May 2018 05:27:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=mm8PhquBNcM2kPNjJjXmeulL+6rlupMcyE+Kac7IK0k=; b=QqfWdwl3EdSJ206kq3ltVa0SdYc9lPutez23l0pBdDeR04ObHnHKafY2Tewg3ilPw2 nknOLs84A6th8SmD1oE2jgwQDc/Bm6jbHIjjW54nNN2sn4kjPVAnEj7nryHA/mAL8FF5 ZzEKuGXkbhKt4glIyxCWP3c7Vk78jHriNT5Ig= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=mm8PhquBNcM2kPNjJjXmeulL+6rlupMcyE+Kac7IK0k=; b=McOkRJnWZRhgNcQdx8BNwguyC/xv2JF3k17/TsUW6M2Kz1dZbzQkyuhsmNOLZP3vmw 1PUaYfJfJXz3gUO9VkcJUMfEZ7GlSpj9gtokZaAGRhIgFGbdv0KIwxcjpmhmNnYHIko/ qUz1FwPXZIG4OGtGrx/8XkEFYlbyGth9m/HiUEDtpVtOQYFjdJV7cCL4oRgB6KUIrb8Y Hic2gwHySv/nX5PEoM7AEnH79P6zDkBw6tEdZB5/M9p7ebqs+jDT7Qw2L/LYF/7AM1nK gR6iDQ56QTDS0E/nElmV+ddBp+0vNtkumxguFfg8pWv41kf4oQAjIqxTLCNj1peKK/fr AW2A== X-Gm-Message-State: ALKqPwfNcEUd9xurKJTkb/R3GtcrYrcIBnOkdXZ+YKEGmjrxcp41KnfQ 9S/QA+BSUSUBbspq4j2AUjfm+Ln8t7W/jy+Y3YULLg== X-Google-Smtp-Source: ADUXVKK4TS0/UclOjaOpOYe1JTcJKKrucRfVloVuuDpiOBb+l9yW1u8806kGJBIQbgoP85YCJaFEsGPKF4+0nh5o+kE= X-Received: by 2002:a6b:978e:: with SMTP id z136-v6mr6782587iod.60.1527164863804; Thu, 24 May 2018 05:27:43 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a6b:bb86:0:0:0:0:0 with HTTP; Thu, 24 May 2018 05:27:43 -0700 (PDT) In-Reply-To: <1527054343-2125-1-git-send-email-thomas.abraham@arm.com> References: <1527054343-2125-1-git-send-email-thomas.abraham@arm.com> From: Ard Biesheuvel Date: Thu, 24 May 2018 14:27:43 +0200 Message-ID: To: Thomas Abraham Cc: "edk2-devel@lists.01.org" , Leif Lindholm Subject: Re: [PATCH edk2-platforms v6 0/9] Platform/ARM/Sgi: Add Arm's SGI platform support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 24 May 2018 12:27:45 -0000 Content-Type: text/plain; charset="UTF-8" On 23 May 2018 at 07:45, Thomas Abraham wrote: > Changes since v5: > - removed 'Change-Id' from all the patches in this series. > > Changes since v4: > - addressed all the review comments from Ard and Alexei > > Changes since v3: > - adds support for SMSC9118 ethernet controller > - adds support for PCIe and SATA controller to enable SATA disk access > > Changes since v2: > - addressed all the comments from Ard. > - PrePeiCore is used instead of PrePi. > > Changes since v1: > - minor update to commit messages > > Arm CoreLink System Guidance for Infrastructure is a collection of > resources to provide a representative view of typical compute subsystems > that can be designed and implemented using specific generations of Arm IP. > These compute subsystems address the expected requirements of a specific > segment of the infrastructure market which includes servers, storage and > networking. > > This patch series adds initial platform port support for Arm'S SGI-575 > platform. This platform has 8x Cortex-A75 CPUs, supports DynamIQ > with L3 cache options, supports 2x DDR4-3200 (DMC-620) memory controller > and is SBSAv3 compliant. This series includes support for GIC, Serial, > smsc91x and virtio block device. > > Daniil Egranov (4): > Platform/ARM/Sgi: add initial platform dxe driver implementation > Platform/ARM/Sgi: add support for virtio block device > Platform/ARM/Sgi: add the initial set of acpi tables > Platform/ARM/Sgi: add support for smsc91x ethernet controller > > Thomas Abraham (3): > Platform/ARM/Sgi: Add Platform library implementation > Platform/ARM/Sgi: implement PciHostBridgeLib support > Platform/ARM/Sgi: Add Ssdt, Iort and Mcfg tables > > Vishwanatha HG (2): > Platform/ARM/Sgi: add NOR flash platform library implementation > Platform/ARM/Sgi: add initial support for ARM SGI platform > For the series Reviewed-by: Ard Biesheuvel Pushed as e174fc77d3bb..eecb5e2f58a9 Thanks,