From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::d41; helo=mail-io1-xd41.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-io1-xd41.google.com (mail-io1-xd41.google.com [IPv6:2607:f8b0:4864:20::d41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E72B021197073 for ; Fri, 30 Nov 2018 03:03:31 -0800 (PST) Received: by mail-io1-xd41.google.com with SMTP id l14so4183477ioj.5 for ; Fri, 30 Nov 2018 03:03:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=7GJyUU2EQ6SWkTMSZenlQ9Hgh/A7gFd9iK+WYQHWt/g=; b=VKZzl/+PtyblfUOGvPSXrVJOuMllvzsqUwvuMI0DbEXJXw4/r4FsRBV8yvayQL1M0p YG4zXRTJ28ATUv0Y81yhxgmemWxeiGfPa8+0G8QgezqJWvHPbcmcMCLWp5MppUyzyU1G 1pihoAhT+vxwpcm8v32tyaPt3P+lTY3OvdHng= X-Google-DKIM-Signature: v=1; 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charset="UTF-8" On Fri, 30 Nov 2018 at 12:00, Leif Lindholm wrote: > > On Fri, Nov 30, 2018 at 11:55:03AM +0100, Ard Biesheuvel wrote: > > gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize will be removed, so > > drop any overrides from the platforms in edk2-platforms. > > > > Contributed-under: TianoCore Contribution Agreement 1.1 > > Signed-off-by: Ard Biesheuvel > > Reviewed-by: Leif Lindholm > Thanks Pushed as 77ae8610df3e..07c6bc27730d > > --- > > Silicon/Hisilicon/Hisilicon.dsc.inc | 1 - > > Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 1 - > > Platform/AMD/OverdriveBoard/OverdriveBoard.dsc | 5 ----- > > Platform/ARM/SgiPkg/SgiPlatform.dsc | 1 - > > Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc | 3 --- > > Platform/Comcast/RDKQemu/RDKQemu.dsc | 4 ---- > > Platform/Hisilicon/D06/D06.dsc | 1 - > > Platform/LeMaker/CelloBoard/CelloBoard.dsc | 5 ----- > > Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 1 - > > Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc | 1 - > > Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc | 5 ----- > > 11 files changed, 28 deletions(-) > > > > diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisilicon.dsc.inc > > index 3ac8e202322d..63d28a57406b 100644 > > --- a/Silicon/Hisilicon/Hisilicon.dsc.inc > > +++ b/Silicon/Hisilicon/Hisilicon.dsc.inc > > @@ -253,7 +253,6 @@ > > gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE > > > > [PcdsFixedAtBuild.common] > > - gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|44 > > # > > # IO is mapped to memory space, so we use the same size of > > # PcdPrePiCpuMemorySize > > diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc > > index 14a1bda7b8b4..b3fd1846c0bf 100644 > > --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc > > +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc > > @@ -375,7 +375,6 @@ > > gArmTokenSpaceGuid.PcdSystemMemorySize|0x40000000 > > > > gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|36 > > - gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|36 > > > > gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x41F0000 > > gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000 > > diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc > > index 51327a67dffb..b062f671f57f 100644 > > --- a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc > > +++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc > > @@ -385,11 +385,6 @@ DEFINE DO_CAPSULE = FALSE > > # Size of the region used by UEFI in permanent memory (Reserved 64MB) > > gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000 > > > > - # 40 bits of VA space is sufficient to support up to 512 GB of RAM in the > > - # range 0x80_0000_0000 - 0xFF_FFFF_FFFF (all platform and PCI MMIO is below > > - # that) > > - gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40 > > - > > # > > # ARM PrimeCell > > # > > diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc b/Platform/ARM/SgiPkg/SgiPlatform.dsc > > index 68249add3127..52ca796a4f28 100644 > > --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc > > +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc > > @@ -145,7 +145,6 @@ > > gArmTokenSpaceGuid.PcdPciMmio64Translation|0x0 > > gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x60000000 > > gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|24 > > - gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40 > > > > ## PL011 - Serial Terminal > > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x7FF80000 > > diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc > > index d20f1a738710..7094e57ee13a 100644 > > --- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc > > +++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc > > @@ -159,9 +159,6 @@ > > # Set tick frequency value to 100Mhz > > gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|100000000 > > > > - # the entire FVP address space can be covered by 36 bit VAs > > - gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|36 > > - > > # > > # ACPI Table Version > > # > > diff --git a/Platform/Comcast/RDKQemu/RDKQemu.dsc b/Platform/Comcast/RDKQemu/RDKQemu.dsc > > index b36c7cb7842f..f22f14aed99d 100644 > > --- a/Platform/Comcast/RDKQemu/RDKQemu.dsc > > +++ b/Platform/Comcast/RDKQemu/RDKQemu.dsc > > @@ -154,10 +154,6 @@ > > gRdkTokenSpaceGuid.PcdRdkConfFileDevicePath|L"PciRoot(0x0)/Pci(0x2,0x0)" > > > > [PcdsFixedAtBuild.AARCH64] > > - # KVM limits it IPA space to 40 bits (1 TB), so there is no need to > > - # support anything bigger, even if the host hardware does > > - gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40 > > - > > # Clearing BIT0 in this PCD prevents installing a 32-bit SMBIOS entry point, > > # if the entry point version is >= 3.0. AARCH64 OSes cannot assume the > > # presence of the 32-bit entry point anyway (because many AARCH64 systems > > diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc > > index 742fe30b62c3..396bd03c9d24 100644 > > --- a/Platform/Hisilicon/D06/D06.dsc > > +++ b/Platform/Hisilicon/D06/D06.dsc > > @@ -128,7 +128,6 @@ > > > > [PcdsFixedAtBuild.common] > > gArmPlatformTokenSpaceGuid.PcdCoreCount|48 > > - gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|48 > > > > gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000 > > > > diff --git a/Platform/LeMaker/CelloBoard/CelloBoard.dsc b/Platform/LeMaker/CelloBoard/CelloBoard.dsc > > index e63cda1af99a..103c2fb74114 100644 > > --- a/Platform/LeMaker/CelloBoard/CelloBoard.dsc > > +++ b/Platform/LeMaker/CelloBoard/CelloBoard.dsc > > @@ -375,11 +375,6 @@ DEFINE DO_FLASHER = FALSE > > # Size of the region used by UEFI in permanent memory (Reserved 64MB) > > gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000 > > > > - # 40 bits of VA space is sufficient to support up to 512 GB of RAM in the > > - # range 0x80_0000_0000 - 0xFF_FFFF_FFFF (all platform and PCI MMIO is below > > - # that) > > - gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40 > > - > > # > > # ARM PrimeCell > > # > > diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc > > index 997ea344330d..d3225125a9a6 100644 > > --- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc > > +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc > > @@ -243,7 +243,6 @@ > > gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0xFFC0 > > gSynQuacerTokenSpaceGuid.PcdDramInfoBase|0x2E00FFC0 > > > > - gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40 > > gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|24 > > > > gArmPlatformTokenSpaceGuid.PcdCoreCount|2 > > diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc > > index d506ca112147..8dbf836f7e29 100644 > > --- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc > > +++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc > > @@ -234,7 +234,6 @@ > > gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0xFFC0 > > gSynQuacerTokenSpaceGuid.PcdDramInfoBase|0x2E00FFC0 > > > > - gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40 > > gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|24 > > > > # 12x 2-core processor clusters > > diff --git a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc > > index 4cfbe1985854..1927ef3ebafb 100644 > > --- a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc > > +++ b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc > > @@ -368,11 +368,6 @@ DEFINE DO_FLASHER = FALSE > > # Size of the region used by UEFI in permanent memory (Reserved 64MB) > > gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000 > > > > - # 40 bits of VA space is sufficient to support up to 512 GB of RAM in the > > - # range 0x80_0000_0000 - 0xFF_FFFF_FFFF (all platform and PCI MMIO is below > > - # that) > > - gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40 > > - > > # > > # ARM PrimeCell > > # > > -- > > 2.19.1 > >