From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: Guo Heyi <heyi.guo@linaro.org>
Cc: Leif Lindholm <leif.lindholm@linaro.org>,
"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>,
Michael D Kinney <michael.d.kinney@intel.com>,
Haojian Zhuang <haojian.zhuang@linaro.org>
Subject: Re: [PATCH edk2-platforms 00/12] Hisilicon/D0x: Switch to generic PciHostBridge
Date: Fri, 13 Apr 2018 09:19:53 +0200 [thread overview]
Message-ID: <CAKv+Gu_5nAxPbLP4PNQJ9PWt1x9N60GKxzL6wjMsO25hNcpHSg@mail.gmail.com> (raw)
In-Reply-To: <20180413020553.GB119834@SZX1000114654>
On 13 April 2018 at 04:05, Guo Heyi <heyi.guo@linaro.org> wrote:
> Hi Ard,
>
> Any comments?
>
Apologies for the delay. I have been travelling and am behind on email.
> Anyway we can modify the code if you insist on using an intermediate CPU IO
> address space.
>
I have not made up my mind yet, to be honest. I agree there is a
certain elegance to merging both translations, but I am concerned that
existing EDK2 code may deal poorly with I/O addresses that require
more than 32 bits to express.
Did you try the mm command in the shell for instance? As you know, I
recently removed an artificial address range limit there, but I wonder
if it uses 64-bit variables for I/O ports.
next prev parent reply other threads:[~2018-04-13 7:19 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-21 1:03 [PATCH edk2-platforms 00/12] Hisilicon/D0x: Switch to generic PciHostBridge Heyi Guo
2018-03-21 1:03 ` [PATCH edk2-platforms 01/12] Hisilicon: Enable WARN and INFO debug message Heyi Guo
2018-03-21 1:03 ` [PATCH edk2-platforms 02/12] Hisilicon/D05/PlatformPciLib: fix misuse of macro Heyi Guo
2018-03-21 1:03 ` [PATCH edk2-platforms 03/12] Hisilicon/Pci: move ATU configuration to PcieInitDxe Heyi Guo
2018-03-30 15:19 ` Ard Biesheuvel
2018-03-21 1:03 ` [PATCH edk2-platforms 04/12] Hisilicon/Pci: Merge PciPlatform into PcieInit Driver Heyi Guo
2018-03-21 1:03 ` [PATCH edk2-platforms 05/12] Hisilicon/Pci: Move EnlargeAtuConfig0() to PcieInitDxe Heyi Guo
2018-03-21 1:03 ` [PATCH edk2-platforms 06/12] Hisilicon/PlatformPciLib: add segment for each root bridge Heyi Guo
2018-03-21 1:03 ` [PATCH edk2-platforms 07/12] Hisilicon: add PciHostBridgeLib Heyi Guo
2018-03-30 15:28 ` Ard Biesheuvel
2018-03-21 1:03 ` [PATCH edk2-platforms 08/12] Hisilicon: add PciCpuIo2Dxe Heyi Guo
2018-03-30 15:30 ` Ard Biesheuvel
2018-03-21 1:03 ` [PATCH edk2-platforms 09/12] Hisilicon: add PciSegmentLib for Hi161x Heyi Guo
2018-03-21 1:03 ` [PATCH edk2-platforms 10/12] Hisilicon/D0x: Switch to generic PciHostBridge driver Heyi Guo
2018-03-30 15:34 ` Ard Biesheuvel
2018-03-21 1:03 ` [PATCH edk2-platforms 11/12] Hisilicon: remove platform specific PciHostBridge Heyi Guo
2018-03-30 15:37 ` Ard Biesheuvel
2018-03-21 1:03 ` [PATCH edk2-platforms 12/12] Hisilicon/PlatformPciLib: clear redundant felds in RESOURCE_APPETURE Heyi Guo
2018-03-28 1:05 ` [PATCH edk2-platforms 00/12] Hisilicon/D0x: Switch to generic PciHostBridge Guo Heyi
2018-03-28 9:43 ` Ard Biesheuvel
2018-03-29 0:20 ` Guo Heyi
2018-03-30 15:40 ` Ard Biesheuvel
2018-03-31 1:37 ` Guo Heyi
2018-04-13 2:05 ` Guo Heyi
2018-04-13 7:19 ` Ard Biesheuvel [this message]
2018-04-16 13:57 ` Guo Heyi
2018-04-17 1:20 ` Guo Heyi
2018-04-17 1:44 ` Guo Heyi
2018-05-31 1:02 ` heyi.guo
2018-06-07 11:11 ` Ard Biesheuvel
2018-06-22 12:58 ` gary guo
2018-06-22 14:08 ` Ard Biesheuvel
2018-06-24 11:22 ` Ard Biesheuvel
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