From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::144; helo=mail-it1-x144.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-it1-x144.google.com (mail-it1-x144.google.com [IPv6:2607:f8b0:4864:20::144]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 190852116370A for ; Mon, 8 Oct 2018 06:43:42 -0700 (PDT) Received: by mail-it1-x144.google.com with SMTP id 134-v6so11484698itz.2 for ; Mon, 08 Oct 2018 06:43:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=B1+IigY4eWaONqIsZo9HyzwaS9ESqNSJ9Fy68urqrOg=; b=ky8O9ip3Pf1n5guUl9rW0dIpxvMcl1QQpIpbRLPQIqvreOx7lO2Li9IJm9DJ5KEC+b 89HoQ4N76yE5/5GbkX6RfQJ5sdGwDJ1uYlp3IP9JXvIY6348xnRtlqZ7i9zkQ0olBFWz Kp2TFC1h/sjA5/C6jhtrkjHGJOoP7yIF18uGA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=B1+IigY4eWaONqIsZo9HyzwaS9ESqNSJ9Fy68urqrOg=; b=inusTdILESO09pfSnbdskQybz/zNGtmy5uOMJvaeeFA0y4E/vuBIcOit70HctI5knN kR8EsBysztoB6ct889NgYammnE+DMkFpBgh1R8f9Mn2W9SF7nFhPfWzGOLi8DWQZbtCj vaYknboHb6Hk58mf4yVOnqc6OGBTNmrO/BqbHzDUk2Bwf0jsnYyKlqoo/v8biUf2Eb9B 9k+mq3JG+44hHR5+QgskOEaQEyGtY9CRlC1DARkzKrCIqbl73QGvnhCaOffLWMkDawjf aMhJOgnjjDTkgcCxfEV+l64Vua194P34izo3yhi/3vP5wD0yNcOFpDSg2PaVFk9wKZ0j ROxA== X-Gm-Message-State: ABuFfojUEswHz8O7lV4PWBA1X7v5YqxNPkkIiuWDSm0G38ZzfMroqDd9 cyUHyc/tiM0PeqKbeCUSdcgMcJjUAbaP1W7G2vFB/g== X-Google-Smtp-Source: ACcGV60EEfOG61eEWU9AM94KcHt7YmMhkRx3rgB2orEO5pHSKs1TMJorRU3D55B8nvfVH1XG+a5MiBT8Nstwc0KTq/Y= X-Received: by 2002:a24:a10b:: with SMTP id y11-v6mr12741505ite.148.1539006221768; Mon, 08 Oct 2018 06:43:41 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a6b:5910:0:0:0:0:0 with HTTP; Mon, 8 Oct 2018 06:43:40 -0700 (PDT) In-Reply-To: References: <1538745911-22484-1-git-send-email-mw@semihalf.com> <1538745911-22484-3-git-send-email-mw@semihalf.com> From: Ard Biesheuvel Date: Mon, 8 Oct 2018 15:43:40 +0200 Message-ID: To: Marcin Wojtas Cc: "Zeng, Star" , Eric Dong , "Ni, Ruiyu" , edk2-devel-01 , "Tian, Feng" , "Kinney, Michael D" , "Gao, Liming" , Leif Lindholm , "Wu, Hao A" , Nadav Haklai , "jsd@semihalf.com" , Tomasz Michalec Subject: Re: [PATCH v2 2/4] MdeModulePkg/SdMmcPciHcDxe: Add UhsSignaling to SdMmcOverride protocol X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 08 Oct 2018 13:43:43 -0000 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On 8 October 2018 at 15:37, Marcin Wojtas wrote: > pon., 8 pa=C5=BA 2018 o 15:27 Ard Biesheuvel = napisa=C5=82(a): >> >> On 8 October 2018 at 15:17, Marcin Wojtas wrote: >> > pon., 8 pa=C5=BA 2018 o 15:07 Ard Biesheuvel napisa=C5=82(a): >> >> >> >> On 8 October 2018 at 14:59, Marcin Wojtas wrote: >> >> > Hi Ard, >> >> > >> >> > pon., 8 pa=C5=BA 2018 o 14:41 Ard Biesheuvel napisa=C5=82(a): >> >> >> >> >> >> (add MdeModulePkg maintainers) >> >> >> >> >> >> On 5 October 2018 at 15:25, Marcin Wojtas wrote: >> >> >> > From: Tomasz Michalec >> >> >> > >> >> >> > Some SD Host Controlers use different values in Host Control 2 R= egister >> >> >> > to select UHS Mode. This patch adds a new UhsSignaling type rout= ine to >> >> >> > the NotifyPhase of the SdMmcOverride protocol. >> >> >> > >> >> >> > UHS signaling configuration is moved to a common, default routin= e >> >> >> > (SdMmcHcUhsSignaling), which is called when SdMmcOverride does n= ot >> >> >> > cover this functionality. >> >> >> > >> >> >> > Contributed-under: TianoCore Contribution Agreement 1.1 >> >> >> > Signed-off-by: Marcin Wojtas >> >> >> > --- >> >> >> > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h | 50 +++++++ >> >> >> > MdeModulePkg/Include/Protocol/SdMmcOverride.h | 2 + >> >> >> > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c | 153 ++++++++= ++++-------- >> >> >> > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c | 37 +++-- >> >> >> > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 69 ++++++++= + >> >> >> > 5 files changed, 243 insertions(+), 68 deletions(-) >> >> >> > >> >> >> > diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h b/= MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h >> >> >> > index e389d52..a03160d 100644 >> >> >> > --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h >> >> >> > +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h >> >> >> > @@ -63,6 +63,39 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY = KIND, EITHER EXPRESS OR IMPLIED. >> >> >> > #define SD_MMC_HC_CTRL_VER 0xFE >> >> >> > >> >> >> > // >> >> >> > +// SD Host Controler bits to HOST_CTRL2 register >> >> >> > +// >> >> >> > +#define SD_MMC_HC_CTRL_UHS_MASK 0x0007 >> >> >> > +#define SD_MMC_HC_CTRL_UHS_SDR12 0x0000 >> >> >> > +#define SD_MMC_HC_CTRL_UHS_SDR25 0x0001 >> >> >> > +#define SD_MMC_HC_CTRL_UHS_SDR50 0x0002 >> >> >> > +#define SD_MMC_HC_CTRL_UHS_SDR104 0x0003 >> >> >> > +#define SD_MMC_HC_CTRL_UHS_DDR50 0x0004 >> >> >> > +#define SD_MMC_HC_CTRL_MMC_DDR52 0x0004 >> >> >> > +#define SD_MMC_HC_CTRL_MMC_SDR50 0x0002 >> >> >> > +#define SD_MMC_HC_CTRL_MMC_SDR25 0x0001 >> >> >> > +#define SD_MMC_HC_CTRL_MMC_SDR12 0x0000 >> >> >> > +#define SD_MMC_HC_CTRL_HS200 0x0003 >> >> >> > +#define SD_MMC_HC_CTRL_HS400 0x0005 >> >> >> > + > > In case we move enums to SdMmcOverride.h, would it be desired, to move > there register fields values as well? Or should I rather use Xenon > macros for all of above locally? > No, I think the macros should be kept locally. >> >> >> > +// >> >> >> > +// Timing modes for uhs >> >> >> > +// >> >> >> > +typedef enum { >> >> >> > + SdMmcUhsSdr12, >> >> >> > + SdMmcUhsSdr25, >> >> >> > + SdMmcUhsSdr50, >> >> >> > + SdMmcUhsSdr104, >> >> >> > + SdMmcUhsDdr50, >> >> >> > + SdMmcMmcDdr52, >> >> >> > + SdMmcMmcSdr50, >> >> >> > + SdMmcMmcSdr25, >> >> >> > + SdMmcMmcSdr12, >> >> >> > + SdMmcMmcHs200, >> >> >> > + SdMmcMmcHs400, >> >> >> > +} SD_MMC_UHS_TIMING; >> >> >> > + >> >> >> >> >> >> Here, we end up with two sets of symbolic constants for the same >> >> >> thing, and I suppose this enum will be duplicated in your >> >> >> SdMmcOverride implementation? >> >> >> >> >> > >> >> > Why duplicated? Macros are for generic UHS_MODE_SEL field values fo= r >> >> > SD and MMC in HostControl2Register. >> >> > >> >> > SD_MMC_UHS_TIMING is just a timing mode indicator, it can be used n= ot >> >> > only in UhsSignaling routine (actually the next patch, with >> >> > SwitchClockFreqPost, use it...). >> >> > >> >> > In my SdMmcOverride implementation this enum is not duplicated, >> >> > because this file (SdMmcPciHci.h) is included via >> >> > Protocol/SdMmcOverride.h. >> >> > >> >> >> >> Ah ok. Please don't expose internal headers of the SD/MMC driver via >> >> Protocol/SdMmcOverride.h >> >> >> > >> > OK. >> > >> >> I think it should be fine to add the enum definition to >> >> Protocol/SdMmcOverride.h instead. >> >> >> > >> > OK. >> > >> >> But wouldn't it be much easier to have a hook for setting >> >> HostControl2Register that decodes the value and modifies it according >> >> to what the platform requires? >> >> >> > >> > Can you please explain, how it will be different from UhsSignaling in >> > current shape (read required timing value and update UHS_MODE_SEL >> > field)? >> > >> >> Well, you decode the value, and if, e.g., the SD_MMC_HC_CTRL_HS200 >> bits are set, you substitute them with the appropriate xenon values. > > Because values can be same for SD and MMC (e.g. UHS_104 and HS200), > from the controller driver perspective, how would I know, which mode > is requested? > Good point. >> >> Also, how important is it to drive the SD/MMC at its max rated speed >> at boot time? On Synquacer, I just disable HS200 in the capability >> struct so I can forget about all this stuff > > Some customers want it - a real life scenario from one of them: > applications, Linux binaries and rootfs stores in the MMC. Each boot a > couple of hundreds of MB to be loaded. Thanks to HS200 we have huge > time saving. > Do you mean in the initrd? Because otherwise, Linux will use its own driver and select its own mode. And btw, does the spec permit using different HC2 values for HS200 / HS400 = ?