* [platforms: PATCH v4 0/7] Armada7k8k Xenon driver rework
@ 2018-11-09 23:01 Marcin Wojtas
2018-11-09 23:01 ` [platforms: PATCH v4 1/7] Silicon/SynQuacer/PlatformDxe: adjust to updated SdMmcOverride Marcin Wojtas
` (6 more replies)
0 siblings, 7 replies; 14+ messages in thread
From: Marcin Wojtas @ 2018-11-09 23:01 UTC (permalink / raw)
To: edk2-devel
Cc: leif.lindholm, ard.biesheuvel, hao.a.wu, nadavh, mw, jsd, jaz,
kostap, tm
Hi,
The fourth version of the patchset removes dependency on
the internal MdeModulePkg header and reworks Capability
callback handling. Details can be found in the changelog below.
Patches are available in the github:
https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/xenon-upstream-r20181109
Generic driver patches with fixes and extended SdMmcOverride protocol:
https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/sdmmc-override-upstream-r20181109
I'm looking forward to the comments and remarks.
Best regards,
Marcin
Changelog:
v3->v4:
* 1/7:
- add Ard's RB
* 2/7:
- use local enum definition for SlotType in order not to include MdeModulePkg
private header
* 7/7:
- rework capability handling, without using the structure defined in the
MdeModulePkg header
v2->v3
* 1/7:
- rename NotifyPhase parameter to PhaseData
* 7/7:
- rename NotifyPhase parameter to PhaseData
- update UHS_MODE_SEL only for HS200/HS400
in XenonSdMmcHcUhsSignaling
- use local macros for standard SDHC registers in order not to
include private MdeModulePkg header
v1 -> v2
* 1/7 and 7/7 - adjust to modified SdMmcOverride
NotifyPhase and Capability routines
Marcin Wojtas (1):
Silicon/SynQuacer/PlatformDxe: adjust to updated SdMmcOverride
Tomasz Michalec (6):
Marvell/Library: ArmadaBoardDescLib: Extend SDMMC information
SolidRun/Armada80x0McBin: Introduce board description library
Marvell/Armada70x0Db: Introduce board description library
Marvell/Armada80x0Db: Introduce board description library
Marvell/Drivers: MvBoardDesc: Extend information for SdMmc
Marvell/Drivers: XenonDxe: Switch to use generic SdMmcPciHcDxe
Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 3 +-
Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc | 3 +
Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc | 3 +
Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc | 3 +
Silicon/Marvell/Armada7k8k/Armada7k8k.fdf | 3 +-
Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.inf | 34 +
Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.inf | 34 +
Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.inf | 34 +
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 1 +
Silicon/Marvell/Drivers/SdMmc/XenonDxe/{SdMmcPciHcDxe.inf => XenonDxe.inf} | 33 +-
Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.h | 791 --------
Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHci.h | 550 ------
Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonPciHci.h | 151 ++
Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.h | 53 +
Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.h | 131 +-
Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 22 +-
Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.c | 66 +
Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c | 66 +
Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c | 66 +
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 24 +-
Silicon/Marvell/Drivers/SdMmc/XenonDxe/ComponentName.c | 211 ---
Silicon/Marvell/Drivers/SdMmc/XenonDxe/EmmcDevice.c | 1164 ------------
Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdDevice.c | 1190 ------------
Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.c | 1320 --------------
Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHci.c | 1928 --------------------
Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonPciHci.c | 321 ++++
Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.c | 432 +++++
Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.c | 408 +++--
Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Emmc.c | 9 +-
Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.uni | 23 -
Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxeExtra.uni | 19 -
31 files changed, 1713 insertions(+), 7383 deletions(-)
create mode 100644 Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.inf
create mode 100644 Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.inf
create mode 100644 Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.inf
rename Silicon/Marvell/Drivers/SdMmc/XenonDxe/{SdMmcPciHcDxe.inf => XenonDxe.inf} (65%)
delete mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.h
delete mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHci.h
create mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonPciHci.h
create mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.h
create mode 100644 Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.c
create mode 100644 Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c
create mode 100644 Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c
delete mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/ComponentName.c
delete mode 100755 Silicon/Marvell/Drivers/SdMmc/XenonDxe/EmmcDevice.c
delete mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdDevice.c
delete mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.c
delete mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHci.c
create mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonPciHci.c
create mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.c
delete mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.uni
delete mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxeExtra.uni
--
2.7.4
^ permalink raw reply [flat|nested] 14+ messages in thread
* [platforms: PATCH v4 1/7] Silicon/SynQuacer/PlatformDxe: adjust to updated SdMmcOverride
2018-11-09 23:01 [platforms: PATCH v4 0/7] Armada7k8k Xenon driver rework Marcin Wojtas
@ 2018-11-09 23:01 ` Marcin Wojtas
2018-11-12 10:24 ` Ard Biesheuvel
2018-11-09 23:01 ` [platforms: PATCH v4 2/7] Marvell/Library: ArmadaBoardDescLib: Extend SDMMC information Marcin Wojtas
` (5 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: Marcin Wojtas @ 2018-11-09 23:01 UTC (permalink / raw)
To: edk2-devel
Cc: leif.lindholm, ard.biesheuvel, hao.a.wu, nadavh, mw, jsd, jaz,
kostap, tm
The newest changes in the SdMmcOverride protocol added additional
arguments to the NotifyPhase and Capability routines. Update
according places in the Synquacer Emmc driver.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Emmc.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Emmc.c b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Emmc.c
index e0987c9..47f5ccc 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Emmc.c
+++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Emmc.c
@@ -72,6 +72,8 @@ STATIC VOID *mEventRegistration;
@param[in] ControllerHandle The EFI_HANDLE of the controller.
@param[in] Slot The 0 based slot index.
@param[in,out] SdMmcHcSlotCapability The SDHCI capability structure.
+ @param[in,out] BaseClkFreq The base clock frequency value that
+ optionally can be updated.
@retval EFI_SUCCESS The override function completed successfully.
@retval EFI_NOT_FOUND The specified controller or slot does not exist.
@@ -84,7 +86,8 @@ EFIAPI
SynQuacerSdMmcCapability (
IN EFI_HANDLE ControllerHandle,
IN UINT8 Slot,
- IN OUT VOID *SdMmcHcSlotCapability
+ IN OUT VOID *SdMmcHcSlotCapability,
+ IN OUT UINT32 *BaseClkFreq
)
{
UINT64 Capability;
@@ -117,6 +120,7 @@ SynQuacerSdMmcCapability (
@param[in] PhaseType The type of operation and whether the
hook is invoked right before (pre) or
right after (post)
+ @param[in,out] PhaseData The pointer to a phase-specific data.
@retval EFI_SUCCESS The override function completed successfully.
@retval EFI_NOT_FOUND The specified controller or slot does not exist.
@@ -129,7 +133,8 @@ EFIAPI
SynQuacerSdMmcNotifyPhase (
IN EFI_HANDLE ControllerHandle,
IN UINT8 Slot,
- IN EDKII_SD_MMC_PHASE_TYPE PhaseType
+ IN EDKII_SD_MMC_PHASE_TYPE PhaseType,
+ IN OUT VOID *PhaseData
)
{
if (ControllerHandle != mSdMmcControllerHandle) {
--
2.7.4
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [platforms: PATCH v4 2/7] Marvell/Library: ArmadaBoardDescLib: Extend SDMMC information
2018-11-09 23:01 [platforms: PATCH v4 0/7] Armada7k8k Xenon driver rework Marcin Wojtas
2018-11-09 23:01 ` [platforms: PATCH v4 1/7] Silicon/SynQuacer/PlatformDxe: adjust to updated SdMmcOverride Marcin Wojtas
@ 2018-11-09 23:01 ` Marcin Wojtas
2018-11-12 10:24 ` Ard Biesheuvel
2018-11-09 23:01 ` [platforms: PATCH v4 3/7] SolidRun/Armada80x0McBin: Introduce board description library Marcin Wojtas
` (4 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: Marcin Wojtas @ 2018-11-09 23:01 UTC (permalink / raw)
To: edk2-devel
Cc: leif.lindholm, ard.biesheuvel, hao.a.wu, nadavh, mw, jsd, jaz,
kostap, tm
From: Tomasz Michalec <tm@semihalf.com>
Added fields specific for Xenon host controller and declaration
of ArmadaBoardDescSdMmcGet function.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 22 +++++++++++++++++++-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
index ee8e06e..8e29a68 100644
--- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
@@ -55,9 +55,21 @@ typedef struct {
//
// SDMMC devices per-board description
//
+typedef enum {
+ RemovableSlot,
+ EmbeddedSlot,
+ SharedBusSlot,
+ UnknownSlot
+} MV_SDMMC_SLOT_TYPE;
+
typedef struct {
MV_SOC_SDMMC_DESC *SoC;
- UINTN SdMmcDevCount;
+ UINTN SdMmcDevCount;
+ BOOLEAN Xenon1v8Enabled;
+ BOOLEAN Xenon8BitBusEnabled;
+ BOOLEAN XenonSlowModeEnabled;
+ UINT8 XenonTuningStepDivisor;
+ MV_SDMMC_SLOT_TYPE SlotType;
} MV_BOARD_SDMMC_DESC;
//
@@ -84,4 +96,12 @@ typedef struct {
UINTN UtmiDevCount;
UINTN UtmiPortType;
} MV_BOARD_UTMI_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaBoardDescSdMmcGet (
+ IN OUT UINTN *SdMmcDevCount,
+ IN OUT MV_BOARD_SDMMC_DESC **SdMmcDesc
+ );
+
#endif /* __ARMADA_SOC_DESC_LIB_H__ */
--
2.7.4
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [platforms: PATCH v4 3/7] SolidRun/Armada80x0McBin: Introduce board description library
2018-11-09 23:01 [platforms: PATCH v4 0/7] Armada7k8k Xenon driver rework Marcin Wojtas
2018-11-09 23:01 ` [platforms: PATCH v4 1/7] Silicon/SynQuacer/PlatformDxe: adjust to updated SdMmcOverride Marcin Wojtas
2018-11-09 23:01 ` [platforms: PATCH v4 2/7] Marvell/Library: ArmadaBoardDescLib: Extend SDMMC information Marcin Wojtas
@ 2018-11-09 23:01 ` Marcin Wojtas
2018-11-12 10:26 ` Ard Biesheuvel
2018-11-09 23:01 ` [platforms: PATCH v4 5/7] Marvell/Armada80x0Db: " Marcin Wojtas
` (3 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: Marcin Wojtas @ 2018-11-09 23:01 UTC (permalink / raw)
To: edk2-devel
Cc: leif.lindholm, ard.biesheuvel, hao.a.wu, nadavh, mw, jsd, jaz,
kostap, tm
From: Tomasz Michalec <tm@semihalf.com>
This patch implements ArmadaBoarDescLib library for
Armada80x0McBin comunity board and add to it ArmadaBoardDescSdMmcGet
function with description of connected Xenon host controllers.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc | 3 +
Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.inf | 34 ++++++++++
Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c | 66 ++++++++++++++++++++
3 files changed, 103 insertions(+)
create mode 100644 Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.inf
create mode 100644 Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c
diff --git a/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc
index 52e2b9b..077224d 100644
--- a/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc
+++ b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc
@@ -55,6 +55,9 @@
[Components.AARCH64]
Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin.inf
+[LibraryClasses.common]
+ ArmadaBoardDescLib|Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.inf
+
################################################################################
#
# Pcd Section - list of all EDK II PCD Entries defined by this Platform
diff --git a/Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.inf b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.inf
new file mode 100644
index 0000000..63a4f66
--- /dev/null
+++ b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.inf
@@ -0,0 +1,34 @@
+## @file
+#
+# Copyright (C) 2018, Marvell International Ltd. and its affiliates<BR>
+#
+# This program and the accompanying materials are licensed and made available
+# under the terms and conditions of the BSD License which accompanies this
+# distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
+# IMPLIED.
+#
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = ArmadaMcBinBoardDescLib
+ FILE_GUID = 8208558f-5f33-46e2-b5c5-43354384389e
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmadaBoardDescLib
+
+[Sources]
+ Armada80x0McBinBoardDescLib.c
+
+[Packages]
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Marvell/Marvell.dec
+
+[LibraryClasses]
+ DebugLib
+ IoLib
diff --git a/Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c
new file mode 100644
index 0000000..9e38ce0
--- /dev/null
+++ b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c
@@ -0,0 +1,66 @@
+/**
+*
+* Copyright (C) 2018, Marvell International Ltd. and its affiliates.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Uefi.h>
+
+#include <Library/ArmadaBoardDescLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+//
+// Order of devices in SdMmcDescTemplate has to be in par with ArmadaSoCDescLib
+//
+STATIC
+MV_BOARD_SDMMC_DESC mMcBinSdMmcDescTemplate[] = {
+ { /* eMMC 0xF06E0000 */
+ 0, /* SOC will be filled by MvBoardDescDxe */
+ 0, /* SdMmcDevCount will be filled by MvBoardDescDxe */
+ FALSE, /* Xenon1v8Enabled */
+ TRUE, /* Xenon8BitBusEnabled */
+ TRUE, /* XenonSlowModeEnabled */
+ 0x40, /* XenonTuningStepDivisor */
+ EmbeddedSlot /* SlotType */
+ },
+ { /* SD/MMC 0xF2780000 */
+ 0, /* SOC will be filled by MvBoardDescDxe */
+ 0, /* SdMmcDevCount will be filled by MvBoardDescDxe */
+ FALSE, /* Xenon1v8Enabled */
+ FALSE, /* Xenon8BitBusEnabled */
+ FALSE, /* XenonSlowModeEnabled */
+ 0x19, /* XenonTuningStepDivisor */
+ EmbeddedSlot /* SlotType */
+ }
+};
+
+EFI_STATUS
+EFIAPI
+ArmadaBoardDescSdMmcGet (
+ IN OUT UINTN *SdMmcDevCount,
+ IN OUT MV_BOARD_SDMMC_DESC **SdMmcDesc
+ )
+{
+ *SdMmcDevCount = ARRAY_SIZE (mMcBinSdMmcDescTemplate);
+
+ *SdMmcDesc = AllocateCopyPool (sizeof (mMcBinSdMmcDescTemplate),
+ &mMcBinSdMmcDescTemplate);
+ if (*SdMmcDesc == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ return EFI_SUCCESS;
+}
--
2.7.4
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [platforms: PATCH v4 5/7] Marvell/Armada80x0Db: Introduce board description library
2018-11-09 23:01 [platforms: PATCH v4 0/7] Armada7k8k Xenon driver rework Marcin Wojtas
` (2 preceding siblings ...)
2018-11-09 23:01 ` [platforms: PATCH v4 3/7] SolidRun/Armada80x0McBin: Introduce board description library Marcin Wojtas
@ 2018-11-09 23:01 ` Marcin Wojtas
2018-11-12 10:28 ` Ard Biesheuvel
2018-11-09 23:01 ` [platforms: PATCH v4 6/7] Marvell/Drivers: MvBoardDesc: Extend information for SdMmc Marcin Wojtas
` (2 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: Marcin Wojtas @ 2018-11-09 23:01 UTC (permalink / raw)
To: edk2-devel
Cc: leif.lindholm, ard.biesheuvel, hao.a.wu, nadavh, mw, jsd, jaz,
kostap, tm
From: Tomasz Michalec <tm@semihalf.com>
This patch implements ArmadaBoarDescLib library for
Armada8040 Development Board and add to it ArmadaBoardDescSdMmcGet
function with description of connected Xenon host controllers.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc | 3 +
Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.inf | 34 ++++++++++
Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c | 66 ++++++++++++++++++++
3 files changed, 103 insertions(+)
create mode 100644 Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.inf
create mode 100644 Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c
diff --git a/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc b/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
index 92e2dc8..42f7bd3 100644
--- a/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
+++ b/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
@@ -54,6 +54,9 @@
[Components.AARCH64]
Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db.inf
+[LibraryClasses.common]
+ ArmadaBoardDescLib|Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.inf
+
################################################################################
#
# Pcd Section - list of all EDK II PCD Entries defined by this Platform
diff --git a/Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.inf b/Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.inf
new file mode 100644
index 0000000..2d39d96
--- /dev/null
+++ b/Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.inf
@@ -0,0 +1,34 @@
+## @file
+#
+# Copyright (C) 2018, Marvell International Ltd. and its affiliates<BR>
+#
+# This program and the accompanying materials are licensed and made available
+# under the terms and conditions of the BSD License which accompanies this
+# distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
+# IMPLIED.
+#
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = Armada80x0DbBoardDescLib
+ FILE_GUID = fee9e874-1481-4b4f-9882-966bd0d1310f
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmadaBoardDescLib
+
+[Sources]
+ Armada80x0DbBoardDescLib.c
+
+[Packages]
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Marvell/Marvell.dec
+
+[LibraryClasses]
+ DebugLib
+ IoLib
diff --git a/Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c b/Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c
new file mode 100644
index 0000000..00d696d
--- /dev/null
+++ b/Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c
@@ -0,0 +1,66 @@
+/**
+*
+* Copyright (C) 2018, Marvell International Ltd. and its affiliates.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Uefi.h>
+
+#include <Library/ArmadaBoardDescLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+//
+// Order of devices in SdMmcDescTemplate has to be in par with ArmadaSoCDescLib
+//
+STATIC
+MV_BOARD_SDMMC_DESC mSdMmcDescTemplate[] = {
+ { /* eMMC 0xF06E0000 */
+ 0, /* SOC will be filled by MvBoardDescDxe */
+ 0, /* SdMmcDevCount will be filled by MvBoardDescDxe */
+ TRUE, /* Xenon1v8Enabled */
+ TRUE, /* Xenon8BitBusEnabled */
+ TRUE, /* XenonSlowModeEnabled */
+ 0x40, /* XenonTuningStepDivisor */
+ EmbeddedSlot /* SlotType */
+ },
+ { /* SD/MMC 0xF2780000 */
+ 0, /* SOC will be filled by MvBoardDescDxe */
+ 0, /* SdMmcDevCount will be filled by MvBoardDescDxe */
+ FALSE, /* Xenon1v8Enabled */
+ FALSE, /* Xenon8BitBusEnabled */
+ FALSE, /* XenonSlowModeEnabled */
+ 0x19, /* XenonTuningStepDivisor */
+ EmbeddedSlot /* SlotType */
+ }
+};
+
+EFI_STATUS
+EFIAPI
+ArmadaBoardDescSdMmcGet (
+ IN OUT UINTN *SdMmcDevCount,
+ IN OUT MV_BOARD_SDMMC_DESC **SdMmcDesc
+ )
+{
+ *SdMmcDevCount = ARRAY_SIZE (mSdMmcDescTemplate);
+
+ *SdMmcDesc = AllocateCopyPool (sizeof (mSdMmcDescTemplate),
+ &mSdMmcDescTemplate);
+ if (*SdMmcDesc == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ return EFI_SUCCESS;
+}
--
2.7.4
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [platforms: PATCH v4 6/7] Marvell/Drivers: MvBoardDesc: Extend information for SdMmc
2018-11-09 23:01 [platforms: PATCH v4 0/7] Armada7k8k Xenon driver rework Marcin Wojtas
` (3 preceding siblings ...)
2018-11-09 23:01 ` [platforms: PATCH v4 5/7] Marvell/Armada80x0Db: " Marcin Wojtas
@ 2018-11-09 23:01 ` Marcin Wojtas
2018-11-12 10:29 ` Ard Biesheuvel
2018-11-09 23:01 ` [platforms: PATCH v4 7/7] Marvell/Drivers: XenonDxe: Switch to use generic SdMmcPciHcDxe Marcin Wojtas
[not found] ` <1541804508-27499-5-git-send-email-mw@semihalf.com>
6 siblings, 1 reply; 14+ messages in thread
From: Marcin Wojtas @ 2018-11-09 23:01 UTC (permalink / raw)
To: edk2-devel
Cc: leif.lindholm, ard.biesheuvel, hao.a.wu, nadavh, mw, jsd, jaz,
kostap, tm
From: Tomasz Michalec <tm@semihalf.com>
Extend MvBoardDescSdMmcGet function to fill MV_BOARD_SDMMC_DESC
with Xenon specific info obtained from ArmadaBoardDescLib.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 1 +
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 24 +++++++++++++-------
2 files changed, 17 insertions(+), 8 deletions(-)
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
index 41f72d6..0b93948 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
@@ -47,6 +47,7 @@
Silicon/Marvell/Marvell.dec
[LibraryClasses]
+ ArmadaBoardDescLib
ArmadaSoCDescLib
DebugLib
MemoryAllocationLib
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
index 39dc06c..f71bfc4 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
@@ -270,6 +270,7 @@ MvBoardDescSdMmcGet (
{
UINT8 *SdMmcDeviceEnabled;
UINTN SdMmcCount, SdMmcDeviceTableSize, SdMmcIndex, Index;
+ UINTN SdMmcDevCount;
MV_BOARD_SDMMC_DESC *BoardDesc;
MV_SOC_SDMMC_DESC *SoCDesc;
EFI_STATUS Status;
@@ -280,6 +281,13 @@ MvBoardDescSdMmcGet (
return Status;
}
+ /* Get per-board configuration of the controllers */
+ Status = ArmadaBoardDescSdMmcGet (&SdMmcDevCount, &BoardDesc);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: ArmadaBoardDescSdMmcGet filed\n", __FUNCTION__));
+ return Status;
+ }
+
/*
* Obtain table with enabled SDMMC controllers
* which is represented as an array of UINT8 values
@@ -294,18 +302,12 @@ MvBoardDescSdMmcGet (
SdMmcDeviceTableSize = PcdGetSize (PcdPciESdhci);
/* Check if PCD with SDMMC controllers is correctly defined */
- if (SdMmcDeviceTableSize > SdMmcCount) {
+ if ((SdMmcDeviceTableSize > SdMmcCount) ||
+ (SdMmcDeviceTableSize < SdMmcDevCount)) {
DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciESdhci format\n", __FUNCTION__));
return EFI_INVALID_PARAMETER;
}
- /* Allocate and fill board description */
- BoardDesc = AllocateZeroPool (SdMmcDeviceTableSize * sizeof (MV_BOARD_SDMMC_DESC));
- if (BoardDesc == NULL) {
- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
- return EFI_OUT_OF_RESOURCES;
- }
-
SdMmcIndex = 0;
for (Index = 0; Index < SdMmcDeviceTableSize; Index++) {
if (!SdMmcDeviceEnabled[Index]) {
@@ -313,6 +315,12 @@ MvBoardDescSdMmcGet (
continue;
}
+ if (SdMmcIndex >= SdMmcDevCount) {
+ DEBUG ((DEBUG_ERROR,
+ "%a: More enabled devices than returned by ArmadaBoardDescSdMmcGet\n",
+ __FUNCTION__));
+ return EFI_INVALID_PARAMETER;
+ }
BoardDesc[SdMmcIndex].SoC = &SoCDesc[Index];
SdMmcIndex++;
}
--
2.7.4
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [platforms: PATCH v4 7/7] Marvell/Drivers: XenonDxe: Switch to use generic SdMmcPciHcDxe
2018-11-09 23:01 [platforms: PATCH v4 0/7] Armada7k8k Xenon driver rework Marcin Wojtas
` (4 preceding siblings ...)
2018-11-09 23:01 ` [platforms: PATCH v4 6/7] Marvell/Drivers: MvBoardDesc: Extend information for SdMmc Marcin Wojtas
@ 2018-11-09 23:01 ` Marcin Wojtas
2018-11-12 10:36 ` Ard Biesheuvel
[not found] ` <1541804508-27499-5-git-send-email-mw@semihalf.com>
6 siblings, 1 reply; 14+ messages in thread
From: Marcin Wojtas @ 2018-11-09 23:01 UTC (permalink / raw)
To: edk2-devel
Cc: leif.lindholm, ard.biesheuvel, hao.a.wu, nadavh, mw, jsd, jaz,
kostap, tm
From: Tomasz Michalec <tm@semihalf.com>
XenonDxe was copy of SdMmcPciHcDxe from edk2/MdeModulePkg.
Now it implements SdMmcOverride protocol which allows
to add quirks to the generic SdMmcPciHcDxe.
Platforms that were using XenonDxe/SdMmcPciHcDxe have fixed *.fdf
and *.dsc.inc files to use new implementation of XenonDxe.
In the new version of the driver apart from using SdMmcOverride
protocol, this patch utilizes newly added controllers'
description in MvBoardDesc protocol, as well as improved
PHY configuration sequence.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 3 +-
Silicon/Marvell/Armada7k8k/Armada7k8k.fdf | 3 +-
Silicon/Marvell/Drivers/SdMmc/XenonDxe/{SdMmcPciHcDxe.inf => XenonDxe.inf} | 33 +-
Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.h | 791 --------
Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHci.h | 550 ------
Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonPciHci.h | 151 ++
Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.h | 53 +
Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.h | 131 +-
Silicon/Marvell/Drivers/SdMmc/XenonDxe/ComponentName.c | 211 ---
Silicon/Marvell/Drivers/SdMmc/XenonDxe/EmmcDevice.c | 1164 ------------
Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdDevice.c | 1190 ------------
Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.c | 1320 --------------
Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHci.c | 1928 --------------------
Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonPciHci.c | 321 ++++
Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.c | 432 +++++
Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.c | 408 +++--
Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.uni | 23 -
| 19 -
18 files changed, 1359 insertions(+), 7372 deletions(-)
rename Silicon/Marvell/Drivers/SdMmc/XenonDxe/{SdMmcPciHcDxe.inf => XenonDxe.inf} (65%)
delete mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.h
delete mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHci.h
create mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonPciHci.h
create mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.h
delete mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/ComponentName.c
delete mode 100755 Silicon/Marvell/Drivers/SdMmc/XenonDxe/EmmcDevice.c
delete mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdDevice.c
delete mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.c
delete mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHci.c
create mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonPciHci.c
create mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.c
delete mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.uni
delete mode 100644 Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxeExtra.uni
diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
index 8d6b785..14a1bda 100644
--- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
+++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
@@ -509,7 +509,8 @@
# SD/MMC
MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.inf
MdeModulePkg/Bus/Sd/SdDxe/SdDxe.inf
- Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.inf
+ MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf
+ Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonDxe.inf
# Console packages
MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
index 5fd88bd..e143517 100644
--- a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
+++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
@@ -171,7 +171,8 @@ FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c
# SD/MMC
INF MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.inf
INF MdeModulePkg/Bus/Sd/SdDxe/SdDxe.inf
- INF Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.inf
+ INF MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf
+ INF Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonDxe.inf
# Multiple Console IO support
INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
diff --git a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.inf b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonDxe.inf
similarity index 65%
rename from Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.inf
rename to Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonDxe.inf
index fad9fc6..f966e5f 100644
--- a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.inf
+++ b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonDxe.inf
@@ -6,7 +6,7 @@
# to specified devices from upper layer.
#
# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-# Copyright (C) 2016 Marvell International Ltd. All rights reserved.<BR>
+# Copyright (C) 2018, Marvell International Ltd. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -19,33 +19,29 @@
##
[Defines]
- INF_VERSION = 0x00010019
+ INF_VERSION = 0x0001001A
BASE_NAME = XenonDxe
- MODULE_UNI_FILE = SdMmcPciHcDxe.uni
FILE_GUID = 17f56b40-f7c1-435c-ab8d-404872da951e
MODULE_TYPE = UEFI_DRIVER
VERSION_STRING = 1.0
- ENTRY_POINT = InitializeSdMmcPciHcDxe
+ ENTRY_POINT = InitializeXenonDxe
[Sources]
- ComponentName.c
- EmmcDevice.c
- SdDevice.c
- SdMmcPciHcDxe.c
- SdMmcPciHcDxe.h
- SdMmcPciHci.c
- SdMmcPciHci.h
+ XenonPciHci.c
+ XenonPciHci.h
XenonSdhci.c
XenonSdhci.h
+ XenonSdMmcOverride.c
+ XenonSdMmcOverride.h
[Packages]
MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ Silicon/Marvell/Marvell.dec
[LibraryClasses]
BaseLib
- BaseMemoryLib
DebugLib
- DevicePathLib
MemoryAllocationLib
UefiBootServicesTableLib
UefiDriverEntryPoint
@@ -53,12 +49,7 @@
UefiRuntimeServicesTableLib
[Protocols]
- gEfiDevicePathProtocolGuid ## TO_START
+ gEdkiiSdMmcOverrideProtocolGuid ## BY_START
+ gEdkiiNonDiscoverableDeviceProtocolGuid ## TO_START
gEfiPciIoProtocolGuid ## TO_START
- gEfiSdMmcPassThruProtocolGuid ## BY_START
-
-# [Event]
-# EVENT_TYPE_PERIODIC_TIMER ## SOMETIMES_CONSUMES
-
-[UserExtensions.TianoCore."ExtraFiles"]
- SdMmcPciHcDxeExtra.uni
+ gMarvellBoardDescProtocolGuid ## TO_START
diff --git a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.h b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.h
deleted file mode 100644
index 067b9ac..0000000
--- a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.h
+++ /dev/null
@@ -1,791 +0,0 @@
-/** @file
-
- Provides some data structure definitions used by the SD/MMC host controller driver.
-
-Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _SD_MMC_PCI_HC_DXE_H_
-#define _SD_MMC_PCI_HC_DXE_H_
-
-#include <Uefi.h>
-
-#include <IndustryStandard/Pci.h>
-#include <IndustryStandard/Emmc.h>
-#include <IndustryStandard/Sd.h>
-
-#include <Library/UefiDriverEntryPoint.h>
-#include <Library/DebugLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/UefiLib.h>
-#include <Library/DevicePathLib.h>
-
-#include <Protocol/DevicePath.h>
-#include <Protocol/PciIo.h>
-#include <Protocol/DriverBinding.h>
-#include <Protocol/ComponentName.h>
-#include <Protocol/ComponentName2.h>
-#include <Protocol/SdMmcPassThru.h>
-
-#include "SdMmcPciHci.h"
-
-extern EFI_COMPONENT_NAME_PROTOCOL gSdMmcPciHcComponentName;
-extern EFI_COMPONENT_NAME2_PROTOCOL gSdMmcPciHcComponentName2;
-extern EFI_DRIVER_BINDING_PROTOCOL gSdMmcPciHcDriverBinding;
-
-#define SD_MMC_HC_PRIVATE_SIGNATURE SIGNATURE_32 ('s', 'd', 't', 'f')
-
-#define SD_MMC_HC_PRIVATE_FROM_THIS(a) \
- CR(a, SD_MMC_HC_PRIVATE_DATA, PassThru, SD_MMC_HC_PRIVATE_SIGNATURE)
-
-//
-// Generic time out value, 1 microsecond as unit.
-//
-#define SD_MMC_HC_GENERIC_TIMEOUT 1 * 1000 * 1000
-
-//
-// SD/MMC async transfer timer interval, set by experience.
-// The unit is 100us, takes 1ms as interval.
-//
-#define SD_MMC_HC_ASYNC_TIMER EFI_TIMER_PERIOD_MILLISECONDS(1)
-//
-// SD/MMC removable device enumeration timer interval, set by experience.
-// The unit is 100us, takes 100ms as interval.
-//
-#define SD_MMC_HC_ENUM_TIMER EFI_TIMER_PERIOD_MILLISECONDS(100)
-
-typedef enum {
- UnknownCardType,
- SdCardType,
- SdioCardType,
- MmcCardType,
- EmmcCardType
-} SD_MMC_CARD_TYPE;
-
-typedef enum {
- RemovableSlot,
- EmbeddedSlot,
- SharedBusSlot,
- UnknownSlot
-} EFI_SD_MMC_SLOT_TYPE;
-
-typedef struct {
- BOOLEAN Enable;
- EFI_SD_MMC_SLOT_TYPE SlotType;
- BOOLEAN MediaPresent;
- BOOLEAN Initialized;
- SD_MMC_CARD_TYPE CardType;
-} SD_MMC_HC_SLOT;
-
-typedef struct {
- UINTN Signature;
-
- EFI_HANDLE ControllerHandle;
- EFI_PCI_IO_PROTOCOL *PciIo;
-
- EFI_SD_MMC_PASS_THRU_PROTOCOL PassThru;
-
- UINT64 PciAttributes;
- //
- // The field is used to record the previous slot in GetNextSlot().
- //
- UINT8 PreviousSlot;
- //
- // For Non-blocking operation.
- //
- EFI_EVENT TimerEvent;
- //
- // For Sd removable device enumeration.
- //
- EFI_EVENT ConnectEvent;
- LIST_ENTRY Queue;
-
- SD_MMC_HC_SLOT Slot[SD_MMC_HC_MAX_SLOT];
- SD_MMC_HC_SLOT_CAP Capability[SD_MMC_HC_MAX_SLOT];
- UINT64 MaxCurrent[SD_MMC_HC_MAX_SLOT];
-
- UINT32 ControllerVersion;
-
- //
- // Some controllers may require to override base clock frequency
- // value stored in Capabilities Register 1.
- //
- UINT32 BaseClkFreq[SD_MMC_HC_MAX_SLOT];
-} SD_MMC_HC_PRIVATE_DATA;
-
-#define SD_MMC_HC_TRB_SIG SIGNATURE_32 ('T', 'R', 'B', 'T')
-
-//
-// TRB (Transfer Request Block) contains information for the cmd request.
-//
-typedef struct {
- UINT32 Signature;
- LIST_ENTRY TrbList;
-
- UINT8 Slot;
- UINT16 BlockSize;
-
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
- VOID *Data;
- UINT32 DataLen;
- BOOLEAN Read;
- EFI_PHYSICAL_ADDRESS DataPhy;
- VOID *DataMap;
- SD_MMC_HC_TRANSFER_MODE Mode;
-
- EFI_EVENT Event;
- BOOLEAN Started;
- UINT64 Timeout;
-
- SD_MMC_HC_ADMA_DESC_LINE *AdmaDesc;
- EFI_PHYSICAL_ADDRESS AdmaDescPhy;
- VOID *AdmaMap;
- UINT32 AdmaPages;
-
- SD_MMC_HC_PRIVATE_DATA *Private;
-} SD_MMC_HC_TRB;
-
-#define SD_MMC_HC_TRB_FROM_THIS(a) \
- CR(a, SD_MMC_HC_TRB, TrbList, SD_MMC_HC_TRB_SIG)
-
-//
-// Task for Non-blocking mode.
-//
-typedef struct {
- UINT32 Signature;
- LIST_ENTRY Link;
-
- UINT8 Slot;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
- BOOLEAN IsStart;
- EFI_EVENT Event;
- UINT64 RetryTimes;
- BOOLEAN InfiniteWait;
- VOID *Map;
- VOID *MapAddress;
-} SD_MMC_HC_QUEUE;
-
-//
-// Prototypes
-//
-/**
- Execute card identification procedure.
-
- @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.
- @param[in] Slot The slot number of the SD card to send the command to.
-
- @retval EFI_SUCCESS The card is identified correctly.
- @retval Others The card can't be identified.
-
-**/
-typedef
-EFI_STATUS
-(*CARD_TYPE_DETECT_ROUTINE) (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 Slot
- );
-
-/**
- Sends SD command to an SD card that is attached to the SD controller.
-
- The PassThru() function sends the SD command specified by Packet to the SD card
- specified by Slot.
-
- If Packet is successfully sent to the SD card, then EFI_SUCCESS is returned.
-
- If a device error occurs while sending the Packet, then EFI_DEVICE_ERROR is returned.
-
- If Slot is not in a valid range for the SD controller, then EFI_INVALID_PARAMETER
- is returned.
-
- If Packet defines a data command but both InDataBuffer and OutDataBuffer are NULL,
- EFI_INVALID_PARAMETER is returned.
-
- @param[in] This A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in,out] Packet A pointer to the SD command data structure.
- @param[in] Event If Event is NULL, blocking I/O is performed. If Event is
- not NULL, then nonblocking I/O is performed, and Event
- will be signaled when the Packet completes.
-
- @retval EFI_SUCCESS The SD Command Packet was sent by the host.
- @retval EFI_DEVICE_ERROR A device error occurred while attempting to send the SD
- command Packet.
- @retval EFI_INVALID_PARAMETER Packet, Slot, or the contents of the Packet is invalid.
- @retval EFI_INVALID_PARAMETER Packet defines a data command but both InDataBuffer and
- OutDataBuffer are NULL.
- @retval EFI_NO_MEDIA SD Device not present in the Slot.
- @retval EFI_UNSUPPORTED The command described by the SD Command Packet is not
- supported by the host controller.
- @retval EFI_BAD_BUFFER_SIZE The InTransferLength or OutTransferLength exceeds the
- limit supported by SD card ( i.e. if the number of bytes
- exceed the Last LBA).
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcPassThruPassThru (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
- IN UINT8 Slot,
- IN OUT EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet,
- IN EFI_EVENT Event OPTIONAL
- );
-
-/**
- Used to retrieve next slot numbers supported by the SD controller. The function
- returns information about all available slots (populated or not-populated).
-
- The GetNextSlot() function retrieves the next slot number on an SD controller.
- If on input Slot is 0xFF, then the slot number of the first slot on the SD controller
- is returned.
-
- If Slot is a slot number that was returned on a previous call to GetNextSlot(), then
- the slot number of the next slot on the SD controller is returned.
-
- If Slot is not 0xFF and Slot was not returned on a previous call to GetNextSlot(),
- EFI_INVALID_PARAMETER is returned.
-
- If Slot is the slot number of the last slot on the SD controller, then EFI_NOT_FOUND
- is returned.
-
- @param[in] This A pointer to the EFI_SD_MMMC_PASS_THRU_PROTOCOL instance.
- @param[in,out] Slot On input, a pointer to a slot number on the SD controller.
- On output, a pointer to the next slot number on the SD controller.
- An input value of 0xFF retrieves the first slot number on the SD
- controller.
-
- @retval EFI_SUCCESS The next slot number on the SD controller was returned in Slot.
- @retval EFI_NOT_FOUND There are no more slots on this SD controller.
- @retval EFI_INVALID_PARAMETER Slot is not 0xFF and Slot was not returned on a previous call
- to GetNextSlot().
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcPassThruGetNextSlot (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
- IN OUT UINT8 *Slot
- );
-
-/**
- Used to allocate and build a device path node for an SD card on the SD controller.
-
- The BuildDevicePath() function allocates and builds a single device node for the SD
- card specified by Slot.
-
- If the SD card specified by Slot is not present on the SD controller, then EFI_NOT_FOUND
- is returned.
-
- If DevicePath is NULL, then EFI_INVALID_PARAMETER is returned.
-
- If there are not enough resources to allocate the device path node, then EFI_OUT_OF_RESOURCES
- is returned.
-
- Otherwise, DevicePath is allocated with the boot service AllocatePool(), the contents of
- DevicePath are initialized to describe the SD card specified by Slot, and EFI_SUCCESS is
- returned.
-
- @param[in] This A pointer to the EFI_SD_MMMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot Specifies the slot number of the SD card for which a device
- path node is to be allocated and built.
- @param[in,out] DevicePath A pointer to a single device path node that describes the SD
- card specified by Slot. This function is responsible for
- allocating the buffer DevicePath with the boot service
- AllocatePool(). It is the caller's responsibility to free
- DevicePath when the caller is finished with DevicePath.
-
- @retval EFI_SUCCESS The device path node that describes the SD card specified by
- Slot was allocated and returned in DevicePath.
- @retval EFI_NOT_FOUND The SD card specified by Slot does not exist on the SD controller.
- @retval EFI_INVALID_PARAMETER DevicePath is NULL.
- @retval EFI_OUT_OF_RESOURCES There are not enough resources to allocate DevicePath.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcPassThruBuildDevicePath (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
- IN UINT8 Slot,
- IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
- );
-
-/**
- This function retrieves an SD card slot number based on the input device path.
-
- The GetSlotNumber() function retrieves slot number for the SD card specified by
- the DevicePath node. If DevicePath is NULL, EFI_INVALID_PARAMETER is returned.
-
- If DevicePath is not a device path node type that the SD Pass Thru driver supports,
- EFI_UNSUPPORTED is returned.
-
- @param[in] This A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] DevicePath A pointer to the device path node that describes a SD
- card on the SD controller.
- @param[out] Slot On return, points to the slot number of an SD card on
- the SD controller.
-
- @retval EFI_SUCCESS SD card slot number is returned in Slot.
- @retval EFI_INVALID_PARAMETER Slot or DevicePath is NULL.
- @retval EFI_UNSUPPORTED DevicePath is not a device path node type that the SD
- Pass Thru driver supports.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcPassThruGetSlotNumber (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- OUT UINT8 *Slot
- );
-
-/**
- Resets an SD card that is connected to the SD controller.
-
- The ResetDevice() function resets the SD card specified by Slot.
-
- If this SD controller does not support a device reset operation, EFI_UNSUPPORTED is
- returned.
-
- If Slot is not in a valid slot number for this SD controller, EFI_INVALID_PARAMETER
- is returned.
-
- If the device reset operation is completed, EFI_SUCCESS is returned.
-
- @param[in] This A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot Specifies the slot number of the SD card to be reset.
-
- @retval EFI_SUCCESS The SD card specified by Slot was reset.
- @retval EFI_UNSUPPORTED The SD controller does not support a device reset operation.
- @retval EFI_INVALID_PARAMETER Slot number is invalid.
- @retval EFI_NO_MEDIA SD Device not present in the Slot.
- @retval EFI_DEVICE_ERROR The reset command failed due to a device error
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcPassThruResetDevice (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
- IN UINT8 Slot
- );
-
-//
-// Driver model protocol interfaces
-//
-/**
- Tests to see if this driver supports a given controller. If a child device is provided,
- it further tests to see if this driver supports creating a handle for the specified child device.
-
- This function checks to see if the driver specified by This supports the device specified by
- ControllerHandle. Drivers will typically use the device path attached to
- ControllerHandle and/or the services from the bus I/O abstraction attached to
- ControllerHandle to determine if the driver supports ControllerHandle. This function
- may be called many times during platform initialization. In order to reduce boot times, the tests
- performed by this function must be very small, and take as little time as possible to execute. This
- function must not change the state of any hardware devices, and this function must be aware that the
- device specified by ControllerHandle may already be managed by the same driver or a
- different driver. This function must match its calls to AllocatePages() with FreePages(),
- AllocatePool() with FreePool(), and OpenProtocol() with CloseProtocol().
- Since ControllerHandle may have been previously started by the same driver, if a protocol is
- already in the opened state, then it must not be closed with CloseProtocol(). This is required
- to guarantee the state of ControllerHandle is not modified by this function.
-
- @param[in] This A pointer to the EFI_DRIVER_BINDING_PROTOCOL instance.
- @param[in] ControllerHandle The handle of the controller to test. This handle
- must support a protocol interface that supplies
- an I/O abstraction to the driver.
- @param[in] RemainingDevicePath A pointer to the remaining portion of a device path. This
- parameter is ignored by device drivers, and is optional for bus
- drivers. For bus drivers, if this parameter is not NULL, then
- the bus driver must determine if the bus controller specified
- by ControllerHandle and the child controller specified
- by RemainingDevicePath are both supported by this
- bus driver.
-
- @retval EFI_SUCCESS The device specified by ControllerHandle and
- RemainingDevicePath is supported by the driver specified by This.
- @retval EFI_ALREADY_STARTED The device specified by ControllerHandle and
- RemainingDevicePath is already being managed by the driver
- specified by This.
- @retval EFI_ACCESS_DENIED The device specified by ControllerHandle and
- RemainingDevicePath is already being managed by a different
- driver or an application that requires exclusive access.
- Currently not implemented.
- @retval EFI_UNSUPPORTED The device specified by ControllerHandle and
- RemainingDevicePath is not supported by the driver specified by This.
-**/
-EFI_STATUS
-EFIAPI
-SdMmcPciHcDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
- );
-
-/**
- Starts a device controller or a bus controller.
-
- The Start() function is designed to be invoked from the EFI boot service ConnectController().
- As a result, much of the error checking on the parameters to Start() has been moved into this
- common boot service. It is legal to call Start() from other locations,
- but the following calling restrictions must be followed or the system behavior will not be deterministic.
- 1. ControllerHandle must be a valid EFI_HANDLE.
- 2. If RemainingDevicePath is not NULL, then it must be a pointer to a naturally aligned
- EFI_DEVICE_PATH_PROTOCOL.
- 3. Prior to calling Start(), the Supported() function for the driver specified by This must
- have been called with the same calling parameters, and Supported() must have returned EFI_SUCCESS.
-
- @param[in] This A pointer to the EFI_DRIVER_BINDING_PROTOCOL instance.
- @param[in] ControllerHandle The handle of the controller to start. This handle
- must support a protocol interface that supplies
- an I/O abstraction to the driver.
- @param[in] RemainingDevicePath A pointer to the remaining portion of a device path. This
- parameter is ignored by device drivers, and is optional for bus
- drivers. For a bus driver, if this parameter is NULL, then handles
- for all the children of Controller are created by this driver.
- If this parameter is not NULL and the first Device Path Node is
- not the End of Device Path Node, then only the handle for the
- child device specified by the first Device Path Node of
- RemainingDevicePath is created by this driver.
- If the first Device Path Node of RemainingDevicePath is
- the End of Device Path Node, no child handle is created by this
- driver.
-
- @retval EFI_SUCCESS The device was started.
- @retval EFI_DEVICE_ERROR The device could not be started due to a device error.Currently not implemented.
- @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
- @retval Others The driver failded to start the device.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcPciHcDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
- );
-
-/**
- Stops a device controller or a bus controller.
-
- The Stop() function is designed to be invoked from the EFI boot service DisconnectController().
- As a result, much of the error checking on the parameters to Stop() has been moved
- into this common boot service. It is legal to call Stop() from other locations,
- but the following calling restrictions must be followed or the system behavior will not be deterministic.
- 1. ControllerHandle must be a valid EFI_HANDLE that was used on a previous call to this
- same driver's Start() function.
- 2. The first NumberOfChildren handles of ChildHandleBuffer must all be a valid
- EFI_HANDLE. In addition, all of these handles must have been created in this driver's
- Start() function, and the Start() function must have called OpenProtocol() on
- ControllerHandle with an Attribute of EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER.
-
- @param[in] This A pointer to the EFI_DRIVER_BINDING_PROTOCOL instance.
- @param[in] ControllerHandle A handle to the device being stopped. The handle must
- support a bus specific I/O protocol for the driver
- to use to stop the device.
- @param[in] NumberOfChildren The number of child device handles in ChildHandleBuffer.
- @param[in] ChildHandleBuffer An array of child handles to be freed. May be NULL
- if NumberOfChildren is 0.
-
- @retval EFI_SUCCESS The device was stopped.
- @retval EFI_DEVICE_ERROR The device could not be stopped due to a device error.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcPciHcDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
- );
-
-//
-// EFI Component Name Functions
-//
-/**
- Retrieves a Unicode string that is the user readable name of the driver.
-
- This function retrieves the user readable name of a driver in the form of a
- Unicode string. If the driver specified by This has a user readable name in
- the language specified by Language, then a pointer to the driver name is
- returned in DriverName, and EFI_SUCCESS is returned. If the driver specified
- by This does not support the language specified by Language,
- then EFI_UNSUPPORTED is returned.
-
- @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or
- EFI_COMPONENT_NAME_PROTOCOL instance.
-
- @param Language[in] A pointer to a Null-terminated ASCII string
- array indicating the language. This is the
- language of the driver name that the caller is
- requesting, and it must match one of the
- languages specified in SupportedLanguages. The
- number of languages supported by a driver is up
- to the driver writer. Language is specified
- in RFC 4646 or ISO 639-2 language code format.
-
- @param DriverName[out] A pointer to the Unicode string to return.
- This Unicode string is the name of the
- driver specified by This in the language
- specified by Language.
-
- @retval EFI_SUCCESS The Unicode string for the Driver specified by
- This and the language specified by Language was
- returned in DriverName.
-
- @retval EFI_INVALID_PARAMETER Language is NULL.
-
- @retval EFI_INVALID_PARAMETER DriverName is NULL.
-
- @retval EFI_UNSUPPORTED The driver specified by This does not support
- the language specified by Language.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcPciHcComponentNameGetDriverName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN CHAR8 *Language,
- OUT CHAR16 **DriverName
- );
-
-/**
- Retrieves a Unicode string that is the user readable name of the controller
- that is being managed by a driver.
-
- This function retrieves the user readable name of the controller specified by
- ControllerHandle and ChildHandle in the form of a Unicode string. If the
- driver specified by This has a user readable name in the language specified by
- Language, then a pointer to the controller name is returned in ControllerName,
- and EFI_SUCCESS is returned. If the driver specified by This is not currently
- managing the controller specified by ControllerHandle and ChildHandle,
- then EFI_UNSUPPORTED is returned. If the driver specified by This does not
- support the language specified by Language, then EFI_UNSUPPORTED is returned.
-
- @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or
- EFI_COMPONENT_NAME_PROTOCOL instance.
-
- @param ControllerHandle[in] The handle of a controller that the driver
- specified by This is managing. This handle
- specifies the controller whose name is to be
- returned.
-
- @param ChildHandle[in] The handle of the child controller to retrieve
- the name of. This is an optional parameter that
- may be NULL. It will be NULL for device
- drivers. It will also be NULL for a bus drivers
- that wish to retrieve the name of the bus
- controller. It will not be NULL for a bus
- driver that wishes to retrieve the name of a
- child controller.
-
- @param Language[in] A pointer to a Null-terminated ASCII string
- array indicating the language. This is the
- language of the driver name that the caller is
- requesting, and it must match one of the
- languages specified in SupportedLanguages. The
- number of languages supported by a driver is up
- to the driver writer. Language is specified in
- RFC 4646 or ISO 639-2 language code format.
-
- @param ControllerName[out] A pointer to the Unicode string to return.
- This Unicode string is the name of the
- controller specified by ControllerHandle and
- ChildHandle in the language specified by
- Language from the point of view of the driver
- specified by This.
-
- @retval EFI_SUCCESS The Unicode string for the user readable name in
- the language specified by Language for the
- driver specified by This was returned in
- DriverName.
-
- @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE.
-
- @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid
- EFI_HANDLE.
-
- @retval EFI_INVALID_PARAMETER Language is NULL.
-
- @retval EFI_INVALID_PARAMETER ControllerName is NULL.
-
- @retval EFI_UNSUPPORTED The driver specified by This is not currently
- managing the controller specified by
- ControllerHandle and ChildHandle.
-
- @retval EFI_UNSUPPORTED The driver specified by This does not support
- the language specified by Language.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcPciHcComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle, OPTIONAL
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
- );
-
-/**
- Create a new TRB for the SD/MMC cmd request.
-
- @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Packet A pointer to the SD command data structure.
- @param[in] Event If Event is NULL, blocking I/O is performed. If Event is
- not NULL, then nonblocking I/O is performed, and Event
- will be signaled when the Packet completes.
-
- @return Created Trb or NULL.
-
-**/
-SD_MMC_HC_TRB *
-SdMmcCreateTrb (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 Slot,
- IN EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet,
- IN EFI_EVENT Event
- );
-
-/**
- Free the resource used by the TRB.
-
- @param[in] Trb The pointer to the SD_MMC_HC_TRB instance.
-
-**/
-VOID
-SdMmcFreeTrb (
- IN SD_MMC_HC_TRB *Trb
- );
-
-/**
- Check if the env is ready for execute specified TRB.
-
- @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.
- @param[in] Trb The pointer to the SD_MMC_HC_TRB instance.
-
- @retval EFI_SUCCESS The env is ready for TRB execution.
- @retval EFI_NOT_READY The env is not ready for TRB execution.
- @retval Others Some erros happen.
-
-**/
-EFI_STATUS
-SdMmcCheckTrbEnv (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN SD_MMC_HC_TRB *Trb
- );
-
-/**
- Wait for the env to be ready for execute specified TRB.
-
- @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.
- @param[in] Trb The pointer to the SD_MMC_HC_TRB instance.
-
- @retval EFI_SUCCESS The env is ready for TRB execution.
- @retval EFI_TIMEOUT The env is not ready for TRB execution in time.
- @retval Others Some erros happen.
-
-**/
-EFI_STATUS
-SdMmcWaitTrbEnv (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN SD_MMC_HC_TRB *Trb
- );
-
-/**
- Execute the specified TRB.
-
- @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.
- @param[in] Trb The pointer to the SD_MMC_HC_TRB instance.
-
- @retval EFI_SUCCESS The TRB is sent to host controller successfully.
- @retval Others Some erros happen when sending this request to the host controller.
-
-**/
-EFI_STATUS
-SdMmcExecTrb (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN SD_MMC_HC_TRB *Trb
- );
-
-/**
- Check the TRB execution result.
-
- @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.
- @param[in] Trb The pointer to the SD_MMC_HC_TRB instance.
-
- @retval EFI_SUCCESS The TRB is executed successfully.
- @retval EFI_NOT_READY The TRB is not completed for execution.
- @retval Others Some erros happen when executing this request.
-
-**/
-EFI_STATUS
-SdMmcCheckTrbResult (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN SD_MMC_HC_TRB *Trb
- );
-
-/**
- Wait for the TRB execution result.
-
- @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.
- @param[in] Trb The pointer to the SD_MMC_HC_TRB instance.
-
- @retval EFI_SUCCESS The TRB is executed successfully.
- @retval Others Some erros happen when executing this request.
-
-**/
-EFI_STATUS
-SdMmcWaitTrbResult (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN SD_MMC_HC_TRB *Trb
- );
-
-/**
- Execute EMMC device identification procedure.
-
- Refer to EMMC Electrical Standard Spec 5.1 Section 6.4 for details.
-
- @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.
- @param[in] Slot The slot number of the SD card to send the command to.
-
- @retval EFI_SUCCESS There is a EMMC card.
- @retval Others There is not a EMMC card.
-
-**/
-EFI_STATUS
-EmmcIdentification (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 Slot
- );
-
-/**
- Execute EMMC device identification procedure.
-
- Refer to EMMC Electrical Standard Spec 5.1 Section 6.4 for details.
-
- @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.
- @param[in] Slot The slot number of the SD card to send the command to.
-
- @retval EFI_SUCCESS There is a EMMC card.
- @retval Others There is not a EMMC card.
-
-**/
-EFI_STATUS
-SdCardIdentification (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 Slot
- );
-
-#endif
diff --git a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHci.h b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHci.h
deleted file mode 100644
index 533f37c..0000000
--- a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHci.h
+++ /dev/null
@@ -1,550 +0,0 @@
-/** @file
-
- Provides some data structure definitions used by the SD/MMC host controller driver.
-
-Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _SD_MMC_PCI_HCI_H_
-#define _SD_MMC_PCI_HCI_H_
-
-//
-// SD Host Controller SlotInfo Register Offset
-//
-#define SD_MMC_HC_SLOT_OFFSET 0x40
-
-#define SD_MMC_HC_MAX_SLOT 6
-
-//
-// SD Host Controller MMIO Register Offset
-//
-#define SD_MMC_HC_SDMA_ADDR 0x00
-#define SD_MMC_HC_ARG2 0x00
-#define SD_MMC_HC_BLK_SIZE 0x04
-#define SD_MMC_HC_BLK_COUNT 0x06
-#define SD_MMC_HC_ARG1 0x08
-#define SD_MMC_HC_TRANS_MOD 0x0C
-#define SD_MMC_HC_COMMAND 0x0E
-#define SD_MMC_HC_RESPONSE 0x10
-#define SD_MMC_HC_BUF_DAT_PORT 0x20
-#define SD_MMC_HC_PRESENT_STATE 0x24
-#define SD_MMC_HC_HOST_CTRL1 0x28
-#define SD_MMC_HC_POWER_CTRL 0x29
-#define SD_MMC_HC_BLK_GAP_CTRL 0x2A
-#define SD_MMC_HC_WAKEUP_CTRL 0x2B
-#define SD_MMC_HC_CLOCK_CTRL 0x2C
-#define SD_MMC_HC_TIMEOUT_CTRL 0x2E
-#define SD_MMC_HC_SW_RST 0x2F
-#define SD_MMC_HC_NOR_INT_STS 0x30
-#define SD_MMC_HC_ERR_INT_STS 0x32
-#define SD_MMC_HC_NOR_INT_STS_EN 0x34
-#define SD_MMC_HC_ERR_INT_STS_EN 0x36
-#define SD_MMC_HC_NOR_INT_SIG_EN 0x38
-#define SD_MMC_HC_ERR_INT_SIG_EN 0x3A
-#define SD_MMC_HC_AUTO_CMD_ERR_STS 0x3C
-#define SD_MMC_HC_HOST_CTRL2 0x3E
-#define SD_MMC_HC_CAP 0x40
-#define SD_MMC_HC_MAX_CURRENT_CAP 0x48
-#define SD_MMC_HC_FORCE_EVT_AUTO_CMD 0x50
-#define SD_MMC_HC_FORCE_EVT_ERR_INT 0x52
-#define SD_MMC_HC_ADMA_ERR_STS 0x54
-#define SD_MMC_HC_ADMA_SYS_ADDR 0x58
-#define SD_MMC_HC_PRESET_VAL 0x60
-#define SD_MMC_HC_SHARED_BUS_CTRL 0xE0
-#define SD_MMC_HC_SLOT_INT_STS 0xFC
-#define SD_MMC_HC_CTRL_VER 0xFE
-
-//
-// The transfer modes supported by SD Host Controller
-// Simplified Spec 3.0 Table 1-2
-//
-typedef enum {
- SdMmcNoData,
- SdMmcPioMode,
- SdMmcSdmaMode,
- SdMmcAdmaMode
-} SD_MMC_HC_TRANSFER_MODE;
-
-//
-// The maximum data length of each descriptor line
-//
-#define ADMA_MAX_DATA_PER_LINE 0x10000
-
-typedef struct {
- UINT32 Valid:1;
- UINT32 End:1;
- UINT32 Int:1;
- UINT32 Reserved:1;
- UINT32 Act:2;
- UINT32 Reserved1:10;
- UINT32 Length:16;
- UINT32 Address;
-} SD_MMC_HC_ADMA_DESC_LINE;
-
-#define SD_MMC_SDMA_BOUNDARY 512 * 1024
-#define SD_MMC_SDMA_ROUND_UP(x, n) (((x) + n) & ~(n - 1))
-
-typedef struct {
- UINT8 FirstBar:3; // bit 0:2
- UINT8 Reserved:1; // bit 3
- UINT8 SlotNum:3; // bit 4:6
- UINT8 Reserved1:1; // bit 7
-} SD_MMC_HC_SLOT_INFO;
-
-typedef struct {
- UINT32 TimeoutFreq:6; // bit 0:5
- UINT32 Reserved:1; // bit 6
- UINT32 TimeoutUnit:1; // bit 7
- UINT32 BaseClkFreq:8; // bit 8:15
- UINT32 MaxBlkLen:2; // bit 16:17
- UINT32 BusWidth8:1; // bit 18
- UINT32 Adma2:1; // bit 19
- UINT32 Reserved2:1; // bit 20
- UINT32 HighSpeed:1; // bit 21
- UINT32 Sdma:1; // bit 22
- UINT32 SuspRes:1; // bit 23
- UINT32 Voltage33:1; // bit 24
- UINT32 Voltage30:1; // bit 25
- UINT32 Voltage18:1; // bit 26
- UINT32 Reserved3:1; // bit 27
- UINT32 SysBus64:1; // bit 28
- UINT32 AsyncInt:1; // bit 29
- UINT32 SlotType:2; // bit 30:31
- UINT32 Sdr50:1; // bit 32
- UINT32 Sdr104:1; // bit 33
- UINT32 Ddr50:1; // bit 34
- UINT32 Reserved4:1; // bit 35
- UINT32 DriverTypeA:1; // bit 36
- UINT32 DriverTypeC:1; // bit 37
- UINT32 DriverTypeD:1; // bit 38
- UINT32 DriverType4:1; // bit 39
- UINT32 TimerCount:4; // bit 40:43
- UINT32 Reserved5:1; // bit 44
- UINT32 TuningSDR50:1; // bit 45
- UINT32 RetuningMod:2; // bit 46:47
- UINT32 ClkMultiplier:8; // bit 48:55
- UINT32 Reserved6:7; // bit 56:62
- UINT32 Hs400:1; // bit 63
-} SD_MMC_HC_SLOT_CAP;
-
-/**
- Dump the content of SD/MMC host controller's Capability Register.
-
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Capability The buffer to store the capability data.
- @param[in] BaseClkFreq The base clock frequency of host controller in MHz.
-
-**/
-VOID
-DumpCapabilityReg (
- IN UINT8 Slot,
- IN SD_MMC_HC_SLOT_CAP *Capability,
- IN UINT32 BaseClkFreq
- );
-
-/**
- Read SlotInfo register from SD/MMC host controller pci config space.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[out] FirstBar The buffer to store the first BAR value.
- @param[out] SlotNum The buffer to store the supported slot number.
-
- @retval EFI_SUCCESS The operation succeeds.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcHcGetSlotInfo (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- OUT UINT8 *FirstBar,
- OUT UINT8 *SlotNum
- );
-
-/**
- Read/Write specified SD/MMC host controller mmio register.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] BarIndex The BAR index of the standard PCI Configuration
- header to use as the base address for the memory
- operation to perform.
- @param[in] Offset The offset within the selected BAR to start the
- memory operation.
- @param[in] Read A boolean to indicate it's read or write operation.
- @param[in] Count The width of the mmio register in bytes.
- Must be 1, 2 , 4 or 8 bytes.
- @param[in, out] Data For read operations, the destination buffer to store
- the results. For write operations, the source buffer
- to write data from. The caller is responsible for
- having ownership of the data buffer and ensuring its
- size not less than Count bytes.
-
- @retval EFI_INVALID_PARAMETER The PciIo or Data is NULL or the Count is not valid.
- @retval EFI_SUCCESS The read/write operation succeeds.
- @retval Others The read/write operation fails.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcHcRwMmio (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 BarIndex,
- IN UINT32 Offset,
- IN BOOLEAN Read,
- IN UINT8 Count,
- IN OUT VOID *Data
- );
-
-/**
- Do OR operation with the value of the specified SD/MMC host controller mmio register.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] BarIndex The BAR index of the standard PCI Configuration
- header to use as the base address for the memory
- operation to perform.
- @param[in] Offset The offset within the selected BAR to start the
- memory operation.
- @param[in] Count The width of the mmio register in bytes.
- Must be 1, 2 , 4 or 8 bytes.
- @param[in] OrData The pointer to the data used to do OR operation.
- The caller is responsible for having ownership of
- the data buffer and ensuring its size not less than
- Count bytes.
-
- @retval EFI_INVALID_PARAMETER The PciIo or OrData is NULL or the Count is not valid.
- @retval EFI_SUCCESS The OR operation succeeds.
- @retval Others The OR operation fails.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcHcOrMmio (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 BarIndex,
- IN UINT32 Offset,
- IN UINT8 Count,
- IN VOID *OrData
- );
-
-/**
- Do AND operation with the value of the specified SD/MMC host controller mmio register.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] BarIndex The BAR index of the standard PCI Configuration
- header to use as the base address for the memory
- operation to perform.
- @param[in] Offset The offset within the selected BAR to start the
- memory operation.
- @param[in] Count The width of the mmio register in bytes.
- Must be 1, 2 , 4 or 8 bytes.
- @param[in] AndData The pointer to the data used to do AND operation.
- The caller is responsible for having ownership of
- the data buffer and ensuring its size not less than
- Count bytes.
-
- @retval EFI_INVALID_PARAMETER The PciIo or AndData is NULL or the Count is not valid.
- @retval EFI_SUCCESS The AND operation succeeds.
- @retval Others The AND operation fails.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcHcAndMmio (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 BarIndex,
- IN UINT32 Offset,
- IN UINT8 Count,
- IN VOID *AndData
- );
-
-/**
- Wait for the value of the specified MMIO register set to the test value.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] BarIndex The BAR index of the standard PCI Configuration
- header to use as the base address for the memory
- operation to perform.
- @param[in] Offset The offset within the selected BAR to start the
- memory operation.
- @param[in] Count The width of the mmio register in bytes.
- Must be 1, 2, 4 or 8 bytes.
- @param[in] MaskValue The mask value of memory.
- @param[in] TestValue The test value of memory.
- @param[in] Timeout The time out value for wait memory set, uses 1
- microsecond as a unit.
-
- @retval EFI_TIMEOUT The MMIO register hasn't expected value in timeout
- range.
- @retval EFI_SUCCESS The MMIO register has expected value.
- @retval Others The MMIO operation fails.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcHcWaitMmioSet (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 BarIndex,
- IN UINT32 Offset,
- IN UINT8 Count,
- IN UINT64 MaskValue,
- IN UINT64 TestValue,
- IN UINT64 Timeout
- );
-
-/**
- Software reset the specified SD/MMC host controller.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
-
- @retval EFI_SUCCESS The software reset executes successfully.
- @retval Others The software reset fails.
-
-**/
-EFI_STATUS
-SdMmcHcReset (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot
- );
-
-/**
- Set all interrupt status bits in Normal and Error Interrupt Status Enable
- register.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
-
- @retval EFI_SUCCESS The operation executes successfully.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdMmcHcEnableInterrupt (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot
- );
-
-/**
- Get the capability data from the specified slot.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[out] Capability The buffer to store the capability data.
-
- @retval EFI_SUCCESS The operation executes successfully.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdMmcHcGetCapability (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- OUT SD_MMC_HC_SLOT_CAP *Capability
- );
-
-/**
- Get the maximum current capability data from the specified slot.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[out] MaxCurrent The buffer to store the maximum current capability data.
-
- @retval EFI_SUCCESS The operation executes successfully.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdMmcHcGetMaxCurrent (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- OUT UINT64 *MaxCurrent
- );
-
-/**
- Detect whether there is a SD/MMC card attached at the specified SD/MMC host controller
- slot.
-
- Refer to SD Host Controller Simplified spec 3.0 Section 3.1 for details.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[out] MediaPresent The pointer to the media present boolean value.
-
- @retval EFI_SUCCESS There is no media change happened.
- @retval EFI_MEDIA_CHANGED There is media change happened.
- @retval Others The detection fails.
-
-**/
-EFI_STATUS
-SdMmcHcCardDetect (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- OUT BOOLEAN *MediaPresent
- );
-
-/**
- Stop SD/MMC card clock.
-
- Refer to SD Host Controller Simplified spec 3.0 Section 3.2.2 for details.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
-
- @retval EFI_SUCCESS Succeed to stop SD/MMC clock.
- @retval Others Fail to stop SD/MMC clock.
-
-**/
-EFI_STATUS
-SdMmcHcStopClock (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot
- );
-
-/**
- SD/MMC card clock supply.
-
- Refer to SD Host Controller Simplified spec 3.0 Section 3.2.1 for details.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] ClockFreq The max clock frequency to be set. The unit is KHz.
- @param[in] BaseClkFreq The base clock frequency of host controller in MHz.
-
- @retval EFI_SUCCESS The clock is supplied successfully.
- @retval Others The clock isn't supplied successfully.
-
-**/
-EFI_STATUS
-SdMmcHcClockSupply (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN UINT64 ClockFreq,
- IN UINT32 BaseClkFreq
- );
-
-/**
- SD/MMC bus power control.
-
- Refer to SD Host Controller Simplified spec 3.0 Section 3.3 for details.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] PowerCtrl The value setting to the power control register.
-
- @retval TRUE There is a SD/MMC card attached.
- @retval FALSE There is no a SD/MMC card attached.
-
-**/
-EFI_STATUS
-SdMmcHcPowerControl (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN UINT8 PowerCtrl
- );
-
-/**
- Set the SD/MMC bus width.
-
- Refer to SD Host Controller Simplified spec 3.0 Section 3.4 for details.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] BusWidth The bus width used by the SD/MMC device, it must be 1, 4 or 8.
-
- @retval EFI_SUCCESS The bus width is set successfully.
- @retval Others The bus width isn't set successfully.
-
-**/
-EFI_STATUS
-SdMmcHcSetBusWidth (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN UINT16 BusWidth
- );
-
-/**
- Supply SD/MMC card with lowest clock frequency at initialization.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] BaseClkFreq The base clock frequency of host controller in MHz.
-
- @retval EFI_SUCCESS The clock is supplied successfully.
- @retval Others The clock isn't supplied successfully.
-
-**/
-EFI_STATUS
-SdMmcHcInitClockFreq (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN UINT32 BaseClkFreq
- );
-
-/**
- Supply SD/MMC card with maximum voltage at initialization.
-
- Refer to SD Host Controller Simplified spec 3.0 Section 3.3 for details.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Capability The capability of the slot.
-
- @retval EFI_SUCCESS The voltage is supplied successfully.
- @retval Others The voltage isn't supplied successfully.
-
-**/
-EFI_STATUS
-SdMmcHcInitPowerVoltage (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN SD_MMC_HC_SLOT_CAP Capability
- );
-
-/**
- Initialize the Timeout Control register with most conservative value at initialization.
-
- Refer to SD Host Controller Simplified spec 3.0 Section 2.2.15 for details.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
-
- @retval EFI_SUCCESS The timeout control register is configured successfully.
- @retval Others The timeout control register isn't configured successfully.
-
-**/
-EFI_STATUS
-SdMmcHcInitTimeoutCtrl (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot
- );
-
-/**
- Initial SD/MMC host controller with lowest clock frequency, max power and max timeout value
- at initialization.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Capability The capability of the slot.
- @param[in] BaseClkFreq The base clock frequency of host controller in MHz.
-
- @retval EFI_SUCCESS The host controller is initialized successfully.
- @retval Others The host controller isn't initialized successfully.
-
-**/
-EFI_STATUS
-SdMmcHcInitHost (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN SD_MMC_HC_SLOT_CAP Capability,
- IN UINT32 BaseClkFreq
- );
-
-#endif
diff --git a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonPciHci.h b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonPciHci.h
new file mode 100644
index 0000000..152ba96
--- /dev/null
+++ b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonPciHci.h
@@ -0,0 +1,151 @@
+/** @file
+
+ Provides some data structure definitions used by the SD/MMC host controller driver.
+
+ Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2018, Marvell International, Ltd. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _XENON_PCI_HCI_H_
+#define _XENON_PCI_HCI_H_
+
+/**
+ Read/Write specified SD/MMC host controller mmio register.
+
+ @param[in] PciIo The PCI IO protocol instance.
+ @param[in] BarIndex The BAR index of the standard PCI Configuration
+ header to use as the base address for the memory
+ operation to perform.
+ @param[in] Offset The offset within the selected BAR to start the
+ memory operation.
+ @param[in] Read A boolean to indicate it's read or write operation.
+ @param[in] Count The width of the mmio register in bytes.
+ Must be 1, 2 , 4 or 8 bytes.
+ @param[in, out] Data For read operations, the destination buffer to store
+ the results. For write operations, the source buffer
+ to write data from. The caller is responsible for
+ having ownership of the data buffer and ensuring its
+ size not less than Count bytes.
+
+ @retval EFI_INVALID_PARAMETER The PciIo or Data is NULL or the Count is not valid.
+ @retval EFI_SUCCESS The read/write operation succeeds.
+ @retval Others The read/write operation fails.
+
+**/
+EFI_STATUS
+EFIAPI
+XenonHcRwMmio (
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 BarIndex,
+ IN UINT32 Offset,
+ IN BOOLEAN Read,
+ IN UINT8 Count,
+ IN OUT VOID *Data
+ );
+
+/**
+ Do OR operation with the value of the specified SD/MMC host controller mmio register.
+
+ @param[in] PciIo The PCI IO protocol instance.
+ @param[in] BarIndex The BAR index of the standard PCI Configuration
+ header to use as the base address for the memory
+ operation to perform.
+ @param[in] Offset The offset within the selected BAR to start the
+ memory operation.
+ @param[in] Count The width of the mmio register in bytes.
+ Must be 1, 2 , 4 or 8 bytes.
+ @param[in] OrData The pointer to the data used to do OR operation.
+ The caller is responsible for having ownership of
+ the data buffer and ensuring its size not less than
+ Count bytes.
+
+ @retval EFI_INVALID_PARAMETER The PciIo or OrData is NULL or the Count is not valid.
+ @retval EFI_SUCCESS The OR operation succeeds.
+ @retval Others The OR operation fails.
+
+**/
+EFI_STATUS
+EFIAPI
+XenonHcOrMmio (
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 BarIndex,
+ IN UINT32 Offset,
+ IN UINT8 Count,
+ IN VOID *OrData
+ );
+
+/**
+ Do AND operation with the value of the specified SD/MMC host controller mmio register.
+
+ @param[in] PciIo The PCI IO protocol instance.
+ @param[in] BarIndex The BAR index of the standard PCI Configuration
+ header to use as the base address for the memory
+ operation to perform.
+ @param[in] Offset The offset within the selected BAR to start the
+ memory operation.
+ @param[in] Count The width of the mmio register in bytes.
+ Must be 1, 2 , 4 or 8 bytes.
+ @param[in] AndData The pointer to the data used to do AND operation.
+ The caller is responsible for having ownership of
+ the data buffer and ensuring its size not less than
+ Count bytes.
+
+ @retval EFI_INVALID_PARAMETER The PciIo or AndData is NULL or the Count is not valid.
+ @retval EFI_SUCCESS The AND operation succeeds.
+ @retval Others The AND operation fails.
+
+**/
+EFI_STATUS
+EFIAPI
+XenonHcAndMmio (
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 BarIndex,
+ IN UINT32 Offset,
+ IN UINT8 Count,
+ IN VOID *AndData
+ );
+
+/**
+ Wait for the value of the specified MMIO register set to the test value.
+
+ @param[in] PciIo The PCI IO protocol instance.
+ @param[in] BarIndex The BAR index of the standard PCI Configuration
+ header to use as the base address for the memory
+ operation to perform.
+ @param[in] Offset The offset within the selected BAR to start the
+ memory operation.
+ @param[in] Count The width of the mmio register in bytes.
+ Must be 1, 2, 4 or 8 bytes.
+ @param[in] MaskValue The mask value of memory.
+ @param[in] TestValue The test value of memory.
+ @param[in] Timeout The time out value for wait memory set, uses 1
+ microsecond as a unit.
+
+ @retval EFI_TIMEOUT The MMIO register hasn't expected value in timeout
+ range.
+ @retval EFI_SUCCESS The MMIO register has expected value.
+ @retval Others The MMIO operation fails.
+
+**/
+EFI_STATUS
+EFIAPI
+XenonHcWaitMmioSet (
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 BarIndex,
+ IN UINT32 Offset,
+ IN UINT8 Count,
+ IN UINT64 MaskValue,
+ IN UINT64 TestValue,
+ IN UINT64 Timeout
+ );
+
+#endif
diff --git a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.h b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.h
new file mode 100644
index 0000000..0c7a0b7
--- /dev/null
+++ b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.h
@@ -0,0 +1,53 @@
+/*******************************************************************************
+Copyright (C) 2018 Marvell International Ltd.
+
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+* Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+* Neither the name of Marvell nor the names of its contributors may be
+ used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#ifndef _XENON_SD_MMC_OVERRIDE_H_
+#define _XENON_SD_MMC_OVERRIDE_H_
+
+#include <Uefi.h>
+
+#include <Library/DebugLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiDriverEntryPoint.h>
+#include <Library/UefiLib.h>
+
+#include <Protocol/BoardDesc.h>
+#include <Protocol/NonDiscoverableDevice.h>
+#include <Protocol/PciIo.h>
+#include <Protocol/SdMmcOverride.h>
+
+#include "XenonPciHci.h"
+#include "XenonSdhci.h"
+
+#endif
diff --git a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.h b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.h
index 2be0ee6..8bf1835 100644
--- a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.h
+++ b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.h
@@ -32,15 +32,65 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
-#include "SdMmcPciHcDxe.h"
-
+#include <Library/DebugLib.h>
+#include <Library/UefiBootServicesTableLib.h>
#include <Library/IoLib.h>
+#include <Protocol/PciIo.h>
+#include <Protocol/SdMmcOverride.h>
+
+#include "XenonPciHci.h"
+
#define SD_BAR_INDEX 0
#define SIZE_512B 0x200
-/* Register Offset of SD Host Controller SOCP self-defined register */
+/* Register Offset of SD Host Controller */
+#define SDHC_SDMA_ADDR 0x0000
+#define SDHC_ARG2 0x0000
+#define SDHC_BLK_SIZE 0x0004
+#define SDHC_BLK_COUNT 0x0006
+#define SDHC_ARG1 0x0008
+#define SDHC_TRANS_MOD 0x000C
+#define SDHC_COMMAND 0x000E
+#define SDHC_RESPONSE 0x0010
+#define SDHC_BUF_DAT_PORT 0x0020
+#define SDHC_PRESENT_STATE 0x0024
+#define SDHC_HOST_CTRL1 0x0028
+#define SDHC_POWER_CTRL 0x0029
+#define SDHC_BLK_GAP_CTRL 0x002A
+#define SDHC_WAKEUP_CTRL 0x002B
+#define SDHC_CLOCK_CTRL 0x002C
+#define SDHC_TIMEOUT_CTRL 0x002E
+#define SDHC_SW_RST 0x002F
+#define SDHC_NOR_INT_STS 0x0030
+#define SDHC_ERR_INT_STS 0x0032
+#define SDHC_NOR_INT_STS_EN 0x0034
+#define SDHC_ERR_INT_STS_EN 0x0036
+#define SDHC_NOR_INT_SIG_EN 0x0038
+#define SDHC_ERR_INT_SIG_EN 0x003A
+#define SDHC_AUTO_CMD_ERR_STS 0x003C
+#define SDHC_HOST_CTRL2 0x003E
+#define UHS_MODE_SELECT_MASK 0x7
+#define SDHC_CAP 0x0040
+#define SDHC_CAP_BUS_WIDTH8 BIT18
+#define SDHC_CAP_VOLTAGE_33 BIT24
+#define SDHC_CAP_VOLTAGE_30 BIT25
+#define SDHC_CAP_VOLTAGE_18 BIT26
+#define SDHC_CAP_SLOT_TYPE_OFFSET 30
+#define SDHC_CAP_SLOT_TYPE_MASK (BIT30 | BIT31)
+#define SDHC_CAP_SDR50 BIT32
+#define SDHC_CAP_SDR104 BIT33
+#define SDHC_CAP_DDR50 BIT34
+#define SDHC_MAX_CURRENT_CAP 0x0048
+#define SDHC_FORCE_EVT_AUTO_CMD 0x0050
+#define SDHC_FORCE_EVT_ERR_INT 0x0052
+#define SDHC_ADMA_ERR_STS 0x0054
+#define SDHC_ADMA_SYS_ADDR 0x0058
+#define SDHC_PRESET_VAL 0x0060
+#define SDHC_SHARED_BUS_CTRL 0x00E0
+#define SDHC_SLOT_INT_STS 0x00FC
+#define SDHC_CTRL_VER 0x00FE
#define SDHC_IPID 0x0100
#define SDHC_SYS_CFG_INFO 0x0104
@@ -52,10 +102,12 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define SDHC_SYS_OP_CTRL 0x0108
#define AUTO_CLKGATE_DISABLE_MASK (0x1<<20)
-#define SDCLK_IDLEOFF_ENABLE_SHIFT 8
+#define SDCLK_IDLEOFF_ENABLE_MASK (1 << 8)
#define SLOT_ENABLE_SHIFT 0
#define SDHC_SYS_EXT_OP_CTRL 0x010c
+#define MASK_CMD_CONFLICT_ERR (1 << 8)
+
#define SDHC_TEST_OUT 0x0110
#define SDHC_TESTOUT_MUXSEL 0x0114
@@ -169,11 +221,27 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define TMR_RETUN_NO_PRESENT 0xf
#define XENON_MAX_TUN_COUNT 0xb
+#define XENON_SLOT_OP_STATUS_CTRL 0x0128
+#define TUN_CONSECUTIVE_TIMES_SHIFT 16
+#define TUN_CONSECUTIVE_TIMES_MASK 0x7
+#define TUN_CONSECUTIVE_TIMES 0x4
+#define TUNING_STEP_SHIFT 12
+#define TUNING_STEP_MASK 0xF
+
+#define XENON_SLOT_EMMC_CTRL 0x130
+#define ENABLE_DATA_STROBE (1 << 24)
+
+#define XENON_SLOT_EXT_PRESENT_STATE 0x014C
+#define DLL_LOCK_STATE 0x1
+
+#define XENON_SLOT_DLL_CUR_DLY_VAL 0x0150
+
#define EMMC_PHY_REG_BASE 0x170
#define EMMC_PHY_TIMING_ADJUST EMMC_PHY_REG_BASE
#define OUTPUT_QSN_PHASE_SELECT (1 << 17)
#define SAMPL_INV_QSP_PHASE_SELECT (1 << 18)
#define SAMPL_INV_QSP_PHASE_SELECT_SHIFT 18
+#define QSN_PHASE_SLOW_MODE_BIT (1 << 29)
#define PHY_INITIALIZAION (1 << 31)
#define WAIT_CYCLE_BEFORE_USING_MASK 0xf
#define WAIT_CYCLE_BEFORE_USING_SHIFT 12
@@ -199,20 +267,42 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define FC_QSN_RECEN (1 << 27)
#define OEN_QSN (1 << 28)
#define AUTO_RECEN_CTRL (1 << 30)
+#define FC_ALL_CMOS_RECEIVER 0xF000
#define EMMC_PHY_PAD_CONTROL1 (EMMC_PHY_REG_BASE + 0xc)
+#define EMMC5_1_FC_QSP_PD (1 << 9)
+#define EMMC5_1_FC_QSP_PU (1 << 25)
+#define EMMC5_1_FC_CMD_PD (1 << 8)
+#define EMMC5_1_FC_CMD_PU (1 << 24)
+#define EMMC5_1_FC_DQ_PD 0xFF
+#define EMMC5_1_FC_DQ_PU (0xFF << 16)
+
#define EMMC_PHY_PAD_CONTROL2 (EMMC_PHY_REG_BASE + 0x10)
+#define ZNR_MASK 0x1F
+#define ZNR_SHIFT 8
+#define ZPR_MASK 0x1F
+#define ZNR_DEF_VALUE 0xF
+#define ZPR_DEF_VALUE 0xF
+
#define EMMC_PHY_DLL_CONTROL (EMMC_PHY_REG_BASE + 0x14)
-#define DLL_DELAY_TEST_LOWER_SHIFT 8
-#define DLL_DELAY_TEST_LOWER_MASK 0xff
-#define DLL_BYPASS_EN 0x1
+#define DLL_ENABLE (1 << 31)
+#define DLL_UPDATE_STROBE_5_0 (1 << 30)
+#define DLL_REFCLK_SEL (1 << 30)
+#define DLL_UPDATE (1 << 23)
+#define DLL_PHSEL1_SHIFT 24
+#define DLL_PHSEL0_SHIFT 16
+#define DLL_PHASE_MASK 0x3F
+#define DLL_PHASE_90_DEGREE 0x1F
+#define DLL_FAST_LOCK (1 << 5)
+#define DLL_GAIN2X (1 << 3)
+#define DLL_BYPASS_EN (1 << 0)
#define EMMC_LOGIC_TIMING_ADJUST (EMMC_PHY_REG_BASE + 0x18)
#define EMMC_LOGIC_TIMING_ADJUST_LOW (EMMC_PHY_REG_BASE + 0x1c)
#define LOGIC_TIMING_VALUE 0x5a54 /* Recommend by HW team */
-#define QSN_PHASE_SLOW_MODE_BIT (1 << 29)
+#define TUNING_STEP_DIVIDER_SHIFT 6
/* XENON only have one slot 0 */
#define XENON_MMC_SLOT_ID (0)
@@ -227,6 +317,11 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define MMC_TIMING_UHS_DDR50 7
#define MMC_TIMING_MMC_HS200 8
#define MMC_TIMING_MMC_HS400 10
+#define MMC_TIMING_MMC_DDR52 11
+
+/* Custom UHS signaling field values */
+#define XENON_SD_MMC_HC_CTRL_HS200 0x5
+#define XENON_SD_MMC_HC_CTRL_HS400 0x6
/* Data time out default value 0xE: TMCLK x 227 */
#define DATA_TIMEOUT_DEF_VAL 0xE
@@ -305,7 +400,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
UINTN
XenonSetClk (
IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN SD_MMC_HC_PRIVATE_DATA *Private,
IN UINT32 Clock
);
@@ -316,14 +410,14 @@ XenonPhyInit (
VOID
XenonReset (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINT8 Slot,
IN UINT8 Mask
);
EFI_STATUS
XenonTransferData (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINT8 Slot,
IN OUT VOID *Buffer,
IN UINT32 DataLen,
@@ -334,13 +428,16 @@ XenonTransferData (
EFI_STATUS
XenonInit (
- IN SD_MMC_HC_PRIVATE_DATA *Private
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN BOOLEAN Support1v8,
+ IN BOOLEAN SlowMode,
+ IN UINT8 TuningStepDivisor
);
EFI_STATUS
-SdCardSendStatus (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- OUT UINT32 *DevStatus
+XenonSetPhy (
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN BOOLEAN SlowMode,
+ IN UINT8 TuningStepDivisor,
+ IN SD_MMC_BUS_MODE Timing
);
diff --git a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/ComponentName.c b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/ComponentName.c
deleted file mode 100644
index 3329929..0000000
--- a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/ComponentName.c
+++ /dev/null
@@ -1,211 +0,0 @@
-/** @file
- UEFI Component Name(2) protocol implementation for SD/MMC host controller driver.
-
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "SdMmcPciHcDxe.h"
-
-//
-// EFI Component Name Protocol
-//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gSdMmcPciHcComponentName = {
- SdMmcPciHcComponentNameGetDriverName,
- SdMmcPciHcComponentNameGetControllerName,
- "eng"
-};
-
-//
-// EFI Component Name 2 Protocol
-//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gSdMmcPciHcComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) SdMmcPciHcComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) SdMmcPciHcComponentNameGetControllerName,
- "en"
-};
-
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSdMmcPciHcDriverNameTable[] = {
- { "eng;en", L"Edkii Sd/Mmc Host Controller Driver" },
- { NULL , NULL }
-};
-
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSdMmcPciHcControllerNameTable[] = {
- { "eng;en", L"Edkii Sd/Mmc Host Controller" },
- { NULL , NULL }
-};
-
-/**
- Retrieves a Unicode string that is the user readable name of the driver.
-
- This function retrieves the user readable name of a driver in the form of a
- Unicode string. If the driver specified by This has a user readable name in
- the language specified by Language, then a pointer to the driver name is
- returned in DriverName, and EFI_SUCCESS is returned. If the driver specified
- by This does not support the language specified by Language,
- then EFI_UNSUPPORTED is returned.
-
- @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or
- EFI_COMPONENT_NAME_PROTOCOL instance.
-
- @param Language[in] A pointer to a Null-terminated ASCII string
- array indicating the language. This is the
- language of the driver name that the caller is
- requesting, and it must match one of the
- languages specified in SupportedLanguages. The
- number of languages supported by a driver is up
- to the driver writer. Language is specified
- in RFC 4646 or ISO 639-2 language code format.
-
- @param DriverName[out] A pointer to the Unicode string to return.
- This Unicode string is the name of the
- driver specified by This in the language
- specified by Language.
-
- @retval EFI_SUCCESS The Unicode string for the Driver specified by
- This and the language specified by Language was
- returned in DriverName.
-
- @retval EFI_INVALID_PARAMETER Language is NULL.
-
- @retval EFI_INVALID_PARAMETER DriverName is NULL.
-
- @retval EFI_UNSUPPORTED The driver specified by This does not support
- the language specified by Language.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcPciHcComponentNameGetDriverName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN CHAR8 *Language,
- OUT CHAR16 **DriverName
- )
-{
- return LookupUnicodeString2 (
- Language,
- This->SupportedLanguages,
- mSdMmcPciHcDriverNameTable,
- DriverName,
- (BOOLEAN)(This == &gSdMmcPciHcComponentName)
- );
-}
-
-/**
- Retrieves a Unicode string that is the user readable name of the controller
- that is being managed by a driver.
-
- This function retrieves the user readable name of the controller specified by
- ControllerHandle and ChildHandle in the form of a Unicode string. If the
- driver specified by This has a user readable name in the language specified by
- Language, then a pointer to the controller name is returned in ControllerName,
- and EFI_SUCCESS is returned. If the driver specified by This is not currently
- managing the controller specified by ControllerHandle and ChildHandle,
- then EFI_UNSUPPORTED is returned. If the driver specified by This does not
- support the language specified by Language, then EFI_UNSUPPORTED is returned.
-
- @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or
- EFI_COMPONENT_NAME_PROTOCOL instance.
-
- @param ControllerHandle[in] The handle of a controller that the driver
- specified by This is managing. This handle
- specifies the controller whose name is to be
- returned.
-
- @param ChildHandle[in] The handle of the child controller to retrieve
- the name of. This is an optional parameter that
- may be NULL. It will be NULL for device
- drivers. It will also be NULL for a bus drivers
- that wish to retrieve the name of the bus
- controller. It will not be NULL for a bus
- driver that wishes to retrieve the name of a
- child controller.
-
- @param Language[in] A pointer to a Null-terminated ASCII string
- array indicating the language. This is the
- language of the driver name that the caller is
- requesting, and it must match one of the
- languages specified in SupportedLanguages. The
- number of languages supported by a driver is up
- to the driver writer. Language is specified in
- RFC 4646 or ISO 639-2 language code format.
-
- @param ControllerName[out] A pointer to the Unicode string to return.
- This Unicode string is the name of the
- controller specified by ControllerHandle and
- ChildHandle in the language specified by
- Language from the point of view of the driver
- specified by This.
-
- @retval EFI_SUCCESS The Unicode string for the user readable name in
- the language specified by Language for the
- driver specified by This was returned in
- DriverName.
-
- @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE.
-
- @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid
- EFI_HANDLE.
-
- @retval EFI_INVALID_PARAMETER Language is NULL.
-
- @retval EFI_INVALID_PARAMETER ControllerName is NULL.
-
- @retval EFI_UNSUPPORTED The driver specified by This is not currently
- managing the controller specified by
- ControllerHandle and ChildHandle.
-
- @retval EFI_UNSUPPORTED The driver specified by This does not support
- the language specified by Language.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcPciHcComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle, OPTIONAL
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
- )
-{
- EFI_STATUS Status;
-
- if (Language == NULL || ControllerName == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // This is a device driver, so ChildHandle must be NULL.
- //
- if (ChildHandle != NULL) {
- return EFI_UNSUPPORTED;
- }
-
- //
- // Make sure this driver is currently managing ControllerHandle
- //
- Status = EfiTestManagedDevice (
- ControllerHandle,
- gSdMmcPciHcDriverBinding.DriverBindingHandle,
- &gEfiPciIoProtocolGuid
- );
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- return LookupUnicodeString2 (
- Language,
- This->SupportedLanguages,
- mSdMmcPciHcControllerNameTable,
- ControllerName,
- (BOOLEAN)(This == &gSdMmcPciHcComponentName)
- );
-}
diff --git a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/EmmcDevice.c b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/EmmcDevice.c
deleted file mode 100755
index 530a01c..0000000
--- a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/EmmcDevice.c
+++ /dev/null
@@ -1,1164 +0,0 @@
-/** @file
- This file provides some helper functions which are specific for EMMC device.
-
- Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "SdMmcPciHcDxe.h"
-
-/**
- Send command GO_IDLE_STATE (CMD0 with argument of 0x00000000) to the device to
- make it go to Idle State.
-
- Refer to EMMC Electrical Standard Spec 5.1 Section 6.4 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
-
- @retval EFI_SUCCESS The EMMC device is reset correctly.
- @retval Others The device reset fails.
-
-**/
-EFI_STATUS
-EmmcReset (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = EMMC_GO_IDLE_STATE;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeBc;
- SdMmcCmdBlk.ResponseType = 0;
- SdMmcCmdBlk.CommandArgument = 0;
-
- gBS->Stall (1000);
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
-
- return Status;
-}
-
-/**
- Send command SEND_OP_COND to the EMMC device to get the data of the OCR register.
-
- Refer to EMMC Electrical Standard Spec 5.1 Section 6.4 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in, out] Argument On input, the argument of SEND_OP_COND is to send to the device.
- On output, the argument is the value of OCR register.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-EmmcGetOcr (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN OUT UINT32 *Argument
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = EMMC_SEND_OP_COND;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeBcr;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR3;
- SdMmcCmdBlk.CommandArgument = *Argument;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
- if (!EFI_ERROR (Status)) {
- //
- // For details, refer to SD Host Controller Simplified Spec 3.0 Table 2-12.
- //
- *Argument = SdMmcStatusBlk.Resp0;
- }
-
- return Status;
-}
-
-/**
- Broadcast command ALL_SEND_CID to the bus to ask all the EMMC devices to send the
- data of their CID registers.
-
- Refer to EMMC Electrical Standard Spec 5.1 Section 6.4 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-EmmcGetAllCid (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = EMMC_ALL_SEND_CID;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeBcr;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR2;
- SdMmcCmdBlk.CommandArgument = 0;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
-
- return Status;
-}
-
-/**
- Send command SET_RELATIVE_ADDR to the EMMC device to assign a Relative device
- Address (RCA).
-
- Refer to EMMC Electrical Standard Spec 5.1 Section 6.4 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Rca The relative device address to be assigned.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-EmmcSetRca (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = EMMC_SET_RELATIVE_ADDR;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
- SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
-
- return Status;
-}
-
-/**
- Send command SEND_CSD to the EMMC device to get the data of the CSD register.
-
- Refer to EMMC Electrical Standard Spec 5.1 Section 6.10.4 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Rca The relative device address of selected device.
- @param[out] Csd The buffer to store the content of the CSD register.
- Note the caller should ignore the lowest byte of this
- buffer as the content of this byte is meaningless even
- if the operation succeeds.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-EmmcGetCsd (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- OUT EMMC_CSD *Csd
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = EMMC_SEND_CSD;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR2;
- SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
- if (!EFI_ERROR (Status)) {
- //
- // For details, refer to SD Host Controller Simplified Spec 3.0 Table 2-12.
- //
- CopyMem (((UINT8*)Csd) + 1, &SdMmcStatusBlk.Resp0, sizeof (EMMC_CSD) - 1);
- }
-
- return Status;
-}
-
-/**
- Send command SELECT_DESELECT_CARD to the EMMC device to select/deselect it.
-
- Refer to EMMC Electrical Standard Spec 5.1 Section 6.10.4 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Rca The relative device address of selected device.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-EmmcSelect (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = EMMC_SELECT_DESELECT_CARD;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
- SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
-
- return Status;
-}
-
-/**
- Send command SEND_EXT_CSD to the EMMC device to get the data of the EXT_CSD register.
-
- Refer to EMMC Electrical Standard Spec 5.1 Section 6.10.4 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[out] ExtCsd The buffer to store the content of the EXT_CSD register.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-EmmcGetExtCsd (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- OUT EMMC_EXT_CSD *ExtCsd
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = EMMC_SEND_EXT_CSD;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAdtc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
- SdMmcCmdBlk.CommandArgument = 0x00000000;
-
- Packet.InDataBuffer = ExtCsd;
- Packet.InTransferLength = sizeof (EMMC_EXT_CSD);
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
- return Status;
-}
-
-/**
- Send command SWITCH to the EMMC device to switch the mode of operation of the
- selected Device or modifies the EXT_CSD registers.
-
- Refer to EMMC Electrical Standard Spec 5.1 Section 6.10.4 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Access The access mode of SWTICH command.
- @param[in] Index The offset of the field to be access.
- @param[in] Value The value to be set to the specified field of EXT_CSD register.
- @param[in] CmdSet The value of CmdSet field of EXT_CSD register.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-EmmcSwitch (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT8 Access,
- IN UINT8 Index,
- IN UINT8 Value,
- IN UINT8 CmdSet
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = EMMC_SWITCH;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1b;
- SdMmcCmdBlk.CommandArgument = (Access << 24) | (Index << 16) | (Value << 8) | CmdSet;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
-
- return Status;
-}
-
-/**
- Send command SEND_STATUS to the addressed EMMC device to get its status register.
-
- Refer to EMMC Electrical Standard Spec 5.1 Section 6.10.4 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Rca The relative device address of addressed device.
- @param[out] DevStatus The returned device status.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-EmmcSendStatus (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- OUT UINT32 *DevStatus
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = EMMC_SEND_STATUS;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
- SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
- if (!EFI_ERROR (Status)) {
- *DevStatus = SdMmcStatusBlk.Resp0;
- }
-
- return Status;
-}
-
-/**
- Send command SEND_TUNING_BLOCK to the EMMC device for HS200 optimal sampling point
- detection.
-
- It may be sent up to 40 times until the host finishes the tuning procedure.
-
- Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.8 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] BusWidth The bus width to work.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-EmmcSendTuningBlk (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT8 BusWidth
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
- UINT8 TuningBlock[128];
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = EMMC_SEND_TUNING_BLOCK;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAdtc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
- SdMmcCmdBlk.CommandArgument = 0;
-
- Packet.InDataBuffer = TuningBlock;
- if (BusWidth == 8) {
- Packet.InTransferLength = sizeof (TuningBlock);
- } else {
- Packet.InTransferLength = 64;
- }
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
-
- return Status;
-}
-
-/**
- Tunning the clock to get HS200 optimal sampling point.
-
- Command SEND_TUNING_BLOCK may be sent up to 40 times until the host finishes the
- tuning procedure.
-
- Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.8 and SD Host Controller
- Simplified Spec 3.0 Figure 2-29 for details.
-
- @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] BusWidth The bus width to work.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-EmmcTuningClkForHs200 (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT8 BusWidth
- )
-{
- EFI_STATUS Status;
- UINT8 HostCtrl2;
- UINT8 Retry;
-
- //
- // Notify the host that the sampling clock tuning procedure starts.
- //
- HostCtrl2 = BIT6;
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- //
- // Ask the device to send a sequence of tuning blocks till the tuning procedure is done.
- //
- Retry = 0;
- do {
- Status = EmmcSendTuningBlk (PassThru, Slot, BusWidth);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "EmmcTuningClkForHs200: Send tuning block fails with %r\n", Status));
- return Status;
- }
-
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, TRUE, sizeof (HostCtrl2), &HostCtrl2);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- if ((HostCtrl2 & (BIT6 | BIT7)) == 0) {
- break;
- }
-
- if ((HostCtrl2 & (BIT6 | BIT7)) == BIT7) {
- return EFI_SUCCESS;
- }
- } while (++Retry < 40);
-
- DEBUG ((DEBUG_ERROR, "EmmcTuningClkForHs200: Send tuning block fails at %d times with HostCtrl2 %02x\n", Retry, HostCtrl2));
- //
- // Abort the tuning procedure and reset the tuning circuit.
- //
- HostCtrl2 = (UINT8)~(BIT6 | BIT7);
- Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- return EFI_DEVICE_ERROR;
-}
-
-/**
- Switch the bus width to specified width.
-
- Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.9 and SD Host Controller
- Simplified Spec 3.0 Figure 3-7 for details.
-
- @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Rca The relative device address to be assigned.
- @param[in] IsDdr If TRUE, use dual data rate data simpling method. Otherwise
- use single data rate data simpling method.
- @param[in] BusWidth The bus width to be set, it could be 4 or 8.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-EmmcSwitchBusWidth (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- IN BOOLEAN IsDdr,
- IN UINT8 BusWidth
- )
-{
- EFI_STATUS Status;
- UINT8 Access;
- UINT8 Index;
- UINT8 Value;
- UINT8 CmdSet;
- UINT32 DevStatus;
-
- //
- // Write Byte, the Value field is written into the byte pointed by Index.
- //
- Access = 0x03;
- Index = OFFSET_OF (EMMC_EXT_CSD, BusWidth);
- if (BusWidth == 4) {
- Value = 1;
- } else if (BusWidth == 8) {
- Value = 2;
- } else {
- return EFI_INVALID_PARAMETER;
- }
-
- if (IsDdr) {
- Value += 4;
- }
-
- CmdSet = 0;
- Status = EmmcSwitch (PassThru, Slot, Access, Index, Value, CmdSet);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "EmmcSwitchBusWidth: Switch to bus width %d fails with %r\n", BusWidth, Status));
- return Status;
- }
-
- Status = EmmcSendStatus (PassThru, Slot, Rca, &DevStatus);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "EmmcSwitchBusWidth: Send status fails with %r\n", Status));
- return Status;
- }
- //
- // Check the switch operation is really successful or not.
- //
- if ((DevStatus & BIT7) != 0) {
- DEBUG ((DEBUG_ERROR, "EmmcSwitchBusWidth: The switch operation fails as DevStatus is 0x%08x\n", DevStatus));
- return EFI_DEVICE_ERROR;
- }
-
- Status = SdMmcHcSetBusWidth (PciIo, Slot, BusWidth);
-
- return Status;
-}
-
-/**
- Switch the clock frequency to the specified value.
-
- Refer to EMMC Electrical Standard Spec 5.1 Section 6.6 and SD Host Controller
- Simplified Spec 3.0 Figure 3-3 for details.
-
- @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Rca The relative device address to be assigned.
- @param[in] HsTiming The value to be written to HS_TIMING field of EXT_CSD register.
- @param[in] ClockFreq The max clock frequency to be set, the unit is MHz.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-EmmcSwitchClockFreq (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- IN UINT8 HsTiming,
- IN UINT32 ClockFreq
- )
-{
- EFI_STATUS Status;
- UINT8 Access;
- UINT8 Index;
- UINT8 Value;
- UINT8 CmdSet;
- UINT32 DevStatus;
- SD_MMC_HC_PRIVATE_DATA *Private;
-
- Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru);
- //
- // Write Byte, the Value field is written into the byte pointed by Index.
- //
- Access = 0x03;
- Index = OFFSET_OF (EMMC_EXT_CSD, HsTiming);
- Value = HsTiming;
- CmdSet = 0;
-
- Status = EmmcSwitch (PassThru, Slot, Access, Index, Value, CmdSet);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "EmmcSwitchClockFreq: Switch to hstiming %d fails with %r\n", HsTiming, Status));
- return Status;
- }
-
- Status = EmmcSendStatus (PassThru, Slot, Rca, &DevStatus);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "EmmcSwitchClockFreq: Send status fails with %r\n", Status));
- return Status;
- }
- //
- // Check the switch operation is really successful or not.
- //
- if ((DevStatus & BIT7) != 0) {
- DEBUG ((DEBUG_ERROR, "EmmcSwitchClockFreq: The switch operation fails as DevStatus is 0x%08x\n", DevStatus));
- return EFI_DEVICE_ERROR;
- }
- //
- // Convert the clock freq unit from MHz to KHz.
- //
- Status = SdMmcHcClockSupply (PciIo, Slot, ClockFreq * 1000, Private->BaseClkFreq[Slot]);
-
- return Status;
-}
-
-/**
- Switch to the High Speed timing according to request.
-
- Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.8 and SD Host Controller
- Simplified Spec 3.0 Figure 2-29 for details.
-
- @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Rca The relative device address to be assigned.
- @param[in] ClockFreq The max clock frequency to be set.
- @param[in] IsDdr If TRUE, use dual data rate data simpling method. Otherwise
- use single data rate data simpling method.
- @param[in] BusWidth The bus width to be set, it could be 4 or 8.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-EmmcSwitchToHighSpeed (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- IN UINT32 ClockFreq,
- IN BOOLEAN IsDdr,
- IN UINT8 BusWidth
- )
-{
- EFI_STATUS Status;
- UINT8 HsTiming;
- UINT8 HostCtrl1;
- UINT8 HostCtrl2;
-
- Status = EmmcSwitchBusWidth (PciIo, PassThru, Slot, Rca, IsDdr, BusWidth);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- //
- // Set to Hight Speed timing
- //
- HostCtrl1 = BIT2;
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Clean UHS Mode Select field of Host Control 2 reigster before update
- //
- HostCtrl2 = (UINT8)~0x7;
- Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- //
- // Set UHS Mode Select field of Host Control 2 reigster to SDR12/25/50
- //
- if (IsDdr) {
- HostCtrl2 = BIT2;
- } else if (ClockFreq == 52) {
- HostCtrl2 = BIT1;
- } else if (ClockFreq == 26) {
- HostCtrl2 = BIT0;
- } else {
- HostCtrl2 = 0;
- }
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- HsTiming = 1;
- Status = EmmcSwitchClockFreq (PciIo, PassThru, Slot, Rca, HsTiming, ClockFreq);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- return Status;
-}
-
-/**
- Switch to the HS200 timing according to request.
-
- Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.8 and SD Host Controller
- Simplified Spec 3.0 Figure 2-29 for details.
-
- @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Rca The relative device address to be assigned.
- @param[in] ClockFreq The max clock frequency to be set.
- @param[in] BusWidth The bus width to be set, it could be 4 or 8.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-EmmcSwitchToHS200 (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- IN UINT32 ClockFreq,
- IN UINT8 BusWidth
- )
-{
- EFI_STATUS Status;
- UINT8 HsTiming;
- UINT8 HostCtrl2;
- UINT16 ClockCtrl;
-
- if ((BusWidth != 4) && (BusWidth != 8)) {
- return EFI_INVALID_PARAMETER;
- }
-
- Status = EmmcSwitchBusWidth (PciIo, PassThru, Slot, Rca, FALSE, BusWidth);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- //
- // Set to HS200/SDR104 timing
- //
- //
- // Stop bus clock at first
- //
- Status = SdMmcHcStopClock (PciIo, Slot);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- //
- // Clean UHS Mode Select field of Host Control 2 reigster before update
- //
- HostCtrl2 = (UINT8)~0x7;
- Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- //
- // Set UHS Mode Select field of Host Control 2 reigster to SDR104
- //
- HostCtrl2 = BIT0 | BIT1;
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- //
- // Wait Internal Clock Stable in the Clock Control register to be 1 before set SD Clock Enable bit
- //
- Status = SdMmcHcWaitMmioSet (
- PciIo,
- Slot,
- SD_MMC_HC_CLOCK_CTRL,
- sizeof (ClockCtrl),
- BIT1,
- BIT1,
- SD_MMC_HC_GENERIC_TIMEOUT
- );
- if (EFI_ERROR (Status)) {
- return Status;
- }
- //
- // Set SD Clock Enable in the Clock Control register to 1
- //
- ClockCtrl = BIT2;
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
-
- HsTiming = 2;
- Status = EmmcSwitchClockFreq (PciIo, PassThru, Slot, Rca, HsTiming, ClockFreq);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Status = EmmcTuningClkForHs200 (PciIo, PassThru, Slot, BusWidth);
-
- return Status;
-}
-
-/**
- Switch to the HS400 timing according to request.
-
- Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.8 and SD Host Controller
- Simplified Spec 3.0 Figure 2-29 for details.
-
- @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Rca The relative device address to be assigned.
- @param[in] ClockFreq The max clock frequency to be set.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-EmmcSwitchToHS400 (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- IN UINT32 ClockFreq
- )
-{
- EFI_STATUS Status;
- UINT8 HsTiming;
- UINT8 HostCtrl2;
-
- Status = EmmcSwitchToHS200 (PciIo, PassThru, Slot, Rca, ClockFreq, 8);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- //
- // Set to Hight Speed timing and set the clock frequency to a value less than 52MHz.
- //
- HsTiming = 1;
- Status = EmmcSwitchClockFreq (PciIo, PassThru, Slot, Rca, HsTiming, 52);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- //
- // HS400 mode must use 8 data lines.
- //
- Status = EmmcSwitchBusWidth (PciIo, PassThru, Slot, Rca, TRUE, 8);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- //
- // Clean UHS Mode Select field of Host Control 2 reigster before update
- //
- HostCtrl2 = (UINT8)~0x7;
- Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- //
- // Set UHS Mode Select field of Host Control 2 reigster to HS400
- //
- HostCtrl2 = BIT0 | BIT2;
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- HsTiming = 3;
- Status = EmmcSwitchClockFreq (PciIo, PassThru, Slot, Rca, HsTiming, ClockFreq);
-
- return Status;
-}
-
-/**
- Switch the high speed timing according to request.
-
- Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.8 and SD Host Controller
- Simplified Spec 3.0 Figure 2-29 for details.
-
- @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Rca The relative device address to be assigned.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-EmmcSetBusMode (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca
- )
-{
- EFI_STATUS Status;
- EMMC_CSD Csd;
- EMMC_EXT_CSD ExtCsd;
- UINT8 HsTiming;
- BOOLEAN IsDdr;
- UINT32 ClockFreq;
- UINT8 BusWidth;
- SD_MMC_HC_PRIVATE_DATA *Private;
-
- Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru);
-
- Status = EmmcGetCsd (PassThru, Slot, Rca, &Csd);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "EmmcSetBusMode: GetCsd fails with %r\n", Status));
- return Status;
- }
-
- Status = EmmcSelect (PassThru, Slot, Rca);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "EmmcSetBusMode: Select fails with %r\n", Status));
- return Status;
- }
-
- ASSERT (Private->BaseClkFreq[Slot] != 0);
- //
- // Check if the Host Controller support 8bits bus width.
- //
- if (Private->Capability[Slot].BusWidth8 != 0) {
- BusWidth = 8;
- } else {
- BusWidth = 4;
- }
- //
- // Get Deivce_Type from EXT_CSD register.
- //
- Status = EmmcGetExtCsd (PassThru, Slot, &ExtCsd);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "EmmcSetBusMode: GetExtCsd fails with %r\n", Status));
- return Status;
- }
- //
- // Calculate supported bus speed/bus width/clock frequency.
- //
- HsTiming = 0;
- IsDdr = FALSE;
- ClockFreq = 0;
- if (((ExtCsd.DeviceType & (BIT4 | BIT5)) != 0) && (Private->Capability[Slot].Sdr104 != 0)) {
- HsTiming = 2;
- IsDdr = FALSE;
- ClockFreq = 200;
- } else if (((ExtCsd.DeviceType & (BIT2 | BIT3)) != 0) && (Private->Capability[Slot].Ddr50 != 0)) {
- HsTiming = 1;
- IsDdr = TRUE;
- ClockFreq = 52;
- } else if (((ExtCsd.DeviceType & BIT1) != 0) && (Private->Capability[Slot].HighSpeed != 0)) {
- HsTiming = 1;
- IsDdr = FALSE;
- ClockFreq = 52;
- } else if (((ExtCsd.DeviceType & BIT0) != 0) && (Private->Capability[Slot].HighSpeed != 0)) {
- HsTiming = 1;
- IsDdr = FALSE;
- ClockFreq = 26;
- }
- //
- // Check if both of the device and the host controller support HS400 DDR mode.
- //
- if (((ExtCsd.DeviceType & (BIT6 | BIT7)) != 0) && (Private->Capability[Slot].Hs400 != 0)) {
- //
- // The host controller supports 8bits bus.
- //
- ASSERT (BusWidth == 8);
- HsTiming = 3;
- IsDdr = TRUE;
- ClockFreq = 200;
- }
-
- if ((ClockFreq == 0) || (HsTiming == 0)) {
- //
- // Continue using default setting.
- //
- return EFI_SUCCESS;
- }
-
- DEBUG ((DEBUG_INFO, "EmmcSetBusMode: HsTiming %d ClockFreq %d BusWidth %d Ddr %a\n", HsTiming, ClockFreq, BusWidth, IsDdr ? "TRUE":"FALSE"));
-
- if (HsTiming == 3) {
- //
- // Execute HS400 timing switch procedure
- //
- Status = EmmcSwitchToHS400 (PciIo, PassThru, Slot, Rca, ClockFreq);
- } else if (HsTiming == 2) {
- //
- // Execute HS200 timing switch procedure
- //
- Status = EmmcSwitchToHS200 (PciIo, PassThru, Slot, Rca, ClockFreq, BusWidth);
- } else {
- //
- // Execute High Speed timing switch procedure
- //
- Status = EmmcSwitchToHighSpeed (PciIo, PassThru, Slot, Rca, ClockFreq, IsDdr, BusWidth);
- }
-
- DEBUG ((DEBUG_INFO, "EmmcSetBusMode: Switch to %a %r\n", (HsTiming == 3) ? "HS400" : ((HsTiming == 2) ? "HS200" : "HighSpeed"), Status));
-
- return Status;
-}
-
-/**
- Execute EMMC device identification procedure.
-
- Refer to EMMC Electrical Standard Spec 5.1 Section 6.4 for details.
-
- @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.
- @param[in] Slot The slot number of the SD card to send the command to.
-
- @retval EFI_SUCCESS There is a EMMC card.
- @retval Others There is not a EMMC card.
-
-**/
-EFI_STATUS
-EmmcIdentification (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 Slot
- )
-{
- EFI_STATUS Status;
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- UINT32 Ocr;
- UINT16 Rca;
-
- PciIo = Private->PciIo;
- PassThru = &Private->PassThru;
-
- Status = EmmcReset (PassThru, Slot);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_VERBOSE, "EmmcIdentification: Executing Cmd0 fails with %r\n", Status));
- return Status;
- }
-
- Ocr = 0;
- do {
- Status = EmmcGetOcr (PassThru, Slot, &Ocr);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_VERBOSE, "EmmcIdentification: Executing Cmd1 fails with %r\n", Status));
- return Status;
- }
- Ocr |= BIT30;
- } while ((Ocr & BIT31) == 0);
-
- Status = EmmcGetAllCid (PassThru, Slot);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_VERBOSE, "EmmcIdentification: Executing Cmd2 fails with %r\n", Status));
- return Status;
- }
- //
- // Slot starts from 0 and valid RCA starts from 1.
- // Here we takes a simple formula to calculate the RCA.
- // Don't support multiple devices on the slot, that is
- // shared bus slot feature.
- //
- Rca = Slot + 1;
- Status = EmmcSetRca (PassThru, Slot, Rca);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "EmmcIdentification: Executing Cmd3 fails with %r\n", Status));
- return Status;
- }
- //
- // Enter Data Tranfer Mode.
- //
- DEBUG ((DEBUG_INFO, "EmmcIdentification: Found a EMMC device at slot [%d], RCA [%d]\n", Slot, Rca));
- Private->Slot[Slot].CardType = EmmcCardType;
-
- Status = EmmcSetBusMode (PciIo, PassThru, Slot, Rca);
-
- return Status;
-}
-
diff --git a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdDevice.c b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdDevice.c
deleted file mode 100644
index ea7eed7..0000000
--- a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdDevice.c
+++ /dev/null
@@ -1,1190 +0,0 @@
-/** @file
- This file provides some helper functions which are specific for SD card device.
-
- Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "SdMmcPciHcDxe.h"
-
-/**
- Send command GO_IDLE_STATE to the device to make it go to Idle State.
-
- Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
-
- @retval EFI_SUCCESS The SD device is reset correctly.
- @retval Others The device reset fails.
-
-**/
-EFI_STATUS
-SdCardReset (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = SD_GO_IDLE_STATE;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeBc;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
-
- return Status;
-}
-
-/**
- Send command SEND_IF_COND to the device to inquiry the SD Memory Card interface
- condition.
-
- Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] SupplyVoltage The supplied voltage by the host.
- @param[in] CheckPattern The check pattern to be sent to the device.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdCardVoltageCheck (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT8 SupplyVoltage,
- IN UINT8 CheckPattern
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = SD_SEND_IF_COND;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeBcr;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR7;
- SdMmcCmdBlk.CommandArgument = (SupplyVoltage << 8) | CheckPattern;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
-
- if (!EFI_ERROR (Status)) {
- if (SdMmcStatusBlk.Resp0 != SdMmcCmdBlk.CommandArgument) {
- return EFI_DEVICE_ERROR;
- }
- }
-
- return Status;
-}
-
-/**
- Send command SDIO_SEND_OP_COND to the device to see whether it is SDIO device.
-
- Refer to SDIO Simplified Spec 3 Section 3.2 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] VoltageWindow The supply voltage window.
- @param[in] S18R The boolean to show if it should switch to 1.8v.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdioSendOpCond (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT32 VoltageWindow,
- IN BOOLEAN S18R
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
- UINT32 Switch;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = SDIO_SEND_OP_COND;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeBcr;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR4;
-
- Switch = S18R ? BIT24 : 0;
-
- SdMmcCmdBlk.CommandArgument = (VoltageWindow & 0xFFFFFF) | Switch;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
-
- return Status;
-}
-
-/**
- Send command SD_SEND_OP_COND to the device to see whether it is SDIO device.
-
- Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Rca The relative device address of addressed device.
- @param[in] VoltageWindow The supply voltage window.
- @param[in] S18R The boolean to show if it should switch to 1.8v.
- @param[in] Xpc The boolean to show if it should provide 0.36w power control.
- @param[in] Hcs The boolean to show if it support host capacity info.
- @param[out] Ocr The buffer to store returned OCR register value.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdCardSendOpCond (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- IN UINT32 VoltageWindow,
- IN BOOLEAN S18R,
- IN BOOLEAN Xpc,
- IN BOOLEAN Hcs,
- OUT UINT32 *Ocr
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
- UINT32 Switch;
- UINT32 MaxPower;
- UINT32 HostCapacity;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = SD_APP_CMD;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
- SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- SdMmcCmdBlk.CommandIndex = SD_SEND_OP_COND;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeBcr;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR3;
-
- Switch = S18R ? BIT24 : 0;
- MaxPower = Xpc ? BIT28 : 0;
- HostCapacity = Hcs ? BIT30 : 0;
-
- SdMmcCmdBlk.CommandArgument = (VoltageWindow & 0xFFFFFF) | Switch | MaxPower | HostCapacity;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
- if (!EFI_ERROR (Status)) {
- //
- // For details, refer to SD Host Controller Simplified Spec 3.0 Table 2-12.
- //
- *Ocr = SdMmcStatusBlk.Resp0;
- }
-
- return Status;
-}
-
-/**
- Broadcast command ALL_SEND_CID to the bus to ask all the SD devices to send the
- data of their CID registers.
-
- Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdCardAllSendCid (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = SD_ALL_SEND_CID;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeBcr;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR2;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
-
- return Status;
-}
-
-/**
- Send command SET_RELATIVE_ADDR to the SD device to assign a Relative device
- Address (RCA).
-
- Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[out] Rca The relative device address to assign.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdCardSetRca (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- OUT UINT16 *Rca
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = SD_SET_RELATIVE_ADDR;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeBcr;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR6;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
- if (!EFI_ERROR (Status)) {
- *Rca = (UINT16)(SdMmcStatusBlk.Resp0 >> 16);
- }
-
- return Status;
-}
-
-/**
- Send command SEND_CSD to the SD device to get the data of the CSD register.
-
- Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Rca The relative device address of selected device.
- @param[out] Csd The buffer to store the content of the CSD register.
- Note the caller should ignore the lowest byte of this
- buffer as the content of this byte is meaningless even
- if the operation succeeds.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdCardGetCsd (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- OUT SD_CSD *Csd
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = SD_SEND_CSD;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR2;
- SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
- if (!EFI_ERROR (Status)) {
- //
- // For details, refer to SD Host Controller Simplified Spec 3.0 Table 2-12.
- //
- CopyMem (((UINT8*)Csd) + 1, &SdMmcStatusBlk.Resp0, sizeof (SD_CSD) - 1);
- }
-
- return Status;
-}
-
-/**
- Send command SEND_CSD to the SD device to get the data of the CSD register.
-
- Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Rca The relative device address of selected device.
- @param[out] Scr The buffer to store the content of the SCR register.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdCardGetScr (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- OUT SD_SCR *Scr
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = SD_APP_CMD;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
- SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- SdMmcCmdBlk.CommandIndex = SD_SEND_SCR;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAdtc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
-
- Packet.InDataBuffer = Scr;
- Packet.InTransferLength = sizeof (SD_SCR);
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
-
- return Status;
-}
-
-/**
- Send command SELECT_DESELECT_CARD to the SD device to select/deselect it.
-
- Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Rca The relative device address of selected device.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdCardSelect (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = SD_SELECT_DESELECT_CARD;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- if (Rca != 0) {
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1b;
- }
- SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
-
- return Status;
-}
-
-/**
- Send command VOLTAGE_SWITCH to the SD device to switch the voltage of the device.
-
- Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdCardVoltageSwitch (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = SD_VOLTAGE_SWITCH;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
- SdMmcCmdBlk.CommandArgument = 0;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
-
- return Status;
-}
-
-/**
- Send command SET_BUS_WIDTH to the SD device to set the bus width.
-
- Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Rca The relative device address of addressed device.
- @param[in] BusWidth The bus width to be set, it could be 1 or 4.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdCardSetBusWidth (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- IN UINT8 BusWidth
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
- UINT8 Value;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = SD_APP_CMD;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
- SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- SdMmcCmdBlk.CommandIndex = SD_SET_BUS_WIDTH;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
-
- if (BusWidth == 1) {
- Value = 0;
- } else if (BusWidth == 4) {
- Value = 2;
- } else {
- return EFI_INVALID_PARAMETER;
- }
-
- SdMmcCmdBlk.CommandArgument = Value & 0x3;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
- return Status;
-}
-
-/**
- Send command SWITCH_FUNC to the SD device to check switchable function or switch card function.
-
- Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] AccessMode The value for access mode group.
- @param[in] CommandSystem The value for command set group.
- @param[in] DriveStrength The value for drive length group.
- @param[in] PowerLimit The value for power limit group.
- @param[in] Mode Switch or check function.
- @param[out] SwitchResp The return switch function status.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdCardSwitch (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT8 AccessMode,
- IN UINT8 CommandSystem,
- IN UINT8 DriveStrength,
- IN UINT8 PowerLimit,
- IN BOOLEAN Mode,
- OUT UINT8 *SwitchResp
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
- UINT32 ModeValue;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = SD_SWITCH_FUNC;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAdtc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
-
- ModeValue = Mode ? BIT31 : 0;
- SdMmcCmdBlk.CommandArgument = (AccessMode & 0xF) | ((PowerLimit & 0xF) << 4) | \
- ((DriveStrength & 0xF) << 8) | ((DriveStrength & 0xF) << 12) | \
- ModeValue;
-
- Packet.InDataBuffer = SwitchResp;
- Packet.InTransferLength = 64;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
-
- return Status;
-}
-
-/**
- Send command SEND_STATUS to the addressed SD device to get its status register.
-
- Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Rca The relative device address of addressed device.
- @param[out] DevStatus The returned device status.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdCardSendStatus (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- OUT UINT32 *DevStatus
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = SD_SEND_STATUS;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
- SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
- if (!EFI_ERROR (Status)) {
- *DevStatus = SdMmcStatusBlk.Resp0;
- }
-
- return Status;
-}
-
-/**
- Send command SEND_TUNING_BLOCK to the SD device for HS200 optimal sampling point
- detection.
-
- It may be sent up to 40 times until the host finishes the tuning procedure.
-
- Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
-
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdCardSendTuningBlk (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot
- )
-{
- EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;
- EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;
- EFI_STATUS Status;
- UINT8 TuningBlock[64];
-
- ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));
- ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));
- ZeroMem (&Packet, sizeof (Packet));
-
- Packet.SdMmcCmdBlk = &SdMmcCmdBlk;
- Packet.SdMmcStatusBlk = &SdMmcStatusBlk;
- Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;
-
- SdMmcCmdBlk.CommandIndex = SD_SEND_TUNING_BLOCK;
- SdMmcCmdBlk.CommandType = SdMmcCommandTypeAdtc;
- SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;
- SdMmcCmdBlk.CommandArgument = 0;
-
- Packet.InDataBuffer = TuningBlock;
- Packet.InTransferLength = sizeof (TuningBlock);
-
- Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);
-
- return Status;
-}
-
-/**
- Tunning the sampling point of SDR104 or SDR50 bus speed mode.
-
- Command SD_SEND_TUNING_BLOCK may be sent up to 40 times until the host finishes the
- tuning procedure.
-
- Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 and
- SD Host Controller Simplified Spec 3.0 section Figure 3-7 for details.
-
- @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdCardTuningClock (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot
- )
-{
- EFI_STATUS Status;
- UINT8 HostCtrl2;
- UINT8 Retry;
-
- //
- // Notify the host that the sampling clock tuning procedure starts.
- //
- HostCtrl2 = BIT6;
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- //
- // Ask the device to send a sequence of tuning blocks till the tuning procedure is done.
- //
- Retry = 0;
- do {
- Status = SdCardSendTuningBlk (PassThru, Slot);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "SdCardSendTuningBlk: Send tuning block fails with %r\n", Status));
- return Status;
- }
-
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, TRUE, sizeof (HostCtrl2), &HostCtrl2);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- if ((HostCtrl2 & (BIT6 | BIT7)) == 0) {
- break;
- }
- if ((HostCtrl2 & (BIT6 | BIT7)) == BIT7) {
- return EFI_SUCCESS;
- }
- } while (++Retry < 40);
-
- DEBUG ((DEBUG_ERROR, "SdCardTuningClock: Send tuning block fails at %d times with HostCtrl2 %02x\n", Retry, HostCtrl2));
- //
- // Abort the tuning procedure and reset the tuning circuit.
- //
- HostCtrl2 = (UINT8)~(BIT6 | BIT7);
- Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- return EFI_DEVICE_ERROR;
-}
-
-/**
- Switch the bus width to specified width.
-
- Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 and
- SD Host Controller Simplified Spec 3.0 section Figure 3-7 for details.
-
- @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Rca The relative device address to be assigned.
- @param[in] BusWidth The bus width to be set, it could be 4 or 8.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdCardSwitchBusWidth (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- IN UINT8 BusWidth
- )
-{
- EFI_STATUS Status;
- UINT32 DevStatus;
-
- Status = SdCardSetBusWidth (PassThru, Slot, Rca, BusWidth);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "SdCardSwitchBusWidth: Switch to bus width %d fails with %r\n", BusWidth, Status));
- return Status;
- }
-
- Status = SdCardSendStatus (PassThru, Slot, Rca, &DevStatus);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "SdCardSwitchBusWidth: Send status fails with %r\n", Status));
- return Status;
- }
- //
- // Check the switch operation is really successful or not.
- //
- if ((DevStatus >> 16) != 0) {
- DEBUG ((DEBUG_ERROR, "SdCardSwitchBusWidth: The switch operation fails as DevStatus is 0x%08x\n", DevStatus));
- return EFI_DEVICE_ERROR;
- }
-
- Status = SdMmcHcSetBusWidth (PciIo, Slot, BusWidth);
-
- return Status;
-}
-
-/**
- Switch the high speed timing according to request.
-
- Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 and
- SD Host Controller Simplified Spec 3.0 section Figure 2-29 for details.
-
- @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Rca The relative device address to be assigned.
- @param[in] S18A The boolean to show if it's a UHS-I SD card.
-
- @retval EFI_SUCCESS The operation is done correctly.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdCardSetBusMode (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,
- IN UINT8 Slot,
- IN UINT16 Rca,
- IN BOOLEAN S18A
- )
-{
- EFI_STATUS Status;
- SD_MMC_HC_SLOT_CAP *Capability;
- UINT32 ClockFreq;
- UINT8 BusWidth;
- UINT8 AccessMode;
- UINT8 HostCtrl1;
- UINT8 HostCtrl2;
- UINT8 SwitchResp[64];
- SD_MMC_HC_PRIVATE_DATA *Private;
-
- Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru);
-
- Capability = &Private->Capability[Slot];
-
- Status = SdCardSelect (PassThru, Slot, Rca);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- BusWidth = 4;
-
- Status = SdCardSwitchBusWidth (PciIo, PassThru, Slot, Rca, BusWidth);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- //
- // Get the supported bus speed from SWITCH cmd return data group #1.
- //
- Status = SdCardSwitch (PassThru, Slot, 0xF, 0xF, 0xF, 0xF, FALSE, SwitchResp);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- //
- // Calculate supported bus speed/bus width/clock frequency by host and device capability.
- //
- ClockFreq = 0;
- if (S18A && (Capability->Sdr104 != 0) && ((SwitchResp[13] & BIT3) != 0)) {
- ClockFreq = 208;
- AccessMode = 3;
- } else if (S18A && (Capability->Sdr50 != 0) && ((SwitchResp[13] & BIT2) != 0)) {
- ClockFreq = 100;
- AccessMode = 2;
- } else if (S18A && (Capability->Ddr50 != 0) && ((SwitchResp[13] & BIT4) != 0)) {
- ClockFreq = 50;
- AccessMode = 4;
- } else if ((SwitchResp[13] & BIT1) != 0) {
- ClockFreq = 50;
- AccessMode = 1;
- } else {
- ClockFreq = 25;
- AccessMode = 0;
- }
-
- Status = SdCardSwitch (PassThru, Slot, AccessMode, 0xF, 0xF, 0xF, TRUE, SwitchResp);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- if ((SwitchResp[16] & 0xF) != AccessMode) {
- DEBUG ((DEBUG_ERROR, "SdCardSetBusMode: Switch to AccessMode %d ClockFreq %d BusWidth %d fails! The Switch response is 0x%1x\n", AccessMode, ClockFreq, BusWidth, SwitchResp[16] & 0xF));
- return EFI_DEVICE_ERROR;
- }
-
- DEBUG ((DEBUG_INFO, "SdCardSetBusMode: Switch to AccessMode %d ClockFreq %d BusWidth %d\n", AccessMode, ClockFreq, BusWidth));
-
- //
- // Set to Hight Speed timing
- //
- if (AccessMode == 1) {
- HostCtrl1 = BIT2;
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- }
-
- HostCtrl2 = (UINT8)~0x7;
- Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- HostCtrl2 = AccessMode;
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Status = SdMmcHcClockSupply (PciIo, Slot, ClockFreq * 1000, Private->BaseClkFreq[Slot]);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- if ((AccessMode == 3) || ((AccessMode == 2) && (Capability->TuningSDR50 != 0))) {
- Status = SdCardTuningClock (PciIo, PassThru, Slot);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- }
-
- return Status;
-}
-
-/**
- Execute SD device identification procedure.
-
- Refer to SD Physical Layer Simplified Spec 4.1 Section 3.6 for details.
-
- @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.
- @param[in] Slot The slot number of the SD card to send the command to.
-
- @retval EFI_SUCCESS There is a SD card.
- @retval Others There is not a SD card.
-
-**/
-EFI_STATUS
-SdCardIdentification (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 Slot
- )
-{
- EFI_STATUS Status;
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- UINT32 Ocr;
- UINT16 Rca;
- BOOLEAN Xpc;
- BOOLEAN S18r;
- UINT64 MaxCurrent;
- UINT16 ControllerVer;
- UINT8 PowerCtrl;
- UINT32 PresentState;
- UINT8 HostCtrl2;
-
- PciIo = Private->PciIo;
- PassThru = &Private->PassThru;
- //
- // 1. Send Cmd0 to the device
- //
- Status = SdCardReset (PassThru, Slot);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_INFO, "SdCardIdentification: Executing Cmd0 fails with %r\n", Status));
- return Status;
- }
- //
- // 2. Send Cmd8 to the device
- //
- Status = SdCardVoltageCheck (PassThru, Slot, 0x1, 0xFF);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_INFO, "SdCardIdentification: Executing Cmd8 fails with %r\n", Status));
- return Status;
- }
- //
- // 3. Send SDIO Cmd5 to the device to the SDIO device OCR register.
- //
- Status = SdioSendOpCond (PassThru, Slot, 0, FALSE);
- if (!EFI_ERROR (Status)) {
- DEBUG ((DEBUG_INFO, "SdCardIdentification: Found SDIO device, ignore it as we don't support\n"));
- return EFI_DEVICE_ERROR;
- }
- //
- // 4. Send Acmd41 with voltage window 0 to the device
- //
- Status = SdCardSendOpCond (PassThru, Slot, 0, 0, FALSE, FALSE, FALSE, &Ocr);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_INFO, "SdCardIdentification: Executing SdCardSendOpCond fails with %r\n", Status));
- return EFI_DEVICE_ERROR;
- }
-
- if (Private->Capability[Slot].Voltage33 != 0) {
- //
- // Support 3.3V
- //
- MaxCurrent = ((UINT32)Private->MaxCurrent[Slot] & 0xFF) * 4;
- } else if (Private->Capability[Slot].Voltage30 != 0) {
- //
- // Support 3.0V
- //
- MaxCurrent = (((UINT32)Private->MaxCurrent[Slot] >> 8) & 0xFF) * 4;
- } else if (Private->Capability[Slot].Voltage18 != 0) {
- //
- // Support 1.8V
- //
- MaxCurrent = (((UINT32)Private->MaxCurrent[Slot] >> 16) & 0xFF) * 4;
- } else {
- ASSERT (FALSE);
- return EFI_DEVICE_ERROR;
- }
-
- if (MaxCurrent >= 150) {
- Xpc = TRUE;
- } else {
- Xpc = FALSE;
- }
-
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_CTRL_VER, TRUE, sizeof (ControllerVer), &ControllerVer);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- if ((ControllerVer & 0xFF) == 2) {
- S18r = TRUE;
- } else if (((ControllerVer & 0xFF) == 0) || ((ControllerVer & 0xFF) == 1)) {
- S18r = FALSE;
- } else {
- ASSERT (FALSE);
- return EFI_UNSUPPORTED;
- }
- //
- // 5. Repeatly send Acmd41 with supply voltage window to the device.
- // Note here we only support the cards complied with SD physical
- // layer simplified spec version 2.0 and version 3.0 and above.
- //
- do {
- Status = SdCardSendOpCond (PassThru, Slot, 0, Ocr, S18r, Xpc, TRUE, &Ocr);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "SdCardIdentification: SdCardSendOpCond fails with %r Ocr %x, S18r %x, Xpc %x\n", Status, Ocr, S18r, Xpc));
- return EFI_DEVICE_ERROR;
- }
- } while ((Ocr & BIT31) == 0);
-
- //
- // 6. If the S18A bit is set and the Host Controller supports 1.8V signaling
- // (One of support bits is set to 1: SDR50, SDR104 or DDR50 in the
- // Capabilities register), switch its voltage to 1.8V.
- //
- if ((Private->Capability[Slot].Sdr50 != 0 ||
- Private->Capability[Slot].Sdr104 != 0 ||
- Private->Capability[Slot].Ddr50 != 0) &&
- ((Ocr & BIT24) != 0)) {
- Status = SdCardVoltageSwitch (PassThru, Slot);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "SdCardIdentification: Executing SdCardVoltageSwitch fails with %r\n", Status));
- Status = EFI_DEVICE_ERROR;
- goto Error;
- } else {
- Status = SdMmcHcStopClock (PciIo, Slot);
- if (EFI_ERROR (Status)) {
- Status = EFI_DEVICE_ERROR;
- goto Error;
- }
-
- SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_PRESENT_STATE, TRUE, sizeof (PresentState), &PresentState);
- if (((PresentState >> 20) & 0xF) != 0) {
- DEBUG ((DEBUG_ERROR, "SdCardIdentification: SwitchVoltage fails with PresentState = 0x%x\n", PresentState));
- Status = EFI_DEVICE_ERROR;
- goto Error;
- }
- HostCtrl2 = BIT3;
- SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
-
- gBS->Stall (5000);
-
- SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, TRUE, sizeof (HostCtrl2), &HostCtrl2);
- if ((HostCtrl2 & BIT3) == 0) {
- DEBUG ((DEBUG_ERROR, "SdCardIdentification: SwitchVoltage fails with HostCtrl2 = 0x%x\n", HostCtrl2));
- Status = EFI_DEVICE_ERROR;
- goto Error;
- }
-
- SdMmcHcInitClockFreq (PciIo, Slot, Private->BaseClkFreq[Slot]);
-
- gBS->Stall (1000);
-
- SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_PRESENT_STATE, TRUE, sizeof (PresentState), &PresentState);
- if (((PresentState >> 20) & 0xF) != 0xF) {
- DEBUG ((DEBUG_ERROR, "SdCardIdentification: SwitchVoltage fails with PresentState = 0x%x, It should be 0xF\n", PresentState));
- Status = EFI_DEVICE_ERROR;
- goto Error;
- }
- }
- DEBUG ((DEBUG_INFO, "SdCardIdentification: Switch to 1.8v signal voltage success\n"));
- }
-
- Status = SdCardAllSendCid (PassThru, Slot);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "SdCardIdentification: Executing SdCardAllSendCid fails with %r\n", Status));
- return Status;
- }
-
- Status = SdCardSetRca (PassThru, Slot, &Rca);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "SdCardIdentification: Executing SdCardSetRca fails with %r\n", Status));
- return Status;
- }
- //
- // Enter Data Tranfer Mode.
- //
- DEBUG ((DEBUG_INFO, "SdCardIdentification: Found a SD device at slot [%d]\n", Slot));
- Private->Slot[Slot].CardType = SdCardType;
-
- Status = SdCardSetBusMode (PciIo, PassThru, Slot, Rca, ((Ocr & BIT24) != 0));
-
- return Status;
-
-Error:
- //
- // Set SD Bus Power = 0
- //
- PowerCtrl = (UINT8)~BIT0;
- Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_POWER_CTRL, sizeof (PowerCtrl), &PowerCtrl);
- return EFI_DEVICE_ERROR;
-}
-
diff --git a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.c b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.c
deleted file mode 100644
index 80159a4..0000000
--- a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.c
+++ /dev/null
@@ -1,1320 +0,0 @@
-/** @file
- This driver is used to manage SD/MMC PCI host controllers which are compliance
- with SD Host Controller Simplified Specification version 3.00.
-
- It would expose EFI_SD_MMC_PASS_THRU_PROTOCOL for upper layer use.
-
- Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
- Copyright (C) 2016 Marvell International Ltd. All rigths reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "SdMmcPciHcDxe.h"
-#include "XenonSdhci.h"
-
-//
-// Driver Global Variables
-//
-EFI_DRIVER_BINDING_PROTOCOL gSdMmcPciHcDriverBinding = {
- SdMmcPciHcDriverBindingSupported,
- SdMmcPciHcDriverBindingStart,
- SdMmcPciHcDriverBindingStop,
- 0x10,
- NULL,
- NULL
-};
-
-//
-// Template for SD/MMC host controller private data.
-//
-SD_MMC_HC_PRIVATE_DATA gSdMmcPciHcTemplate = {
- SD_MMC_HC_PRIVATE_SIGNATURE, // Signature
- NULL, // ControllerHandle
- NULL, // PciIo
- { // PassThru
- sizeof (UINT32),
- SdMmcPassThruPassThru,
- SdMmcPassThruGetNextSlot,
- SdMmcPassThruBuildDevicePath,
- SdMmcPassThruGetSlotNumber,
- SdMmcPassThruResetDevice
- },
- 0, // PciAttributes
- 0, // PreviousSlot
- NULL, // TimerEvent
- NULL, // ConnectEvent
- // Queue
- INITIALIZE_LIST_HEAD_VARIABLE (gSdMmcPciHcTemplate.Queue),
- { // Slot
- {0, UnknownSlot, 0, 0, 0}, {0, UnknownSlot, 0, 0, 0}, {0, UnknownSlot, 0, 0, 0},
- {0, UnknownSlot, 0, 0, 0}, {0, UnknownSlot, 0, 0, 0}, {0, UnknownSlot, 0, 0, 0}
- },
- { // Capability
- {0},
- },
- { // MaxCurrent
- 0,
- },
- 0 // ControllerVersion
-};
-
-SD_DEVICE_PATH mSdDpTemplate = {
- {
- MESSAGING_DEVICE_PATH,
- MSG_SD_DP,
- {
- (UINT8) (sizeof (SD_DEVICE_PATH)),
- (UINT8) ((sizeof (SD_DEVICE_PATH)) >> 8)
- }
- },
- 0
-};
-
-EMMC_DEVICE_PATH mEmmcDpTemplate = {
- {
- MESSAGING_DEVICE_PATH,
- MSG_EMMC_DP,
- {
- (UINT8) (sizeof (EMMC_DEVICE_PATH)),
- (UINT8) ((sizeof (EMMC_DEVICE_PATH)) >> 8)
- }
- },
- 0
-};
-
-//
-// Prioritized function list to detect card type.
-// User could add other card detection logic here.
-//
-CARD_TYPE_DETECT_ROUTINE mCardTypeDetectRoutineTable[] = {
- EmmcIdentification,
- SdCardIdentification,
- NULL
-};
-
-/**
- The entry point for SD host controller driver, used to install this driver on the ImageHandle.
-
- @param[in] ImageHandle The firmware allocated handle for this driver image.
- @param[in] SystemTable Pointer to the EFI system table.
-
- @retval EFI_SUCCESS Driver loaded.
- @retval other Driver not loaded.
-
-**/
-EFI_STATUS
-EFIAPI
-InitializeSdMmcPciHcDxe (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
-
- Status = EfiLibInstallDriverBindingComponentName2 (
- ImageHandle,
- SystemTable,
- &gSdMmcPciHcDriverBinding,
- ImageHandle,
- &gSdMmcPciHcComponentName,
- &gSdMmcPciHcComponentName2
- );
- ASSERT_EFI_ERROR (Status);
-
- return Status;
-}
-
-/**
- Call back function when the timer event is signaled.
-
- @param[in] Event The Event this notify function registered to.
- @param[in] Context Pointer to the context data registered to the
- Event.
-
-**/
-VOID
-EFIAPI
-ProcessAsyncTaskList (
- IN EFI_EVENT Event,
- IN VOID* Context
- )
-{
- SD_MMC_HC_PRIVATE_DATA *Private;
- LIST_ENTRY *Link;
- SD_MMC_HC_TRB *Trb;
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
- BOOLEAN InfiniteWait;
- EFI_EVENT TrbEvent;
-
- Private = (SD_MMC_HC_PRIVATE_DATA*)Context;
-
- //
- // Check if the first entry in the async I/O queue is done or not.
- //
- Status = EFI_SUCCESS;
- Trb = NULL;
- Link = GetFirstNode (&Private->Queue);
- if (!IsNull (&Private->Queue, Link)) {
- Trb = SD_MMC_HC_TRB_FROM_THIS (Link);
- if (!Private->Slot[Trb->Slot].MediaPresent) {
- Status = EFI_NO_MEDIA;
- goto Done;
- }
- if (!Trb->Started) {
- //
- // Check whether the cmd/data line is ready for transfer.
- //
- Status = SdMmcCheckTrbEnv (Private, Trb);
- if (!EFI_ERROR (Status)) {
- Trb->Started = TRUE;
- Status = SdMmcExecTrb (Private, Trb);
- if (EFI_ERROR (Status)) {
- goto Done;
- }
- } else {
- goto Done;
- }
- }
- Status = SdMmcCheckTrbResult (Private, Trb);
- }
-
-Done:
- if ((Trb != NULL) && (Status == EFI_NOT_READY)) {
- Packet = Trb->Packet;
- if (Packet->Timeout == 0) {
- InfiniteWait = TRUE;
- } else {
- InfiniteWait = FALSE;
- }
- if ((!InfiniteWait) && (Trb->Timeout-- == 0)) {
- RemoveEntryList (Link);
- Trb->Packet->TransactionStatus = EFI_TIMEOUT;
- TrbEvent = Trb->Event;
- SdMmcFreeTrb (Trb);
- DEBUG ((DEBUG_VERBOSE, "ProcessAsyncTaskList(): Signal Event %p EFI_TIMEOUT\n", TrbEvent));
- gBS->SignalEvent (TrbEvent);
- return;
- }
- }
- if ((Trb != NULL) && (Status != EFI_NOT_READY)) {
- RemoveEntryList (Link);
- Trb->Packet->TransactionStatus = Status;
- TrbEvent = Trb->Event;
- SdMmcFreeTrb (Trb);
- DEBUG ((DEBUG_VERBOSE, "ProcessAsyncTaskList(): Signal Event %p with %r\n", TrbEvent, Status));
- gBS->SignalEvent (TrbEvent);
- }
- return;
-}
-
-/**
- Sd removable device enumeration callback function when the timer event is signaled.
-
- @param[in] Event The Event this notify function registered to.
- @param[in] Context Pointer to the context data registered to the
- Event.
-
-**/
-VOID
-EFIAPI
-SdMmcPciHcEnumerateDevice (
- IN EFI_EVENT Event,
- IN VOID* Context
- )
-{
- SD_MMC_HC_PRIVATE_DATA *Private;
- EFI_STATUS Status;
- UINT8 Slot;
- BOOLEAN MediaPresent;
- UINT32 RoutineNum;
- CARD_TYPE_DETECT_ROUTINE *Routine;
- UINTN Index;
- LIST_ENTRY *Link;
- LIST_ENTRY *NextLink;
- SD_MMC_HC_TRB *Trb;
- EFI_TPL OldTpl;
-
- Private = (SD_MMC_HC_PRIVATE_DATA*)Context;
-
- for (Slot = 0; Slot < SD_MMC_HC_MAX_SLOT; Slot++) {
- if ((Private->Slot[Slot].Enable) && (Private->Slot[Slot].SlotType == RemovableSlot)) {
- Status = SdMmcHcCardDetect (Private->PciIo, Slot, &MediaPresent);
- if ((Status == EFI_MEDIA_CHANGED) && !MediaPresent) {
- DEBUG ((DEBUG_INFO, "SdMmcPciHcEnumerateDevice: device disconnected at slot %d of pci %p\n", Slot, Private->PciIo));
- Private->Slot[Slot].MediaPresent = FALSE;
- Private->Slot[Slot].Initialized = FALSE;
- //
- // Signal all async task events at the slot with EFI_NO_MEDIA status.
- //
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
- for (Link = GetFirstNode (&Private->Queue);
- !IsNull (&Private->Queue, Link);
- Link = NextLink) {
- NextLink = GetNextNode (&Private->Queue, Link);
- Trb = SD_MMC_HC_TRB_FROM_THIS (Link);
- if (Trb->Slot == Slot) {
- RemoveEntryList (Link);
- Trb->Packet->TransactionStatus = EFI_NO_MEDIA;
- gBS->SignalEvent (Trb->Event);
- SdMmcFreeTrb (Trb);
- }
- }
- gBS->RestoreTPL (OldTpl);
- //
- // Notify the upper layer the connect state change through ReinstallProtocolInterface.
- //
- gBS->ReinstallProtocolInterface (
- Private->ControllerHandle,
- &gEfiSdMmcPassThruProtocolGuid,
- &Private->PassThru,
- &Private->PassThru
- );
- }
- if ((Status == EFI_MEDIA_CHANGED) && MediaPresent) {
- DEBUG ((DEBUG_INFO, "SdMmcPciHcEnumerateDevice: device connected at slot %d of pci %p\n", Slot, Private->PciIo));
- //
- // Reset the specified slot of the SD/MMC Pci Host Controller
- //
- Status = SdMmcHcReset (Private->PciIo, Slot);
- if (EFI_ERROR (Status)) {
- continue;
- }
- //
- // Reinitialize slot and restart identification process for the new attached device
- //
- Status = SdMmcHcInitHost (Private->PciIo,
- Slot,
- Private->Capability[Slot],
- Private->BaseClkFreq[Slot]);
- if (EFI_ERROR (Status)) {
- continue;
- }
-
- Private->Slot[Slot].MediaPresent = TRUE;
- Private->Slot[Slot].Initialized = TRUE;
- RoutineNum = sizeof (mCardTypeDetectRoutineTable) / sizeof (CARD_TYPE_DETECT_ROUTINE);
- for (Index = 0; Index < RoutineNum; Index++) {
- Routine = &mCardTypeDetectRoutineTable[Index];
- if (*Routine != NULL) {
- Status = (*Routine) (Private, Slot);
- if (!EFI_ERROR (Status)) {
- break;
- }
- }
- }
- //
- // This card doesn't get initialized correctly.
- //
- if (Index == RoutineNum) {
- Private->Slot[Slot].Initialized = FALSE;
- }
-
- //
- // Notify the upper layer the connect state change through ReinstallProtocolInterface.
- //
- gBS->ReinstallProtocolInterface (
- Private->ControllerHandle,
- &gEfiSdMmcPassThruProtocolGuid,
- &Private->PassThru,
- &Private->PassThru
- );
- }
- }
- }
-
- return;
-}
-/**
- Tests to see if this driver supports a given controller. If a child device is provided,
- it further tests to see if this driver supports creating a handle for the specified child device.
-
- This function checks to see if the driver specified by This supports the device specified by
- ControllerHandle. Drivers will typically use the device path attached to
- ControllerHandle and/or the services from the bus I/O abstraction attached to
- ControllerHandle to determine if the driver supports ControllerHandle. This function
- may be called many times during platform initialization. In order to reduce boot times, the tests
- performed by this function must be very small, and take as little time as possible to execute. This
- function must not change the state of any hardware devices, and this function must be aware that the
- device specified by ControllerHandle may already be managed by the same driver or a
- different driver. This function must match its calls to AllocatePages() with FreePages(),
- AllocatePool() with FreePool(), and OpenProtocol() with CloseProtocol().
- Since ControllerHandle may have been previously started by the same driver, if a protocol is
- already in the opened state, then it must not be closed with CloseProtocol(). This is required
- to guarantee the state of ControllerHandle is not modified by this function.
-
- @param[in] This A pointer to the EFI_DRIVER_BINDING_PROTOCOL instance.
- @param[in] ControllerHandle The handle of the controller to test. This handle
- must support a protocol interface that supplies
- an I/O abstraction to the driver.
- @param[in] RemainingDevicePath A pointer to the remaining portion of a device path. This
- parameter is ignored by device drivers, and is optional for bus
- drivers. For bus drivers, if this parameter is not NULL, then
- the bus driver must determine if the bus controller specified
- by ControllerHandle and the child controller specified
- by RemainingDevicePath are both supported by this
- bus driver.
-
- @retval EFI_SUCCESS The device specified by ControllerHandle and
- RemainingDevicePath is supported by the driver specified by This.
- @retval EFI_ALREADY_STARTED The device specified by ControllerHandle and
- RemainingDevicePath is already being managed by the driver
- specified by This.
- @retval EFI_ACCESS_DENIED The device specified by ControllerHandle and
- RemainingDevicePath is already being managed by a different
- driver or an application that requires exclusive access.
- Currently not implemented.
- @retval EFI_UNSUPPORTED The device specified by ControllerHandle and
- RemainingDevicePath is not supported by the driver specified by This.
-**/
-EFI_STATUS
-EFIAPI
-SdMmcPciHcDriverBindingSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
- )
-{
- EFI_STATUS Status;
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
- EFI_PCI_IO_PROTOCOL *PciIo;
- PCI_TYPE00 PciData;
-
- PciIo = NULL;
- ParentDevicePath = NULL;
-
- //
- // SdPciHcDxe is a device driver, and should ingore the
- // "RemainingDevicePath" according to EFI spec.
- //
- Status = gBS->OpenProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- (VOID *) &ParentDevicePath,
- This->DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_BY_DRIVER
- );
- if (EFI_ERROR (Status)) {
- //
- // EFI_ALREADY_STARTED is also an error.
- //
- return Status;
- }
- //
- // Close the protocol because we don't use it here.
- //
- gBS->CloseProtocol (
- Controller,
- &gEfiDevicePathProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
-
- //
- // Now test the EfiPciIoProtocol.
- //
- Status = gBS->OpenProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
- This->DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_BY_DRIVER
- );
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Now further check the PCI header: Base class (offset 0x08) and
- // Sub Class (offset 0x05). This controller should be an SD/MMC PCI
- // Host Controller.
- //
- Status = PciIo->Pci.Read (
- PciIo,
- EfiPciIoWidthUint8,
- 0,
- sizeof (PciData),
- &PciData
- );
- if (EFI_ERROR (Status)) {
- gBS->CloseProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
- return EFI_UNSUPPORTED;
- }
- //
- // Since we already got the PciData, we can close protocol to avoid to carry it
- // on for multiple exit points.
- //
- gBS->CloseProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
-
- //
- // Examine SD PCI Host Controller PCI Configuration table fields.
- //
- if ((PciData.Hdr.ClassCode[2] == PCI_CLASS_SYSTEM_PERIPHERAL) &&
- (PciData.Hdr.ClassCode[1] == PCI_SUBCLASS_SD_HOST_CONTROLLER) &&
- ((PciData.Hdr.ClassCode[0] == 0x00) || (PciData.Hdr.ClassCode[0] == 0x01))) {
- return EFI_SUCCESS;
- }
-
- return EFI_UNSUPPORTED;
-}
-
-/**
- Starts a device controller or a bus controller.
-
- The Start() function is designed to be invoked from the EFI boot service ConnectController().
- As a result, much of the error checking on the parameters to Start() has been moved into this
- common boot service. It is legal to call Start() from other locations,
- but the following calling restrictions must be followed or the system behavior will not be deterministic.
- 1. ControllerHandle must be a valid EFI_HANDLE.
- 2. If RemainingDevicePath is not NULL, then it must be a pointer to a naturally aligned
- EFI_DEVICE_PATH_PROTOCOL.
- 3. Prior to calling Start(), the Supported() function for the driver specified by This must
- have been called with the same calling parameters, and Supported() must have returned EFI_SUCCESS.
-
- @param[in] This A pointer to the EFI_DRIVER_BINDING_PROTOCOL instance.
- @param[in] ControllerHandle The handle of the controller to start. This handle
- must support a protocol interface that supplies
- an I/O abstraction to the driver.
- @param[in] RemainingDevicePath A pointer to the remaining portion of a device path. This
- parameter is ignored by device drivers, and is optional for bus
- drivers. For a bus driver, if this parameter is NULL, then handles
- for all the children of Controller are created by this driver.
- If this parameter is not NULL and the first Device Path Node is
- not the End of Device Path Node, then only the handle for the
- child device specified by the first Device Path Node of
- RemainingDevicePath is created by this driver.
- If the first Device Path Node of RemainingDevicePath is
- the End of Device Path Node, no child handle is created by this
- driver.
-
- @retval EFI_SUCCESS The device was started.
- @retval EFI_DEVICE_ERROR The device could not be started due to a device error.Currently not implemented.
- @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
- @retval Others The driver failded to start the device.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcPciHcDriverBindingStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
- )
-{
- EFI_STATUS Status;
- SD_MMC_HC_PRIVATE_DATA *Private;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT64 Supports;
- UINT64 PciAttributes;
- UINT8 Slot;
- UINT8 Index;
- CARD_TYPE_DETECT_ROUTINE *Routine;
- UINT32 RoutineNum;
- BOOLEAN Support64BitDma;
-
- DEBUG ((DEBUG_INFO, "SdMmcPciHcDriverBindingStart: Start\n"));
-
- //
- // Open PCI I/O Protocol and save pointer to open protocol
- // in private data area.
- //
- PciIo = NULL;
- Status = gBS->OpenProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
- This->DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_BY_DRIVER
- );
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Enable the SD Host Controller MMIO space
- //
- Private = NULL;
- Status = PciIo->Attributes (
- PciIo,
- EfiPciIoAttributeOperationGet,
- 0,
- &PciAttributes
- );
-
- if (EFI_ERROR (Status)) {
- goto Done;
- }
-
- Status = PciIo->Attributes (
- PciIo,
- EfiPciIoAttributeOperationSupported,
- 0,
- &Supports
- );
-
- if (!EFI_ERROR (Status)) {
- Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;
- Status = PciIo->Attributes (
- PciIo,
- EfiPciIoAttributeOperationEnable,
- Supports,
- NULL
- );
- } else {
- goto Done;
- }
-
- Private = AllocateCopyPool (sizeof (SD_MMC_HC_PRIVATE_DATA), &gSdMmcPciHcTemplate);
- if (Private == NULL) {
- Status = EFI_OUT_OF_RESOURCES;
- goto Done;
- }
-
- Private->ControllerHandle = Controller;
- Private->PciIo = PciIo;
- Private->PciAttributes = PciAttributes;
- InitializeListHead (&Private->Queue);
-
- Support64BitDma = TRUE;
-
- //
- // There is only one slot 0 on Xenon
- //
- Slot = 0;
- Private->Slot[Slot].Enable = TRUE;
-
- Status = SdMmcHcGetCapability (PciIo, Slot, &Private->Capability[Slot]);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Support64BitDma &= Private->Capability[Slot].SysBus64;
-
- //
- // Override capabilities structure - only 4 Bit width bus is supported
- // by HW and also force using SDR25 mode
- //
- Private->Capability[Slot].Sdr104 = 0;
- Private->Capability[Slot].Ddr50 = 0;
- Private->Capability[Slot].Sdr50 = 0;
- Private->Capability[Slot].BusWidth8 = 0;
-
- //
- // Override inappropriate base clock frequency from Capabilities Register 1.
- // Actual clock speed of Xenon controller is 400MHz.
- //
- Private->BaseClkFreq[Slot] = XENON_MMC_MAX_CLK / 1000 / 1000;
-
- DumpCapabilityReg (Slot, &Private->Capability[Slot], Private->BaseClkFreq[Slot]);
-
- Status = SdMmcHcGetMaxCurrent (PciIo, Slot, &Private->MaxCurrent[Slot]);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Private->Slot[Slot].SlotType = Private->Capability[Slot].SlotType;
- if ((Private->Slot[Slot].SlotType != RemovableSlot) && (Private->Slot[Slot].SlotType != EmbeddedSlot)) {
- DEBUG ((DEBUG_INFO, "SdMmcPciHcDxe doesn't support the slot type [%d]!!!\n", Private->Slot[Slot].SlotType));
- return EFI_D_ERROR;
- }
-
- //
- // Perform Xenon-specific init sequence
- //
- XenonInit (Private);
-
- //
- // Initialize HC timeout control
- //
- Status = SdMmcHcInitTimeoutCtrl (PciIo, Slot);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Private->Slot[Slot].MediaPresent = TRUE;
- Private->Slot[Slot].Initialized = TRUE;
- RoutineNum = sizeof (mCardTypeDetectRoutineTable) / sizeof (CARD_TYPE_DETECT_ROUTINE);
- for (Index = 0; Index < RoutineNum; Index++) {
- Routine = &mCardTypeDetectRoutineTable[Index];
- if (*Routine != NULL) {
- Status = (*Routine) (Private, Slot);
- if (!EFI_ERROR (Status)) {
- break;
- }
- }
- }
- //
- // This card doesn't get initialized correctly.
- //
- if (Index == RoutineNum) {
- Private->Slot[Slot].Initialized = FALSE;
- }
-
- //
- // Enable 64-bit DMA support in the PCI layer if this controller
- // supports it.
- //
- if (Support64BitDma) {
- Status = PciIo->Attributes (
- PciIo,
- EfiPciIoAttributeOperationEnable,
- EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE,
- NULL
- );
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN, "SdMmcPciHcDriverBindingStart: failed to enable 64-bit DMA (%r)\n", Status));
- }
- }
-
- //
- // Start the asynchronous I/O monitor
- //
- Status = gBS->CreateEvent (
- EVT_TIMER | EVT_NOTIFY_SIGNAL,
- TPL_NOTIFY,
- ProcessAsyncTaskList,
- Private,
- &Private->TimerEvent
- );
- if (EFI_ERROR (Status)) {
- goto Done;
- }
-
- Status = gBS->SetTimer (Private->TimerEvent, TimerPeriodic, SD_MMC_HC_ASYNC_TIMER);
- if (EFI_ERROR (Status)) {
- goto Done;
- }
-
- //
- // Start the Sd removable device connection enumeration
- //
- Status = gBS->CreateEvent (
- EVT_TIMER | EVT_NOTIFY_SIGNAL,
- TPL_CALLBACK,
- SdMmcPciHcEnumerateDevice,
- Private,
- &Private->ConnectEvent
- );
- if (EFI_ERROR (Status)) {
- goto Done;
- }
-
- Status = gBS->SetTimer (Private->ConnectEvent, TimerPeriodic, SD_MMC_HC_ENUM_TIMER);
- if (EFI_ERROR (Status)) {
- goto Done;
- }
-
- Status = gBS->InstallMultipleProtocolInterfaces (
- &Controller,
- &gEfiSdMmcPassThruProtocolGuid,
- &(Private->PassThru),
- NULL
- );
-
- DEBUG ((DEBUG_INFO, "SdMmcPciHcDriverBindingStart: %r End on %x\n", Status, Controller));
-
-Done:
- if (EFI_ERROR (Status)) {
- if ((Private != NULL) && (Private->PciAttributes != 0)) {
- //
- // Restore original PCI attributes
- //
- PciIo->Attributes (
- PciIo,
- EfiPciIoAttributeOperationSet,
- Private->PciAttributes,
- NULL
- );
- }
- gBS->CloseProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
-
- if ((Private != NULL) && (Private->TimerEvent != NULL)) {
- gBS->CloseEvent (Private->TimerEvent);
- }
-
- if ((Private != NULL) && (Private->ConnectEvent != NULL)) {
- gBS->CloseEvent (Private->ConnectEvent);
- }
-
- if (Private != NULL) {
- FreePool (Private);
- }
- }
-
- return Status;
-}
-
-/**
- Stops a device controller or a bus controller.
-
- The Stop() function is designed to be invoked from the EFI boot service DisconnectController().
- As a result, much of the error checking on the parameters to Stop() has been moved
- into this common boot service. It is legal to call Stop() from other locations,
- but the following calling restrictions must be followed or the system behavior will not be deterministic.
- 1. ControllerHandle must be a valid EFI_HANDLE that was used on a previous call to this
- same driver's Start() function.
- 2. The first NumberOfChildren handles of ChildHandleBuffer must all be a valid
- EFI_HANDLE. In addition, all of these handles must have been created in this driver's
- Start() function, and the Start() function must have called OpenProtocol() on
- ControllerHandle with an Attribute of EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER.
-
- @param[in] This A pointer to the EFI_DRIVER_BINDING_PROTOCOL instance.
- @param[in] ControllerHandle A handle to the device being stopped. The handle must
- support a bus specific I/O protocol for the driver
- to use to stop the device.
- @param[in] NumberOfChildren The number of child device handles in ChildHandleBuffer.
- @param[in] ChildHandleBuffer An array of child handles to be freed. May be NULL
- if NumberOfChildren is 0.
-
- @retval EFI_SUCCESS The device was stopped.
- @retval EFI_DEVICE_ERROR The device could not be stopped due to a device error.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcPciHcDriverBindingStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
- )
-{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;
- SD_MMC_HC_PRIVATE_DATA *Private;
- EFI_PCI_IO_PROTOCOL *PciIo;
- LIST_ENTRY *Link;
- LIST_ENTRY *NextLink;
- SD_MMC_HC_TRB *Trb;
-
- DEBUG ((DEBUG_INFO, "SdMmcPciHcDriverBindingStop: Start\n"));
-
- Status = gBS->OpenProtocol (
- Controller,
- &gEfiSdMmcPassThruProtocolGuid,
- (VOID**) &PassThru,
- This->DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_GET_PROTOCOL
- );
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru);
- //
- // Close Non-Blocking timer and free Task list.
- //
- if (Private->TimerEvent != NULL) {
- gBS->CloseEvent (Private->TimerEvent);
- Private->TimerEvent = NULL;
- }
- if (Private->ConnectEvent != NULL) {
- gBS->CloseEvent (Private->ConnectEvent);
- Private->ConnectEvent = NULL;
- }
- //
- // As the timer is closed, there is no needs to use TPL lock to
- // protect the critical region "queue".
- //
- for (Link = GetFirstNode (&Private->Queue);
- !IsNull (&Private->Queue, Link);
- Link = NextLink) {
- NextLink = GetNextNode (&Private->Queue, Link);
- RemoveEntryList (Link);
- Trb = SD_MMC_HC_TRB_FROM_THIS (Link);
- Trb->Packet->TransactionStatus = EFI_ABORTED;
- gBS->SignalEvent (Trb->Event);
- SdMmcFreeTrb (Trb);
- }
-
- //
- // Uninstall Block I/O protocol from the device handle
- //
- Status = gBS->UninstallProtocolInterface (
- Controller,
- &gEfiSdMmcPassThruProtocolGuid,
- &(Private->PassThru)
- );
-
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- gBS->CloseProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
- //
- // Restore original PCI attributes
- //
- PciIo = Private->PciIo;
- Status = PciIo->Attributes (
- PciIo,
- EfiPciIoAttributeOperationSet,
- Private->PciAttributes,
- NULL
- );
- ASSERT_EFI_ERROR (Status);
-
- FreePool (Private);
-
- DEBUG ((DEBUG_INFO, "SdMmcPciHcDriverBindingStop: End with %r\n", Status));
-
- return Status;
-}
-
-/**
- Sends SD command to an SD card that is attached to the SD controller.
-
- The PassThru() function sends the SD command specified by Packet to the SD card
- specified by Slot.
-
- If Packet is successfully sent to the SD card, then EFI_SUCCESS is returned.
-
- If a device error occurs while sending the Packet, then EFI_DEVICE_ERROR is returned.
-
- If Slot is not in a valid range for the SD controller, then EFI_INVALID_PARAMETER
- is returned.
-
- If Packet defines a data command but both InDataBuffer and OutDataBuffer are NULL,
- EFI_INVALID_PARAMETER is returned.
-
- @param[in] This A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in,out] Packet A pointer to the SD command data structure.
- @param[in] Event If Event is NULL, blocking I/O is performed. If Event is
- not NULL, then nonblocking I/O is performed, and Event
- will be signaled when the Packet completes.
-
- @retval EFI_SUCCESS The SD Command Packet was sent by the host.
- @retval EFI_DEVICE_ERROR A device error occurred while attempting to send the SD
- command Packet.
- @retval EFI_INVALID_PARAMETER Packet, Slot, or the contents of the Packet is invalid.
- @retval EFI_INVALID_PARAMETER Packet defines a data command but both InDataBuffer and
- OutDataBuffer are NULL.
- @retval EFI_NO_MEDIA SD Device not present in the Slot.
- @retval EFI_UNSUPPORTED The command described by the SD Command Packet is not
- supported by the host controller.
- @retval EFI_BAD_BUFFER_SIZE The InTransferLength or OutTransferLength exceeds the
- limit supported by SD card ( i.e. if the number of bytes
- exceed the Last LBA).
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcPassThruPassThru (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
- IN UINT8 Slot,
- IN OUT EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet,
- IN EFI_EVENT Event OPTIONAL
- )
-{
- EFI_STATUS Status;
- SD_MMC_HC_PRIVATE_DATA *Private;
- SD_MMC_HC_TRB *Trb;
- EFI_TPL OldTpl;
-
- if ((This == NULL) || (Packet == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- if ((Packet->SdMmcCmdBlk == NULL) || (Packet->SdMmcStatusBlk == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- if ((Packet->OutDataBuffer == NULL) && (Packet->OutTransferLength != 0)) {
- return EFI_INVALID_PARAMETER;
- }
-
- if ((Packet->InDataBuffer == NULL) && (Packet->InTransferLength != 0)) {
- return EFI_INVALID_PARAMETER;
- }
-
- Private = SD_MMC_HC_PRIVATE_FROM_THIS (This);
-
- if (!Private->Slot[Slot].Enable) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (!Private->Slot[Slot].MediaPresent) {
- return EFI_NO_MEDIA;
- }
-
- if (!Private->Slot[Slot].Initialized) {
- return EFI_DEVICE_ERROR;
- }
-
- Trb = SdMmcCreateTrb (Private, Slot, Packet, Event);
- if (Trb == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
- //
- // Immediately return for async I/O.
- //
- if (Event != NULL) {
- return EFI_SUCCESS;
- }
-
- //
- // Wait async I/O list is empty before execute sync I/O operation.
- //
- while (TRUE) {
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
- if (IsListEmpty (&Private->Queue)) {
- gBS->RestoreTPL (OldTpl);
- break;
- }
- gBS->RestoreTPL (OldTpl);
- }
-
- Status = SdMmcWaitTrbEnv (Private, Trb);
- if (EFI_ERROR (Status)) {
- goto Done;
- }
-
- Status = SdMmcExecTrb (Private, Trb);
- if (EFI_ERROR (Status)) {
- goto Done;
- }
-
- Status = SdMmcWaitTrbResult (Private, Trb);
- if (EFI_ERROR (Status)) {
- goto Done;
- }
-
-Done:
- if ((Trb != NULL) && (Trb->AdmaDesc != NULL)) {
- FreePages (Trb->AdmaDesc, Trb->AdmaPages);
- }
-
- if (Trb != NULL) {
- FreePool (Trb);
- }
-
- return Status;
-}
-
-/**
- Used to retrieve next slot numbers supported by the SD controller. The function
- returns information about all available slots (populated or not-populated).
-
- The GetNextSlot() function retrieves the next slot number on an SD controller.
- If on input Slot is 0xFF, then the slot number of the first slot on the SD controller
- is returned.
-
- If Slot is a slot number that was returned on a previous call to GetNextSlot(), then
- the slot number of the next slot on the SD controller is returned.
-
- If Slot is not 0xFF and Slot was not returned on a previous call to GetNextSlot(),
- EFI_INVALID_PARAMETER is returned.
-
- If Slot is the slot number of the last slot on the SD controller, then EFI_NOT_FOUND
- is returned.
-
- @param[in] This A pointer to the EFI_SD_MMMC_PASS_THRU_PROTOCOL instance.
- @param[in,out] Slot On input, a pointer to a slot number on the SD controller.
- On output, a pointer to the next slot number on the SD controller.
- An input value of 0xFF retrieves the first slot number on the SD
- controller.
-
- @retval EFI_SUCCESS The next slot number on the SD controller was returned in Slot.
- @retval EFI_NOT_FOUND There are no more slots on this SD controller.
- @retval EFI_INVALID_PARAMETER Slot is not 0xFF and Slot was not returned on a previous call
- to GetNextSlot().
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcPassThruGetNextSlot (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
- IN OUT UINT8 *Slot
- )
-{
- SD_MMC_HC_PRIVATE_DATA *Private;
- UINT8 Index;
-
- if ((This == NULL) || (Slot == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- Private = SD_MMC_HC_PRIVATE_FROM_THIS (This);
-
- if (*Slot == 0xFF) {
- for (Index = 0; Index < SD_MMC_HC_MAX_SLOT; Index++) {
- if (Private->Slot[Index].Enable) {
- *Slot = Index;
- Private->PreviousSlot = Index;
- return EFI_SUCCESS;
- }
- }
- return EFI_NOT_FOUND;
- } else if (*Slot == Private->PreviousSlot) {
- for (Index = *Slot + 1; Index < SD_MMC_HC_MAX_SLOT; Index++) {
- if (Private->Slot[Index].Enable) {
- *Slot = Index;
- Private->PreviousSlot = Index;
- return EFI_SUCCESS;
- }
- }
- return EFI_NOT_FOUND;
- } else {
- return EFI_INVALID_PARAMETER;
- }
-}
-
-/**
- Used to allocate and build a device path node for an SD card on the SD controller.
-
- The BuildDevicePath() function allocates and builds a single device node for the SD
- card specified by Slot.
-
- If the SD card specified by Slot is not present on the SD controller, then EFI_NOT_FOUND
- is returned.
-
- If DevicePath is NULL, then EFI_INVALID_PARAMETER is returned.
-
- If there are not enough resources to allocate the device path node, then EFI_OUT_OF_RESOURCES
- is returned.
-
- Otherwise, DevicePath is allocated with the boot service AllocatePool(), the contents of
- DevicePath are initialized to describe the SD card specified by Slot, and EFI_SUCCESS is
- returned.
-
- @param[in] This A pointer to the EFI_SD_MMMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot Specifies the slot number of the SD card for which a device
- path node is to be allocated and built.
- @param[in,out] DevicePath A pointer to a single device path node that describes the SD
- card specified by Slot. This function is responsible for
- allocating the buffer DevicePath with the boot service
- AllocatePool(). It is the caller's responsibility to free
- DevicePath when the caller is finished with DevicePath.
-
- @retval EFI_SUCCESS The device path node that describes the SD card specified by
- Slot was allocated and returned in DevicePath.
- @retval EFI_NOT_FOUND The SD card specified by Slot does not exist on the SD controller.
- @retval EFI_INVALID_PARAMETER DevicePath is NULL.
- @retval EFI_OUT_OF_RESOURCES There are not enough resources to allocate DevicePath.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcPassThruBuildDevicePath (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
- IN UINT8 Slot,
- IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
- )
-{
- SD_MMC_HC_PRIVATE_DATA *Private;
- SD_DEVICE_PATH *SdNode;
- EMMC_DEVICE_PATH *EmmcNode;
-
- if ((This == NULL) || (DevicePath == NULL) || (Slot >= SD_MMC_HC_MAX_SLOT)) {
- return EFI_INVALID_PARAMETER;
- }
-
- Private = SD_MMC_HC_PRIVATE_FROM_THIS (This);
-
- if ((!Private->Slot[Slot].Enable) || (!Private->Slot[Slot].MediaPresent)) {
- return EFI_NOT_FOUND;
- }
-
- if (Private->Slot[Slot].CardType == SdCardType) {
- SdNode = AllocateCopyPool (sizeof (SD_DEVICE_PATH), &mSdDpTemplate);
- if (SdNode == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
- SdNode->SlotNumber = Slot;
-
- *DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) SdNode;
- } else if (Private->Slot[Slot].CardType == EmmcCardType) {
- EmmcNode = AllocateCopyPool (sizeof (EMMC_DEVICE_PATH), &mEmmcDpTemplate);
- if (EmmcNode == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
- EmmcNode->SlotNumber = Slot;
-
- *DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) EmmcNode;
- } else {
- //
- // Currently we only support SD and EMMC two device nodes.
- //
- return EFI_NOT_FOUND;
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- This function retrieves an SD card slot number based on the input device path.
-
- The GetSlotNumber() function retrieves slot number for the SD card specified by
- the DevicePath node. If DevicePath is NULL, EFI_INVALID_PARAMETER is returned.
-
- If DevicePath is not a device path node type that the SD Pass Thru driver supports,
- EFI_UNSUPPORTED is returned.
-
- @param[in] This A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] DevicePath A pointer to the device path node that describes a SD
- card on the SD controller.
- @param[out] Slot On return, points to the slot number of an SD card on
- the SD controller.
-
- @retval EFI_SUCCESS SD card slot number is returned in Slot.
- @retval EFI_INVALID_PARAMETER Slot or DevicePath is NULL.
- @retval EFI_UNSUPPORTED DevicePath is not a device path node type that the SD
- Pass Thru driver supports.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcPassThruGetSlotNumber (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- OUT UINT8 *Slot
- )
-{
- SD_MMC_HC_PRIVATE_DATA *Private;
- SD_DEVICE_PATH *SdNode;
- EMMC_DEVICE_PATH *EmmcNode;
- UINT8 SlotNumber;
-
- if ((This == NULL) || (DevicePath == NULL) || (Slot == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- Private = SD_MMC_HC_PRIVATE_FROM_THIS (This);
-
- //
- // Check whether the DevicePath belongs to SD_DEVICE_PATH or EMMC_DEVICE_PATH
- //
- if ((DevicePath->Type != MESSAGING_DEVICE_PATH) ||
- ((DevicePath->SubType != MSG_SD_DP) &&
- (DevicePath->SubType != MSG_EMMC_DP)) ||
- (DevicePathNodeLength(DevicePath) != sizeof(SD_DEVICE_PATH)) ||
- (DevicePathNodeLength(DevicePath) != sizeof(EMMC_DEVICE_PATH))) {
- return EFI_UNSUPPORTED;
- }
-
- if (DevicePath->SubType == MSG_SD_DP) {
- SdNode = (SD_DEVICE_PATH *) DevicePath;
- SlotNumber = SdNode->SlotNumber;
- } else {
- EmmcNode = (EMMC_DEVICE_PATH *) DevicePath;
- SlotNumber = EmmcNode->SlotNumber;
- }
-
- if (SlotNumber >= SD_MMC_HC_MAX_SLOT) {
- return EFI_NOT_FOUND;
- }
-
- if (Private->Slot[SlotNumber].Enable) {
- *Slot = SlotNumber;
- return EFI_SUCCESS;
- } else {
- return EFI_NOT_FOUND;
- }
-}
-
-/**
- Resets an SD card that is connected to the SD controller.
-
- The ResetDevice() function resets the SD card specified by Slot.
-
- If this SD controller does not support a device reset operation, EFI_UNSUPPORTED is
- returned.
-
- If Slot is not in a valid slot number for this SD controller, EFI_INVALID_PARAMETER
- is returned.
-
- If the device reset operation is completed, EFI_SUCCESS is returned.
-
- @param[in] This A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.
- @param[in] Slot Specifies the slot number of the SD card to be reset.
-
- @retval EFI_SUCCESS The SD card specified by Slot was reset.
- @retval EFI_UNSUPPORTED The SD controller does not support a device reset operation.
- @retval EFI_INVALID_PARAMETER Slot number is invalid.
- @retval EFI_NO_MEDIA SD Device not present in the Slot.
- @retval EFI_DEVICE_ERROR The reset command failed due to a device error
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcPassThruResetDevice (
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,
- IN UINT8 Slot
- )
-{
- SD_MMC_HC_PRIVATE_DATA *Private;
- LIST_ENTRY *Link;
- LIST_ENTRY *NextLink;
- SD_MMC_HC_TRB *Trb;
- EFI_TPL OldTpl;
-
- if (This == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- Private = SD_MMC_HC_PRIVATE_FROM_THIS (This);
-
- if (!Private->Slot[Slot].Enable) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (!Private->Slot[Slot].MediaPresent) {
- return EFI_NO_MEDIA;
- }
-
- if (!Private->Slot[Slot].Initialized) {
- return EFI_DEVICE_ERROR;
- }
- //
- // Free all async I/O requests in the queue
- //
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
-
- for (Link = GetFirstNode (&Private->Queue);
- !IsNull (&Private->Queue, Link);
- Link = NextLink) {
- NextLink = GetNextNode (&Private->Queue, Link);
- RemoveEntryList (Link);
- Trb = SD_MMC_HC_TRB_FROM_THIS (Link);
- Trb->Packet->TransactionStatus = EFI_ABORTED;
- gBS->SignalEvent (Trb->Event);
- SdMmcFreeTrb (Trb);
- }
-
- gBS->RestoreTPL (OldTpl);
-
- return EFI_SUCCESS;
-}
-
diff --git a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHci.c b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHci.c
deleted file mode 100644
index 1f4abd1..0000000
--- a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHci.c
+++ /dev/null
@@ -1,1928 +0,0 @@
-/** @file
- This driver is used to manage SD/MMC PCI host controllers which are compliance
- with SD Host Controller Simplified Specification version 3.00.
-
- It would expose EFI_SD_MMC_PASS_THRU_PROTOCOL for upper layer use.
-
- Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "SdMmcPciHcDxe.h"
-
-/**
- Dump the content of SD/MMC host controller's Capability Register.
-
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Capability The buffer to store the capability data.
- @param[in] BaseClkFreq The base clock frequency of host controller in MHz.
-
-**/
-VOID
-DumpCapabilityReg (
- IN UINT8 Slot,
- IN SD_MMC_HC_SLOT_CAP *Capability,
- IN UINT32 BaseClkFreq
- )
-{
- //
- // Dump Capability Data
- //
- DEBUG ((DEBUG_INFO, " == Slot [%d] Capability is 0x%x ==\n", Slot, Capability));
- DEBUG ((DEBUG_INFO, " Timeout Clk Freq %d%a\n", Capability->TimeoutFreq, (Capability->TimeoutUnit) ? "MHz" : "KHz"));
- if (Capability->BaseClkFreq != BaseClkFreq) {
- DEBUG ((DEBUG_INFO, " Controller register value overriden:\n"));
- }
- DEBUG ((DEBUG_INFO, " Base Clk Freq %dMHz\n", BaseClkFreq));
- DEBUG ((DEBUG_INFO, " Max Blk Len %dbytes\n", 512 * (1 << Capability->MaxBlkLen)));
- DEBUG ((DEBUG_INFO, " 8-bit Support %a\n", Capability->BusWidth8 ? "TRUE" : "FALSE"));
- DEBUG ((DEBUG_INFO, " ADMA2 Support %a\n", Capability->Adma2 ? "TRUE" : "FALSE"));
- DEBUG ((DEBUG_INFO, " HighSpeed Support %a\n", Capability->HighSpeed ? "TRUE" : "FALSE"));
- DEBUG ((DEBUG_INFO, " SDMA Support %a\n", Capability->Sdma ? "TRUE" : "FALSE"));
- DEBUG ((DEBUG_INFO, " Suspend/Resume %a\n", Capability->SuspRes ? "TRUE" : "FALSE"));
- DEBUG ((DEBUG_INFO, " Voltage 3.3 %a\n", Capability->Voltage33 ? "TRUE" : "FALSE"));
- DEBUG ((DEBUG_INFO, " Voltage 3.0 %a\n", Capability->Voltage30 ? "TRUE" : "FALSE"));
- DEBUG ((DEBUG_INFO, " Voltage 1.8 %a\n", Capability->Voltage18 ? "TRUE" : "FALSE"));
- DEBUG ((DEBUG_INFO, " 64-bit Sys Bus %a\n", Capability->SysBus64 ? "TRUE" : "FALSE"));
- DEBUG ((DEBUG_INFO, " Async Interrupt %a\n", Capability->AsyncInt ? "TRUE" : "FALSE"));
- DEBUG ((DEBUG_INFO, " SlotType "));
- if (Capability->SlotType == 0x00) {
- DEBUG ((DEBUG_INFO, "%a\n", "Removable Slot"));
- } else if (Capability->SlotType == 0x01) {
- DEBUG ((DEBUG_INFO, "%a\n", "Embedded Slot"));
- } else if (Capability->SlotType == 0x02) {
- DEBUG ((DEBUG_INFO, "%a\n", "Shared Bus Slot"));
- } else {
- DEBUG ((DEBUG_INFO, "%a\n", "Reserved"));
- }
- DEBUG ((DEBUG_INFO, " SDR50 Support %a\n", Capability->Sdr50 ? "TRUE" : "FALSE"));
- DEBUG ((DEBUG_INFO, " SDR104 Support %a\n", Capability->Sdr104 ? "TRUE" : "FALSE"));
- DEBUG ((DEBUG_INFO, " DDR50 Support %a\n", Capability->Ddr50 ? "TRUE" : "FALSE"));
- DEBUG ((DEBUG_INFO, " Driver Type A %a\n", Capability->DriverTypeA ? "TRUE" : "FALSE"));
- DEBUG ((DEBUG_INFO, " Driver Type C %a\n", Capability->DriverTypeC ? "TRUE" : "FALSE"));
- DEBUG ((DEBUG_INFO, " Driver Type D %a\n", Capability->DriverTypeD ? "TRUE" : "FALSE"));
- DEBUG ((DEBUG_INFO, " Driver Type 4 %a\n", Capability->DriverType4 ? "TRUE" : "FALSE"));
- if (Capability->TimerCount == 0) {
- DEBUG ((DEBUG_INFO, " Retuning TimerCnt Disabled\n", 2 * (Capability->TimerCount - 1)));
- } else {
- DEBUG ((DEBUG_INFO, " Retuning TimerCnt %dseconds\n", 2 * (Capability->TimerCount - 1)));
- }
- DEBUG ((DEBUG_INFO, " SDR50 Tuning %a\n", Capability->TuningSDR50 ? "TRUE" : "FALSE"));
- DEBUG ((DEBUG_INFO, " Retuning Mode Mode %d\n", Capability->RetuningMod + 1));
- DEBUG ((DEBUG_INFO, " Clock Multiplier M = %d\n", Capability->ClkMultiplier + 1));
- DEBUG ((DEBUG_INFO, " HS 400 %a\n", Capability->Hs400 ? "TRUE" : "FALSE"));
- return;
-}
-
-/**
- Read SlotInfo register from SD/MMC host controller pci config space.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[out] FirstBar The buffer to store the first BAR value.
- @param[out] SlotNum The buffer to store the supported slot number.
-
- @retval EFI_SUCCESS The operation succeeds.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcHcGetSlotInfo (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- OUT UINT8 *FirstBar,
- OUT UINT8 *SlotNum
- )
-{
- EFI_STATUS Status;
- SD_MMC_HC_SLOT_INFO SlotInfo;
-
- Status = PciIo->Pci.Read (
- PciIo,
- EfiPciIoWidthUint8,
- SD_MMC_HC_SLOT_OFFSET,
- sizeof (SlotInfo),
- &SlotInfo
- );
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- *FirstBar = SlotInfo.FirstBar;
- *SlotNum = SlotInfo.SlotNum + 1;
- ASSERT ((*FirstBar + *SlotNum) < SD_MMC_HC_MAX_SLOT);
- return EFI_SUCCESS;
-}
-
-/**
- Read/Write specified SD/MMC host controller mmio register.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] BarIndex The BAR index of the standard PCI Configuration
- header to use as the base address for the memory
- operation to perform.
- @param[in] Offset The offset within the selected BAR to start the
- memory operation.
- @param[in] Read A boolean to indicate it's read or write operation.
- @param[in] Count The width of the mmio register in bytes.
- Must be 1, 2 , 4 or 8 bytes.
- @param[in, out] Data For read operations, the destination buffer to store
- the results. For write operations, the source buffer
- to write data from. The caller is responsible for
- having ownership of the data buffer and ensuring its
- size not less than Count bytes.
-
- @retval EFI_INVALID_PARAMETER The PciIo or Data is NULL or the Count is not valid.
- @retval EFI_SUCCESS The read/write operation succeeds.
- @retval Others The read/write operation fails.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcHcRwMmio (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 BarIndex,
- IN UINT32 Offset,
- IN BOOLEAN Read,
- IN UINT8 Count,
- IN OUT VOID *Data
- )
-{
- EFI_STATUS Status;
-
- if ((PciIo == NULL) || (Data == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- if ((Count != 1) && (Count != 2) && (Count != 4) && (Count != 8)) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (Read) {
- Status = PciIo->Mem.Read (
- PciIo,
- EfiPciIoWidthUint8,
- BarIndex,
- (UINT64) Offset,
- Count,
- Data
- );
- } else {
- Status = PciIo->Mem.Write (
- PciIo,
- EfiPciIoWidthUint8,
- BarIndex,
- (UINT64) Offset,
- Count,
- Data
- );
- }
-
- return Status;
-}
-
-/**
- Do OR operation with the value of the specified SD/MMC host controller mmio register.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] BarIndex The BAR index of the standard PCI Configuration
- header to use as the base address for the memory
- operation to perform.
- @param[in] Offset The offset within the selected BAR to start the
- memory operation.
- @param[in] Count The width of the mmio register in bytes.
- Must be 1, 2 , 4 or 8 bytes.
- @param[in] OrData The pointer to the data used to do OR operation.
- The caller is responsible for having ownership of
- the data buffer and ensuring its size not less than
- Count bytes.
-
- @retval EFI_INVALID_PARAMETER The PciIo or OrData is NULL or the Count is not valid.
- @retval EFI_SUCCESS The OR operation succeeds.
- @retval Others The OR operation fails.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcHcOrMmio (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 BarIndex,
- IN UINT32 Offset,
- IN UINT8 Count,
- IN VOID *OrData
- )
-{
- EFI_STATUS Status;
- UINT64 Data;
- UINT64 Or;
-
- Status = SdMmcHcRwMmio (PciIo, BarIndex, Offset, TRUE, Count, &Data);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- if (Count == 1) {
- Or = *(UINT8*) OrData;
- } else if (Count == 2) {
- Or = *(UINT16*) OrData;
- } else if (Count == 4) {
- Or = *(UINT32*) OrData;
- } else if (Count == 8) {
- Or = *(UINT64*) OrData;
- } else {
- return EFI_INVALID_PARAMETER;
- }
-
- Data |= Or;
- Status = SdMmcHcRwMmio (PciIo, BarIndex, Offset, FALSE, Count, &Data);
-
- return Status;
-}
-
-/**
- Do AND operation with the value of the specified SD/MMC host controller mmio register.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] BarIndex The BAR index of the standard PCI Configuration
- header to use as the base address for the memory
- operation to perform.
- @param[in] Offset The offset within the selected BAR to start the
- memory operation.
- @param[in] Count The width of the mmio register in bytes.
- Must be 1, 2 , 4 or 8 bytes.
- @param[in] AndData The pointer to the data used to do AND operation.
- The caller is responsible for having ownership of
- the data buffer and ensuring its size not less than
- Count bytes.
-
- @retval EFI_INVALID_PARAMETER The PciIo or AndData is NULL or the Count is not valid.
- @retval EFI_SUCCESS The AND operation succeeds.
- @retval Others The AND operation fails.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcHcAndMmio (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 BarIndex,
- IN UINT32 Offset,
- IN UINT8 Count,
- IN VOID *AndData
- )
-{
- EFI_STATUS Status;
- UINT64 Data;
- UINT64 And;
-
- Status = SdMmcHcRwMmio (PciIo, BarIndex, Offset, TRUE, Count, &Data);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- if (Count == 1) {
- And = *(UINT8*) AndData;
- } else if (Count == 2) {
- And = *(UINT16*) AndData;
- } else if (Count == 4) {
- And = *(UINT32*) AndData;
- } else if (Count == 8) {
- And = *(UINT64*) AndData;
- } else {
- return EFI_INVALID_PARAMETER;
- }
-
- Data &= And;
- Status = SdMmcHcRwMmio (PciIo, BarIndex, Offset, FALSE, Count, &Data);
-
- return Status;
-}
-
-/**
- Wait for the value of the specified MMIO register set to the test value.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] BarIndex The BAR index of the standard PCI Configuration
- header to use as the base address for the memory
- operation to perform.
- @param[in] Offset The offset within the selected BAR to start the
- memory operation.
- @param[in] Count The width of the mmio register in bytes.
- Must be 1, 2, 4 or 8 bytes.
- @param[in] MaskValue The mask value of memory.
- @param[in] TestValue The test value of memory.
-
- @retval EFI_NOT_READY The MMIO register hasn't set to the expected value.
- @retval EFI_SUCCESS The MMIO register has expected value.
- @retval Others The MMIO operation fails.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcHcCheckMmioSet (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 BarIndex,
- IN UINT32 Offset,
- IN UINT8 Count,
- IN UINT64 MaskValue,
- IN UINT64 TestValue
- )
-{
- EFI_STATUS Status;
- UINT64 Value;
-
- //
- // Access PCI MMIO space to see if the value is the tested one.
- //
- Value = 0;
- Status = SdMmcHcRwMmio (PciIo, BarIndex, Offset, TRUE, Count, &Value);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Value &= MaskValue;
-
- if (Value == TestValue) {
- return EFI_SUCCESS;
- }
-
- return EFI_NOT_READY;
-}
-
-/**
- Wait for the value of the specified MMIO register set to the test value.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] BarIndex The BAR index of the standard PCI Configuration
- header to use as the base address for the memory
- operation to perform.
- @param[in] Offset The offset within the selected BAR to start the
- memory operation.
- @param[in] Count The width of the mmio register in bytes.
- Must be 1, 2, 4 or 8 bytes.
- @param[in] MaskValue The mask value of memory.
- @param[in] TestValue The test value of memory.
- @param[in] Timeout The time out value for wait memory set, uses 1
- microsecond as a unit.
-
- @retval EFI_TIMEOUT The MMIO register hasn't expected value in timeout
- range.
- @retval EFI_SUCCESS The MMIO register has expected value.
- @retval Others The MMIO operation fails.
-
-**/
-EFI_STATUS
-EFIAPI
-SdMmcHcWaitMmioSet (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 BarIndex,
- IN UINT32 Offset,
- IN UINT8 Count,
- IN UINT64 MaskValue,
- IN UINT64 TestValue,
- IN UINT64 Timeout
- )
-{
- EFI_STATUS Status;
- BOOLEAN InfiniteWait;
-
- if (Timeout == 0) {
- InfiniteWait = TRUE;
- } else {
- InfiniteWait = FALSE;
- }
-
- while (InfiniteWait || (Timeout > 0)) {
- Status = SdMmcHcCheckMmioSet (
- PciIo,
- BarIndex,
- Offset,
- Count,
- MaskValue,
- TestValue
- );
- if (Status != EFI_NOT_READY) {
- return Status;
- }
-
- //
- // Stall for 1 microsecond.
- //
- gBS->Stall (1);
-
- Timeout--;
- }
-
- return EFI_TIMEOUT;
-}
-
-/**
- Software reset the specified SD/MMC host controller and enable all interrupts.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
-
- @retval EFI_SUCCESS The software reset executes successfully.
- @retval Others The software reset fails.
-
-**/
-EFI_STATUS
-SdMmcHcReset (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot
- )
-{
- EFI_STATUS Status;
- UINT8 SwReset;
-
- SwReset = 0xFF;
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_SW_RST, FALSE, sizeof (SwReset), &SwReset);
-
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "SdMmcHcReset: write full 1 fails: %r\n", Status));
- return Status;
- }
-
- Status = SdMmcHcWaitMmioSet (
- PciIo,
- Slot,
- SD_MMC_HC_SW_RST,
- sizeof (SwReset),
- 0xFF,
- 0x00,
- SD_MMC_HC_GENERIC_TIMEOUT
- );
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_INFO, "SdMmcHcReset: reset done with %r\n", Status));
- return Status;
- }
- //
- // Enable all interrupt after reset all.
- //
- Status = SdMmcHcEnableInterrupt (PciIo, Slot);
-
- return Status;
-}
-
-/**
- Set all interrupt status bits in Normal and Error Interrupt Status Enable
- register.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
-
- @retval EFI_SUCCESS The operation executes successfully.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdMmcHcEnableInterrupt (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot
- )
-{
- EFI_STATUS Status;
- UINT16 IntStatus;
-
- //
- // Enable all bits in Error Interrupt Status Enable Register
- //
- IntStatus = 0xFFFF;
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_ERR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- //
- // Enable all bits in Normal Interrupt Status Enable Register
- //
- IntStatus = 0xFFFF;
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_NOR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);
-
- return Status;
-}
-
-/**
- Get the capability data from the specified slot.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[out] Capability The buffer to store the capability data.
-
- @retval EFI_SUCCESS The operation executes successfully.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdMmcHcGetCapability (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- OUT SD_MMC_HC_SLOT_CAP *Capability
- )
-{
- EFI_STATUS Status;
- UINT64 Cap;
-
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_CAP, TRUE, sizeof (Cap), &Cap);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- CopyMem (Capability, &Cap, sizeof (Cap));
-
- return EFI_SUCCESS;
-}
-
-/**
- Get the maximum current capability data from the specified slot.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[out] MaxCurrent The buffer to store the maximum current capability data.
-
- @retval EFI_SUCCESS The operation executes successfully.
- @retval Others The operation fails.
-
-**/
-EFI_STATUS
-SdMmcHcGetMaxCurrent (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- OUT UINT64 *MaxCurrent
- )
-{
- EFI_STATUS Status;
-
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_MAX_CURRENT_CAP, TRUE, sizeof (UINT64), MaxCurrent);
-
- return Status;
-}
-
-/**
- Detect whether there is a SD/MMC card attached at the specified SD/MMC host controller
- slot.
-
- Refer to SD Host Controller Simplified spec 3.0 Section 3.1 for details.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[out] MediaPresent The pointer to the media present boolean value.
-
- @retval EFI_SUCCESS There is no media change happened.
- @retval EFI_MEDIA_CHANGED There is media change happened.
- @retval Others The detection fails.
-
-**/
-EFI_STATUS
-SdMmcHcCardDetect (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- OUT BOOLEAN *MediaPresent
- )
-{
- EFI_STATUS Status;
- UINT16 Data;
- UINT32 PresentState;
-
- //
- // Check Present State Register to see if there is a card presented.
- //
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_PRESENT_STATE, TRUE, sizeof (PresentState), &PresentState);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- if ((PresentState & BIT16) != 0) {
- *MediaPresent = TRUE;
- } else {
- *MediaPresent = FALSE;
- }
-
- //
- // Check Normal Interrupt Status Register
- //
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_NOR_INT_STS, TRUE, sizeof (Data), &Data);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- if ((Data & (BIT6 | BIT7)) != 0) {
- //
- // Clear BIT6 and BIT7 by writing 1 to these two bits if set.
- //
- Data &= BIT6 | BIT7;
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_NOR_INT_STS, FALSE, sizeof (Data), &Data);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- return EFI_MEDIA_CHANGED;
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- Stop SD/MMC card clock.
-
- Refer to SD Host Controller Simplified spec 3.0 Section 3.2.2 for details.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
-
- @retval EFI_SUCCESS Succeed to stop SD/MMC clock.
- @retval Others Fail to stop SD/MMC clock.
-
-**/
-EFI_STATUS
-SdMmcHcStopClock (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot
- )
-{
- EFI_STATUS Status;
- UINT32 PresentState;
- UINT16 ClockCtrl;
-
- //
- // Ensure no SD transactions are occurring on the SD Bus by
- // waiting for Command Inhibit (DAT) and Command Inhibit (CMD)
- // in the Present State register to be 0.
- //
- Status = SdMmcHcWaitMmioSet (
- PciIo,
- Slot,
- SD_MMC_HC_PRESENT_STATE,
- sizeof (PresentState),
- BIT0 | BIT1,
- 0,
- SD_MMC_HC_GENERIC_TIMEOUT
- );
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Set SD Clock Enable in the Clock Control register to 0
- //
- ClockCtrl = (UINT16)~BIT2;
- Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
-
- return Status;
-}
-
-/**
- SD/MMC card clock supply.
-
- Refer to SD Host Controller Simplified spec 3.0 Section 3.2.1 for details.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] ClockFreq The max clock frequency to be set. The unit is KHz.
- @param[in] BaseClkFreq The base clock frequency of host controller in MHz.
-
- @retval EFI_SUCCESS The clock is supplied successfully.
- @retval Others The clock isn't supplied successfully.
-
-**/
-EFI_STATUS
-SdMmcHcClockSupply (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN UINT64 ClockFreq,
- IN UINT32 BaseClkFreq
- )
-{
- EFI_STATUS Status;
- UINT32 SettingFreq;
- UINT32 Divisor;
- UINT32 Remainder;
- UINT16 ControllerVer;
- UINT16 ClockCtrl;
-
- //
- // Calculate a divisor for SD clock frequency
- //
- ASSERT (BaseClkFreq != 0);
-
- if (ClockFreq == 0) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (ClockFreq > (BaseClkFreq * 1000)) {
- ClockFreq = BaseClkFreq * 1000;
- }
-
- //
- // Calculate the divisor of base frequency.
- //
- Divisor = 0;
- SettingFreq = BaseClkFreq * 1000;
- while (ClockFreq < SettingFreq) {
- Divisor++;
-
- SettingFreq = (BaseClkFreq * 1000) / (2 * Divisor);
- Remainder = (BaseClkFreq * 1000) % (2 * Divisor);
- if ((ClockFreq == SettingFreq) && (Remainder == 0)) {
- break;
- }
- if ((ClockFreq == SettingFreq) && (Remainder != 0)) {
- SettingFreq ++;
- }
- }
-
- DEBUG ((DEBUG_INFO, "BaseClkFreq %dMHz Divisor %d ClockFreq %dKhz\n", BaseClkFreq, Divisor, ClockFreq));
-
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_CTRL_VER, TRUE, sizeof (ControllerVer), &ControllerVer);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- //
- // Set SDCLK Frequency Select and Internal Clock Enable fields in Clock Control register.
- //
- if ((ControllerVer & 0xFF) == 2) {
- ASSERT (Divisor <= 0x3FF);
- ClockCtrl = ((Divisor & 0xFF) << 8) | ((Divisor & 0x300) >> 2);
- } else if (((ControllerVer & 0xFF) == 0) || ((ControllerVer & 0xFF) == 1)) {
- //
- // Only the most significant bit can be used as divisor.
- //
- if (((Divisor - 1) & Divisor) != 0) {
- Divisor = 1 << (HighBitSet32 (Divisor) + 1);
- }
- ASSERT (Divisor <= 0x80);
- ClockCtrl = (Divisor & 0xFF) << 8;
- } else {
- DEBUG ((DEBUG_ERROR, "Unknown SD Host Controller Spec version [0x%x]!!!\n", ControllerVer));
- return EFI_UNSUPPORTED;
- }
-
- //
- // Stop bus clock at first
- //
- Status = SdMmcHcStopClock (PciIo, Slot);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Supply clock frequency with specified divisor
- //
- ClockCtrl |= BIT0;
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_CLOCK_CTRL, FALSE, sizeof (ClockCtrl), &ClockCtrl);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "Set SDCLK Frequency Select and Internal Clock Enable fields fails\n"));
- return Status;
- }
-
- //
- // Wait Internal Clock Stable in the Clock Control register to be 1
- //
- Status = SdMmcHcWaitMmioSet (
- PciIo,
- Slot,
- SD_MMC_HC_CLOCK_CTRL,
- sizeof (ClockCtrl),
- BIT1,
- BIT1,
- SD_MMC_HC_GENERIC_TIMEOUT
- );
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Set SD Clock Enable in the Clock Control register to 1
- //
- ClockCtrl = BIT2;
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
-
- return Status;
-}
-
-/**
- SD/MMC bus power control.
-
- Refer to SD Host Controller Simplified spec 3.0 Section 3.3 for details.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] PowerCtrl The value setting to the power control register.
-
- @retval TRUE There is a SD/MMC card attached.
- @retval FALSE There is no a SD/MMC card attached.
-
-**/
-EFI_STATUS
-SdMmcHcPowerControl (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN UINT8 PowerCtrl
- )
-{
- EFI_STATUS Status;
-
- //
- // Clr SD Bus Power
- //
- PowerCtrl &= (UINT8)~BIT0;
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Set SD Bus Voltage Select and SD Bus Power fields in Power Control Register
- //
- PowerCtrl |= BIT0;
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);
-
- return Status;
-}
-
-/**
- Set the SD/MMC bus width.
-
- Refer to SD Host Controller Simplified spec 3.0 Section 3.4 for details.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] BusWidth The bus width used by the SD/MMC device, it must be 1, 4 or 8.
-
- @retval EFI_SUCCESS The bus width is set successfully.
- @retval Others The bus width isn't set successfully.
-
-**/
-EFI_STATUS
-SdMmcHcSetBusWidth (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN UINT16 BusWidth
- )
-{
- EFI_STATUS Status;
- UINT8 HostCtrl1;
-
- if (BusWidth == 1) {
- HostCtrl1 = (UINT8)~(BIT5 | BIT1);
- Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
- } else if (BusWidth == 4) {
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, TRUE, sizeof (HostCtrl1), &HostCtrl1);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- HostCtrl1 |= BIT1;
- HostCtrl1 &= (UINT8)~BIT5;
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);
- } else if (BusWidth == 8) {
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, TRUE, sizeof (HostCtrl1), &HostCtrl1);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- HostCtrl1 &= (UINT8)~BIT1;
- HostCtrl1 |= BIT5;
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);
- } else {
- ASSERT (FALSE);
- return EFI_INVALID_PARAMETER;
- }
-
- return Status;
-}
-
-/**
- Supply SD/MMC card with lowest clock frequency at initialization.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] BaseClkFreq The base clock frequency of host controller in MHz.
-
- @retval EFI_SUCCESS The clock is supplied successfully.
- @retval Others The clock isn't supplied successfully.
-
-**/
-EFI_STATUS
-SdMmcHcInitClockFreq (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN UINT32 BaseClkFreq
- )
-{
- EFI_STATUS Status;
- UINT32 InitFreq;
-
- //
- // Calculate a divisor for SD clock frequency
- //
- if (BaseClkFreq == 0) {
- //
- // Don't support get Base Clock Frequency information via another method
- //
- return EFI_UNSUPPORTED;
- }
- //
- // Supply 400KHz clock frequency at initialization phase.
- //
- InitFreq = 400;
- Status = SdMmcHcClockSupply (PciIo, Slot, InitFreq, BaseClkFreq);
- return Status;
-}
-
-/**
- Supply SD/MMC card with maximum voltage at initialization.
-
- Refer to SD Host Controller Simplified spec 3.0 Section 3.3 for details.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Capability The capability of the slot.
-
- @retval EFI_SUCCESS The voltage is supplied successfully.
- @retval Others The voltage isn't supplied successfully.
-
-**/
-EFI_STATUS
-SdMmcHcInitPowerVoltage (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN SD_MMC_HC_SLOT_CAP Capability
- )
-{
- EFI_STATUS Status;
- UINT8 MaxVoltage;
- UINT8 HostCtrl2;
-
- //
- // Calculate supported maximum voltage according to SD Bus Voltage Select
- //
- if (Capability.Voltage33 != 0) {
- //
- // Support 3.3V
- //
- MaxVoltage = 0x0E;
- } else if (Capability.Voltage30 != 0) {
- //
- // Support 3.0V
- //
- MaxVoltage = 0x0C;
- } else if (Capability.Voltage18 != 0) {
- //
- // Support 1.8V
- //
- MaxVoltage = 0x0A;
- HostCtrl2 = BIT3;
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
- gBS->Stall (5000);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- } else {
- ASSERT (FALSE);
- return EFI_DEVICE_ERROR;
- }
-
- //
- // Set SD Bus Voltage Select and SD Bus Power fields in Power Control Register
- //
- Status = SdMmcHcPowerControl (PciIo, Slot, MaxVoltage);
-
- return Status;
-}
-
-/**
- Initialize the Timeout Control register with most conservative value at initialization.
-
- Refer to SD Host Controller Simplified spec 3.0 Section 2.2.15 for details.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
-
- @retval EFI_SUCCESS The timeout control register is configured successfully.
- @retval Others The timeout control register isn't configured successfully.
-
-**/
-EFI_STATUS
-SdMmcHcInitTimeoutCtrl (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot
- )
-{
- EFI_STATUS Status;
- UINT8 Timeout;
-
- Timeout = 0x0E;
- Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_TIMEOUT_CTRL, FALSE, sizeof (Timeout), &Timeout);
-
- return Status;
-}
-
-/**
- Initial SD/MMC host controller with lowest clock frequency, max power and max timeout value
- at initialization.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Capability The capability of the slot.
- @param[in] BaseClkFreq The base clock frequency of host controller in MHz.
-
- @retval EFI_SUCCESS The host controller is initialized successfully.
- @retval Others The host controller isn't initialized successfully.
-
-**/
-EFI_STATUS
-SdMmcHcInitHost (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN SD_MMC_HC_SLOT_CAP Capability,
- IN UINT32 BaseClkFreq
- )
-{
- EFI_STATUS Status;
-
- Status = SdMmcHcInitClockFreq (PciIo, Slot, BaseClkFreq);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Status = SdMmcHcInitPowerVoltage (PciIo, Slot, Capability);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Status = SdMmcHcInitTimeoutCtrl (PciIo, Slot);
- return Status;
-}
-
-/**
- Turn on/off LED.
-
- @param[in] PciIo The PCI IO protocol instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] On The boolean to turn on/off LED.
-
- @retval EFI_SUCCESS The LED is turned on/off successfully.
- @retval Others The LED isn't turned on/off successfully.
-
-**/
-EFI_STATUS
-SdMmcHcLedOnOff (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT8 Slot,
- IN BOOLEAN On
- )
-{
- EFI_STATUS Status;
- UINT8 HostCtrl1;
-
- if (On) {
- HostCtrl1 = BIT0;
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
- } else {
- HostCtrl1 = (UINT8)~BIT0;
- Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
- }
-
- return Status;
-}
-
-/**
- Build ADMA descriptor table for transfer.
-
- Refer to SD Host Controller Simplified spec 3.0 Section 1.13 for details.
-
- @param[in] Trb The pointer to the SD_MMC_HC_TRB instance.
-
- @retval EFI_SUCCESS The ADMA descriptor table is created successfully.
- @retval Others The ADMA descriptor table isn't created successfully.
-
-**/
-EFI_STATUS
-BuildAdmaDescTable (
- IN SD_MMC_HC_TRB *Trb
- )
-{
- EFI_PHYSICAL_ADDRESS Data;
- UINT64 DataLen;
- UINT64 Entries;
- UINT32 Index;
- UINT64 Remaining;
- UINT32 Address;
- UINTN TableSize;
- EFI_PCI_IO_PROTOCOL *PciIo;
- EFI_STATUS Status;
- UINTN Bytes;
-
- Data = Trb->DataPhy;
- DataLen = Trb->DataLen;
- PciIo = Trb->Private->PciIo;
- //
- // Only support 32bit ADMA Descriptor Table
- //
- if ((Data >= 0x100000000ul) || ((Data + DataLen) > 0x100000000ul)) {
- return EFI_INVALID_PARAMETER;
- }
- //
- // Address field shall be set on 32-bit boundary (Lower 2-bit is always set to 0)
- // for 32-bit address descriptor table.
- //
- if ((Data & (BIT0 | BIT1)) != 0) {
- DEBUG ((DEBUG_INFO, "The buffer [0x%x] to construct ADMA desc is not aligned to 4 bytes boundary!\n", Data));
- }
-
- Entries = DivU64x32 ((DataLen + ADMA_MAX_DATA_PER_LINE - 1), ADMA_MAX_DATA_PER_LINE);
- TableSize = (UINTN)MultU64x32 (Entries, sizeof (SD_MMC_HC_ADMA_DESC_LINE));
- Trb->AdmaPages = (UINT32)EFI_SIZE_TO_PAGES (TableSize);
- Status = PciIo->AllocateBuffer (
- PciIo,
- AllocateAnyPages,
- EfiBootServicesData,
- EFI_SIZE_TO_PAGES (TableSize),
- (VOID **)&Trb->AdmaDesc,
- 0
- );
- if (EFI_ERROR (Status)) {
- return EFI_OUT_OF_RESOURCES;
- }
- ZeroMem (Trb->AdmaDesc, TableSize);
- Bytes = TableSize;
- Status = PciIo->Map (
- PciIo,
- EfiPciIoOperationBusMasterCommonBuffer,
- Trb->AdmaDesc,
- &Bytes,
- &Trb->AdmaDescPhy,
- &Trb->AdmaMap
- );
-
- if (EFI_ERROR (Status) || (Bytes != TableSize)) {
- //
- // Map error or unable to map the whole RFis buffer into a contiguous region.
- //
- PciIo->FreeBuffer (
- PciIo,
- EFI_SIZE_TO_PAGES (TableSize),
- Trb->AdmaDesc
- );
- return EFI_OUT_OF_RESOURCES;
- }
-
- if ((UINT64)(UINTN)Trb->AdmaDescPhy > 0x100000000ul) {
- //
- // The ADMA doesn't support 64bit addressing.
- //
- PciIo->Unmap (
- PciIo,
- Trb->AdmaMap
- );
- PciIo->FreeBuffer (
- PciIo,
- EFI_SIZE_TO_PAGES (TableSize),
- Trb->AdmaDesc
- );
- return EFI_DEVICE_ERROR;
- }
-
- Remaining = DataLen;
- Address = (UINT32)Data;
- for (Index = 0; Index < Entries; Index++) {
- if (Remaining <= ADMA_MAX_DATA_PER_LINE) {
- Trb->AdmaDesc[Index].Valid = 1;
- Trb->AdmaDesc[Index].Act = 2;
- Trb->AdmaDesc[Index].Length = (UINT16)Remaining;
- Trb->AdmaDesc[Index].Address = Address;
- break;
- } else {
- Trb->AdmaDesc[Index].Valid = 1;
- Trb->AdmaDesc[Index].Act = 2;
- Trb->AdmaDesc[Index].Length = 0;
- Trb->AdmaDesc[Index].Address = Address;
- }
-
- Remaining -= ADMA_MAX_DATA_PER_LINE;
- Address += ADMA_MAX_DATA_PER_LINE;
- }
-
- //
- // Set the last descriptor line as end of descriptor table
- //
- Trb->AdmaDesc[Index].End = 1;
- return EFI_SUCCESS;
-}
-
-/**
- Create a new TRB for the SD/MMC cmd request.
-
- @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.
- @param[in] Slot The slot number of the SD card to send the command to.
- @param[in] Packet A pointer to the SD command data structure.
- @param[in] Event If Event is NULL, blocking I/O is performed. If Event is
- not NULL, then nonblocking I/O is performed, and Event
- will be signaled when the Packet completes.
-
- @return Created Trb or NULL.
-
-**/
-SD_MMC_HC_TRB *
-SdMmcCreateTrb (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN UINT8 Slot,
- IN EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet,
- IN EFI_EVENT Event
- )
-{
- SD_MMC_HC_TRB *Trb;
- EFI_STATUS Status;
- EFI_TPL OldTpl;
- EFI_PCI_IO_PROTOCOL_OPERATION Flag;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINTN MapLength;
-
- Trb = AllocateZeroPool (sizeof (SD_MMC_HC_TRB));
- if (Trb == NULL) {
- return NULL;
- }
-
- Trb->Signature = SD_MMC_HC_TRB_SIG;
- Trb->Slot = Slot;
- Trb->BlockSize = 0x200;
- Trb->Packet = Packet;
- Trb->Event = Event;
- Trb->Started = FALSE;
- Trb->Timeout = Packet->Timeout;
- Trb->Private = Private;
-
- if ((Packet->InTransferLength != 0) && (Packet->InDataBuffer != NULL)) {
- Trb->Data = Packet->InDataBuffer;
- Trb->DataLen = Packet->InTransferLength;
- Trb->Read = TRUE;
- } else if ((Packet->OutTransferLength != 0) && (Packet->OutDataBuffer != NULL)) {
- Trb->Data = Packet->OutDataBuffer;
- Trb->DataLen = Packet->OutTransferLength;
- Trb->Read = FALSE;
- } else if ((Packet->InTransferLength == 0) && (Packet->OutTransferLength == 0)) {
- Trb->Data = NULL;
- Trb->DataLen = 0;
- } else {
- goto Error;
- }
-
- if (Trb->DataLen < Trb->BlockSize) {
- Trb->BlockSize = (UINT16)Trb->DataLen;
- }
-
- if (((Private->Slot[Trb->Slot].CardType == EmmcCardType) &&
- (Packet->SdMmcCmdBlk->CommandIndex == EMMC_SEND_TUNING_BLOCK)) ||
- ((Private->Slot[Trb->Slot].CardType == SdCardType) &&
- (Packet->SdMmcCmdBlk->CommandIndex == SD_SEND_TUNING_BLOCK))) {
- Trb->Mode = SdMmcPioMode;
- } else {
- if (Trb->Read) {
- Flag = EfiPciIoOperationBusMasterWrite;
- } else {
- Flag = EfiPciIoOperationBusMasterRead;
- }
-
- PciIo = Private->PciIo;
- if (Trb->DataLen != 0) {
- MapLength = Trb->DataLen;
- Status = PciIo->Map (
- PciIo,
- Flag,
- Trb->Data,
- &MapLength,
- &Trb->DataPhy,
- &Trb->DataMap
- );
- if (EFI_ERROR (Status) || (Trb->DataLen != MapLength)) {
- Status = EFI_BAD_BUFFER_SIZE;
- goto Error;
- }
- }
-
- if (Trb->DataLen == 0) {
- Trb->Mode = SdMmcNoData;
- } else if (Private->Capability[Slot].Adma2 != 0) {
- Trb->Mode = SdMmcAdmaMode;
- Status = BuildAdmaDescTable (Trb);
- if (EFI_ERROR (Status)) {
- PciIo->Unmap (PciIo, Trb->DataMap);
- goto Error;
- }
- } else if (Private->Capability[Slot].Sdma != 0) {
- Trb->Mode = SdMmcSdmaMode;
- } else {
- Trb->Mode = SdMmcPioMode;
- }
- }
-
- if (Event != NULL) {
- OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
- InsertTailList (&Private->Queue, &Trb->TrbList);
- gBS->RestoreTPL (OldTpl);
- }
-
- return Trb;
-
-Error:
- SdMmcFreeTrb (Trb);
- return NULL;
-}
-
-/**
- Free the resource used by the TRB.
-
- @param[in] Trb The pointer to the SD_MMC_HC_TRB instance.
-
-**/
-VOID
-SdMmcFreeTrb (
- IN SD_MMC_HC_TRB *Trb
- )
-{
- EFI_PCI_IO_PROTOCOL *PciIo;
-
- PciIo = Trb->Private->PciIo;
-
- if (Trb->AdmaMap != NULL) {
- PciIo->Unmap (
- PciIo,
- Trb->AdmaMap
- );
- }
- if (Trb->AdmaDesc != NULL) {
- PciIo->FreeBuffer (
- PciIo,
- Trb->AdmaPages,
- Trb->AdmaDesc
- );
- }
- if (Trb->DataMap != NULL) {
- PciIo->Unmap (
- PciIo,
- Trb->DataMap
- );
- }
- FreePool (Trb);
- return;
-}
-
-/**
- Check if the env is ready for execute specified TRB.
-
- @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.
- @param[in] Trb The pointer to the SD_MMC_HC_TRB instance.
-
- @retval EFI_SUCCESS The env is ready for TRB execution.
- @retval EFI_NOT_READY The env is not ready for TRB execution.
- @retval Others Some erros happen.
-
-**/
-EFI_STATUS
-SdMmcCheckTrbEnv (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN SD_MMC_HC_TRB *Trb
- )
-{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT32 PresentState;
-
- Packet = Trb->Packet;
-
- if ((Packet->SdMmcCmdBlk->CommandType == SdMmcCommandTypeAdtc) ||
- (Packet->SdMmcCmdBlk->ResponseType == SdMmcResponseTypeR1b) ||
- (Packet->SdMmcCmdBlk->ResponseType == SdMmcResponseTypeR5b)) {
- //
- // Wait Command Inhibit (CMD) and Command Inhibit (DAT) in
- // the Present State register to be 0
- //
- PresentState = BIT0 | BIT1;
- } else {
- //
- // Wait Command Inhibit (CMD) in the Present State register
- // to be 0
- //
- PresentState = BIT0;
- }
-
- PciIo = Private->PciIo;
- Status = SdMmcHcCheckMmioSet (
- PciIo,
- Trb->Slot,
- SD_MMC_HC_PRESENT_STATE,
- sizeof (PresentState),
- PresentState,
- 0
- );
-
- return Status;
-}
-
-/**
- Wait for the env to be ready for execute specified TRB.
-
- @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.
- @param[in] Trb The pointer to the SD_MMC_HC_TRB instance.
-
- @retval EFI_SUCCESS The env is ready for TRB execution.
- @retval EFI_TIMEOUT The env is not ready for TRB execution in time.
- @retval Others Some erros happen.
-
-**/
-EFI_STATUS
-SdMmcWaitTrbEnv (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN SD_MMC_HC_TRB *Trb
- )
-{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
- UINT64 Timeout;
- BOOLEAN InfiniteWait;
-
- //
- // Wait Command Complete Interrupt Status bit in Normal Interrupt Status Register
- //
- Packet = Trb->Packet;
- Timeout = Packet->Timeout;
- if (Timeout == 0) {
- InfiniteWait = TRUE;
- } else {
- InfiniteWait = FALSE;
- }
-
- while (InfiniteWait || (Timeout > 0)) {
- //
- // Check Trb execution result by reading Normal Interrupt Status register.
- //
- Status = SdMmcCheckTrbEnv (Private, Trb);
- if (Status != EFI_NOT_READY) {
- return Status;
- }
- //
- // Stall for 1 microsecond.
- //
- gBS->Stall (1);
-
- Timeout--;
- }
-
- return EFI_TIMEOUT;
-}
-
-/**
- Execute the specified TRB.
-
- @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.
- @param[in] Trb The pointer to the SD_MMC_HC_TRB instance.
-
- @retval EFI_SUCCESS The TRB is sent to host controller successfully.
- @retval Others Some erros happen when sending this request to the host controller.
-
-**/
-EFI_STATUS
-SdMmcExecTrb (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN SD_MMC_HC_TRB *Trb
- )
-{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
- EFI_PCI_IO_PROTOCOL *PciIo;
- UINT16 Cmd;
- UINT16 IntStatus;
- UINT32 Argument;
- UINT16 BlkCount;
- UINT16 BlkSize;
- UINT16 TransMode;
- UINT8 HostCtrl1;
- UINT32 SdmaAddr;
- UINT64 AdmaAddr;
-
- Packet = Trb->Packet;
- PciIo = Trb->Private->PciIo;
- //
- // Clear all bits in Error Interrupt Status Register
- //
- IntStatus = 0xFFFF;
- Status = SdMmcHcRwMmio (PciIo, Trb->Slot, SD_MMC_HC_ERR_INT_STS, FALSE, sizeof (IntStatus), &IntStatus);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- //
- // Clear all bits in Normal Interrupt Status Register excepts for Card Removal & Card Insertion bits.
- //
- IntStatus = 0xFF3F;
- Status = SdMmcHcRwMmio (PciIo, Trb->Slot, SD_MMC_HC_NOR_INT_STS, FALSE, sizeof (IntStatus), &IntStatus);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- //
- // Set Host Control 1 register DMA Select field
- //
- if (Trb->Mode == SdMmcAdmaMode) {
- HostCtrl1 = BIT4;
- Status = SdMmcHcOrMmio (PciIo, Trb->Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- }
-
- SdMmcHcLedOnOff (PciIo, Trb->Slot, TRUE);
-
- if (Trb->Mode == SdMmcSdmaMode) {
- if ((UINT64)(UINTN)Trb->DataPhy >= 0x100000000ul) {
- return EFI_INVALID_PARAMETER;
- }
-
- SdmaAddr = (UINT32)(UINTN)Trb->DataPhy;
- Status = SdMmcHcRwMmio (PciIo, Trb->Slot, SD_MMC_HC_SDMA_ADDR, FALSE, sizeof (SdmaAddr), &SdmaAddr);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- } else if (Trb->Mode == SdMmcAdmaMode) {
- AdmaAddr = (UINT64)(UINTN)Trb->AdmaDescPhy;
- Status = SdMmcHcRwMmio (PciIo, Trb->Slot, SD_MMC_HC_ADMA_SYS_ADDR, FALSE, sizeof (AdmaAddr), &AdmaAddr);
- if (EFI_ERROR (Status)) {
- return Status;
- }
- }
-
- BlkSize = Trb->BlockSize;
- if (Trb->Mode == SdMmcSdmaMode) {
- //
- // Set SDMA boundary to be 512K bytes.
- //
- BlkSize |= 0x7000;
- }
-
- Status = SdMmcHcRwMmio (PciIo, Trb->Slot, SD_MMC_HC_BLK_SIZE, FALSE, sizeof (BlkSize), &BlkSize);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- BlkCount = 0;
- if (Trb->Mode != SdMmcNoData) {
- //
- // Calcuate Block Count.
- //
- BlkCount = (UINT16)(Trb->DataLen / Trb->BlockSize);
- }
- Status = SdMmcHcRwMmio (PciIo, Trb->Slot, SD_MMC_HC_BLK_COUNT, FALSE, sizeof (BlkCount), &BlkCount);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Argument = Packet->SdMmcCmdBlk->CommandArgument;
- Status = SdMmcHcRwMmio (PciIo, Trb->Slot, SD_MMC_HC_ARG1, FALSE, sizeof (Argument), &Argument);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- TransMode = 0;
- if (Trb->Mode != SdMmcNoData) {
- if (Trb->Mode != SdMmcPioMode) {
- TransMode |= BIT0;
- }
- if (Trb->Read) {
- TransMode |= BIT4;
- }
- if (BlkCount > 1) {
- TransMode |= BIT5 | BIT1;
- }
- //
- // Only SD memory card needs to use AUTO CMD12 feature.
- //
- if (Private->Slot[Trb->Slot].CardType == SdCardType) {
- if (BlkCount > 1) {
- TransMode |= BIT2;
- }
- }
- }
-
- Status = SdMmcHcRwMmio (PciIo, Trb->Slot, SD_MMC_HC_TRANS_MOD, FALSE, sizeof (TransMode), &TransMode);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- Cmd = (UINT16)LShiftU64(Packet->SdMmcCmdBlk->CommandIndex, 8);
- if (Packet->SdMmcCmdBlk->CommandType == SdMmcCommandTypeAdtc) {
- Cmd |= BIT5;
- }
- //
- // Convert ResponseType to value
- //
- if (Packet->SdMmcCmdBlk->CommandType != SdMmcCommandTypeBc) {
- switch (Packet->SdMmcCmdBlk->ResponseType) {
- case SdMmcResponseTypeR1:
- case SdMmcResponseTypeR5:
- case SdMmcResponseTypeR6:
- case SdMmcResponseTypeR7:
- Cmd |= (BIT1 | BIT3 | BIT4);
- break;
- case SdMmcResponseTypeR2:
- Cmd |= (BIT0 | BIT3);
- break;
- case SdMmcResponseTypeR3:
- case SdMmcResponseTypeR4:
- Cmd |= BIT1;
- break;
- case SdMmcResponseTypeR1b:
- case SdMmcResponseTypeR5b:
- Cmd |= (BIT0 | BIT1 | BIT3 | BIT4);
- break;
- default:
- ASSERT (FALSE);
- break;
- }
- }
- //
- // Execute cmd
- //
- Status = SdMmcHcRwMmio (PciIo, Trb->Slot, SD_MMC_HC_COMMAND, FALSE, sizeof (Cmd), &Cmd);
- return Status;
-}
-
-/**
- Check the TRB execution result.
-
- @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.
- @param[in] Trb The pointer to the SD_MMC_HC_TRB instance.
-
- @retval EFI_SUCCESS The TRB is executed successfully.
- @retval EFI_NOT_READY The TRB is not completed for execution.
- @retval Others Some erros happen when executing this request.
-
-**/
-EFI_STATUS
-SdMmcCheckTrbResult (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN SD_MMC_HC_TRB *Trb
- )
-{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
- UINT16 IntStatus;
- UINT32 Response[4];
- UINT32 SdmaAddr;
- UINT8 Index;
- UINT8 SwReset;
- UINT32 PioLength;
-
- SwReset = 0;
- Packet = Trb->Packet;
- //
- // Check Trb execution result by reading Normal Interrupt Status register.
- //
- Status = SdMmcHcRwMmio (
- Private->PciIo,
- Trb->Slot,
- SD_MMC_HC_NOR_INT_STS,
- TRUE,
- sizeof (IntStatus),
- &IntStatus
- );
- if (EFI_ERROR (Status)) {
- goto Done;
- }
- //
- // Check Transfer Complete bit is set or not.
- //
- if ((IntStatus & BIT1) == BIT1) {
- if ((IntStatus & BIT15) == BIT15) {
- //
- // Read Error Interrupt Status register to check if the error is
- // Data Timeout Error.
- // If yes, treat it as success as Transfer Complete has higher
- // priority than Data Timeout Error.
- //
- Status = SdMmcHcRwMmio (
- Private->PciIo,
- Trb->Slot,
- SD_MMC_HC_ERR_INT_STS,
- TRUE,
- sizeof (IntStatus),
- &IntStatus
- );
- if (!EFI_ERROR (Status)) {
- if ((IntStatus & BIT4) == BIT4) {
- Status = EFI_SUCCESS;
- } else {
- Status = EFI_DEVICE_ERROR;
- }
- }
- }
-
- goto Done;
- }
- //
- // Check if there is a error happened during cmd execution.
- // If yes, then do error recovery procedure to follow SD Host Controller
- // Simplified Spec 3.0 section 3.10.1.
- //
- if ((IntStatus & BIT15) == BIT15) {
- Status = SdMmcHcRwMmio (
- Private->PciIo,
- Trb->Slot,
- SD_MMC_HC_ERR_INT_STS,
- TRUE,
- sizeof (IntStatus),
- &IntStatus
- );
- if (EFI_ERROR (Status)) {
- goto Done;
- }
- if ((IntStatus & 0x0F) != 0) {
- SwReset |= BIT1;
- }
- if ((IntStatus & 0xF0) != 0) {
- SwReset |= BIT2;
- }
-
- Status = SdMmcHcRwMmio (
- Private->PciIo,
- Trb->Slot,
- SD_MMC_HC_SW_RST,
- FALSE,
- sizeof (SwReset),
- &SwReset
- );
- if (EFI_ERROR (Status)) {
- goto Done;
- }
- Status = SdMmcHcWaitMmioSet (
- Private->PciIo,
- Trb->Slot,
- SD_MMC_HC_SW_RST,
- sizeof (SwReset),
- 0xFF,
- 0,
- SD_MMC_HC_GENERIC_TIMEOUT
- );
- if (EFI_ERROR (Status)) {
- goto Done;
- }
-
- Status = EFI_DEVICE_ERROR;
- goto Done;
- }
- //
- // Check if DMA interrupt is signalled for the SDMA transfer.
- //
- if ((Trb->Mode == SdMmcSdmaMode) && ((IntStatus & BIT3) == BIT3)) {
- //
- // Clear DMA interrupt bit.
- //
- IntStatus = BIT3;
- Status = SdMmcHcRwMmio (
- Private->PciIo,
- Trb->Slot,
- SD_MMC_HC_NOR_INT_STS,
- FALSE,
- sizeof (IntStatus),
- &IntStatus
- );
- if (EFI_ERROR (Status)) {
- goto Done;
- }
- //
- // Update SDMA Address register.
- //
- SdmaAddr = SD_MMC_SDMA_ROUND_UP ((UINT32)(UINTN)Trb->DataPhy, SD_MMC_SDMA_BOUNDARY);
- Status = SdMmcHcRwMmio (
- Private->PciIo,
- Trb->Slot,
- SD_MMC_HC_SDMA_ADDR,
- FALSE,
- sizeof (UINT32),
- &SdmaAddr
- );
- if (EFI_ERROR (Status)) {
- goto Done;
- }
- Trb->DataPhy = (UINT32)(UINTN)SdmaAddr;
- }
-
- if ((Packet->SdMmcCmdBlk->CommandType != SdMmcCommandTypeAdtc) &&
- (Packet->SdMmcCmdBlk->ResponseType != SdMmcResponseTypeR1b) &&
- (Packet->SdMmcCmdBlk->ResponseType != SdMmcResponseTypeR5b)) {
- if ((IntStatus & BIT0) == BIT0) {
- Status = EFI_SUCCESS;
- goto Done;
- }
- }
-
- if (((Private->Slot[Trb->Slot].CardType == EmmcCardType) &&
- (Packet->SdMmcCmdBlk->CommandIndex == EMMC_SEND_TUNING_BLOCK)) ||
- ((Private->Slot[Trb->Slot].CardType == SdCardType) &&
- (Packet->SdMmcCmdBlk->CommandIndex == SD_SEND_TUNING_BLOCK))) {
- //
- // When performing tuning procedure (Execute Tuning is set to 1) through PIO mode,
- // wait Buffer Read Ready bit of Normal Interrupt Status Register to be 1.
- // Refer to SD Host Controller Simplified Specification 3.0 figure 2-29 for details.
- //
- if ((IntStatus & BIT5) == BIT5) {
- //
- // Clear Buffer Read Ready interrupt at first.
- //
- IntStatus = BIT5;
- SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_NOR_INT_STS, FALSE, sizeof (IntStatus), &IntStatus);
- //
- // Read data out from Buffer Port register
- //
- for (PioLength = 0; PioLength < Trb->DataLen; PioLength += 4) {
- SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_BUF_DAT_PORT, TRUE, 4, (UINT8*)Trb->Data + PioLength);
- }
- Status = EFI_SUCCESS;
- goto Done;
- }
- }
-
- Status = EFI_NOT_READY;
-Done:
- //
- // Get response data when the cmd is executed successfully.
- //
- if (!EFI_ERROR (Status)) {
- if (Packet->SdMmcCmdBlk->CommandType != SdMmcCommandTypeBc) {
- for (Index = 0; Index < 4; Index++) {
- Status = SdMmcHcRwMmio (
- Private->PciIo,
- Trb->Slot,
- SD_MMC_HC_RESPONSE + Index * 4,
- TRUE,
- sizeof (UINT32),
- &Response[Index]
- );
- if (EFI_ERROR (Status)) {
- SdMmcHcLedOnOff (Private->PciIo, Trb->Slot, FALSE);
- return Status;
- }
- }
- CopyMem (Packet->SdMmcStatusBlk, Response, sizeof (Response));
- }
- }
-
- if (Status != EFI_NOT_READY) {
- SdMmcHcLedOnOff (Private->PciIo, Trb->Slot, FALSE);
- }
-
- return Status;
-}
-
-/**
- Wait for the TRB execution result.
-
- @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.
- @param[in] Trb The pointer to the SD_MMC_HC_TRB instance.
-
- @retval EFI_SUCCESS The TRB is executed successfully.
- @retval Others Some erros happen when executing this request.
-
-**/
-EFI_STATUS
-SdMmcWaitTrbResult (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
- IN SD_MMC_HC_TRB *Trb
- )
-{
- EFI_STATUS Status;
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;
- UINT64 Timeout;
- BOOLEAN InfiniteWait;
-
- Packet = Trb->Packet;
- //
- // Wait Command Complete Interrupt Status bit in Normal Interrupt Status Register
- //
- Timeout = Packet->Timeout;
- if (Timeout == 0) {
- InfiniteWait = TRUE;
- } else {
- InfiniteWait = FALSE;
- }
-
- while (InfiniteWait || (Timeout > 0)) {
- //
- // Check Trb execution result by reading Normal Interrupt Status register.
- //
- Status = SdMmcCheckTrbResult (Private, Trb);
- if (Status != EFI_NOT_READY) {
- return Status;
- }
- //
- // Stall for 1 microsecond.
- //
- gBS->Stall (1);
-
- Timeout--;
- }
-
- return EFI_TIMEOUT;
-}
-
diff --git a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonPciHci.c b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonPciHci.c
new file mode 100644
index 0000000..8a22046
--- /dev/null
+++ b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonPciHci.c
@@ -0,0 +1,321 @@
+/** @file
+ This driver is used to manage SD/MMC PCI host controllers which are compliance
+ with SD Host Controller Simplified Specification version 3.00.
+
+ It would expose EFI_SD_MMC_PASS_THRU_PROTOCOL for upper layer use.
+
+ Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2018, Marvell International, Ltd. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "XenonSdMmcOverride.h"
+
+/**
+ Read/Write specified SD/MMC host controller mmio register.
+
+ @param[in] PciIo The PCI IO protocol instance.
+ @param[in] BarIndex The BAR index of the standard PCI Configuration
+ header to use as the base address for the memory
+ operation to perform.
+ @param[in] Offset The offset within the selected BAR to start the
+ memory operation.
+ @param[in] Read A boolean to indicate it's read or write operation.
+ @param[in] Count The width of the mmio register in bytes.
+ Must be 1, 2 , 4 or 8 bytes.
+ @param[in, out] Data For read operations, the destination buffer to store
+ the results. For write operations, the source buffer
+ to write data from. The caller is responsible for
+ having ownership of the data buffer and ensuring its
+ size not less than Count bytes.
+
+ @retval EFI_INVALID_PARAMETER The PciIo or Data is NULL or the Count is not valid.
+ @retval EFI_SUCCESS The read/write operation succeeds.
+ @retval Others The read/write operation fails.
+
+**/
+EFI_STATUS
+EFIAPI
+XenonHcRwMmio (
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 BarIndex,
+ IN UINT32 Offset,
+ IN BOOLEAN Read,
+ IN UINT8 Count,
+ IN OUT VOID *Data
+ )
+{
+ EFI_STATUS Status;
+
+ if ((PciIo == NULL) || (Data == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if ((Count != 1) && (Count != 2) && (Count != 4) && (Count != 8)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if (Read) {
+ Status = PciIo->Mem.Read (
+ PciIo,
+ EfiPciIoWidthUint8,
+ BarIndex,
+ (UINT64) Offset,
+ Count,
+ Data
+ );
+ } else {
+ Status = PciIo->Mem.Write (
+ PciIo,
+ EfiPciIoWidthUint8,
+ BarIndex,
+ (UINT64) Offset,
+ Count,
+ Data
+ );
+ }
+
+ return Status;
+}
+
+/**
+ Do OR operation with the value of the specified SD/MMC host controller mmio register.
+
+ @param[in] PciIo The PCI IO protocol instance.
+ @param[in] BarIndex The BAR index of the standard PCI Configuration
+ header to use as the base address for the memory
+ operation to perform.
+ @param[in] Offset The offset within the selected BAR to start the
+ memory operation.
+ @param[in] Count The width of the mmio register in bytes.
+ Must be 1, 2 , 4 or 8 bytes.
+ @param[in] OrData The pointer to the data used to do OR operation.
+ The caller is responsible for having ownership of
+ the data buffer and ensuring its size not less than
+ Count bytes.
+
+ @retval EFI_INVALID_PARAMETER The PciIo or OrData is NULL or the Count is not valid.
+ @retval EFI_SUCCESS The OR operation succeeds.
+ @retval Others The OR operation fails.
+
+**/
+EFI_STATUS
+EFIAPI
+XenonHcOrMmio (
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 BarIndex,
+ IN UINT32 Offset,
+ IN UINT8 Count,
+ IN VOID *OrData
+ )
+{
+ EFI_STATUS Status;
+ UINT64 Data;
+ UINT64 Or;
+
+ Status = XenonHcRwMmio (PciIo, BarIndex, Offset, TRUE, Count, &Data);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ if (Count == 1) {
+ Or = *(UINT8*) OrData;
+ } else if (Count == 2) {
+ Or = *(UINT16*) OrData;
+ } else if (Count == 4) {
+ Or = *(UINT32*) OrData;
+ } else if (Count == 8) {
+ Or = *(UINT64*) OrData;
+ } else {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Data |= Or;
+ Status = XenonHcRwMmio (PciIo, BarIndex, Offset, FALSE, Count, &Data);
+
+ return Status;
+}
+
+/**
+ Do AND operation with the value of the specified SD/MMC host controller mmio register.
+
+ @param[in] PciIo The PCI IO protocol instance.
+ @param[in] BarIndex The BAR index of the standard PCI Configuration
+ header to use as the base address for the memory
+ operation to perform.
+ @param[in] Offset The offset within the selected BAR to start the
+ memory operation.
+ @param[in] Count The width of the mmio register in bytes.
+ Must be 1, 2 , 4 or 8 bytes.
+ @param[in] AndData The pointer to the data used to do AND operation.
+ The caller is responsible for having ownership of
+ the data buffer and ensuring its size not less than
+ Count bytes.
+
+ @retval EFI_INVALID_PARAMETER The PciIo or AndData is NULL or the Count is not valid.
+ @retval EFI_SUCCESS The AND operation succeeds.
+ @retval Others The AND operation fails.
+
+**/
+EFI_STATUS
+EFIAPI
+XenonHcAndMmio (
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 BarIndex,
+ IN UINT32 Offset,
+ IN UINT8 Count,
+ IN VOID *AndData
+ )
+{
+ EFI_STATUS Status;
+ UINT64 Data;
+ UINT64 And;
+
+ Status = XenonHcRwMmio (PciIo, BarIndex, Offset, TRUE, Count, &Data);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ if (Count == 1) {
+ And = *(UINT8*) AndData;
+ } else if (Count == 2) {
+ And = *(UINT16*) AndData;
+ } else if (Count == 4) {
+ And = *(UINT32*) AndData;
+ } else if (Count == 8) {
+ And = *(UINT64*) AndData;
+ } else {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Data &= And;
+ Status = XenonHcRwMmio (PciIo, BarIndex, Offset, FALSE, Count, &Data);
+
+ return Status;
+}
+
+/**
+ Wait for the value of the specified MMIO register set to the test value.
+
+ @param[in] PciIo The PCI IO protocol instance.
+ @param[in] BarIndex The BAR index of the standard PCI Configuration
+ header to use as the base address for the memory
+ operation to perform.
+ @param[in] Offset The offset within the selected BAR to start the
+ memory operation.
+ @param[in] Count The width of the mmio register in bytes.
+ Must be 1, 2, 4 or 8 bytes.
+ @param[in] MaskValue The mask value of memory.
+ @param[in] TestValue The test value of memory.
+
+ @retval EFI_NOT_READY The MMIO register hasn't set to the expected value.
+ @retval EFI_SUCCESS The MMIO register has expected value.
+ @retval Others The MMIO operation fails.
+
+**/
+EFI_STATUS
+EFIAPI
+XenonHcCheckMmioSet (
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 BarIndex,
+ IN UINT32 Offset,
+ IN UINT8 Count,
+ IN UINT64 MaskValue,
+ IN UINT64 TestValue
+ )
+{
+ EFI_STATUS Status;
+ UINT64 Value;
+
+ //
+ // Access PCI MMIO space to see if the value is the tested one.
+ //
+ Value = 0;
+ Status = XenonHcRwMmio (PciIo, BarIndex, Offset, TRUE, Count, &Value);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Value &= MaskValue;
+
+ if (Value == TestValue) {
+ return EFI_SUCCESS;
+ }
+
+ return EFI_NOT_READY;
+}
+
+/**
+ Wait for the value of the specified MMIO register set to the test value.
+
+ @param[in] PciIo The PCI IO protocol instance.
+ @param[in] BarIndex The BAR index of the standard PCI Configuration
+ header to use as the base address for the memory
+ operation to perform.
+ @param[in] Offset The offset within the selected BAR to start the
+ memory operation.
+ @param[in] Count The width of the mmio register in bytes.
+ Must be 1, 2, 4 or 8 bytes.
+ @param[in] MaskValue The mask value of memory.
+ @param[in] TestValue The test value of memory.
+ @param[in] Timeout The time out value for wait memory set, uses 1
+ microsecond as a unit.
+
+ @retval EFI_TIMEOUT The MMIO register hasn't expected value in timeout
+ range.
+ @retval EFI_SUCCESS The MMIO register has expected value.
+ @retval Others The MMIO operation fails.
+
+**/
+EFI_STATUS
+EFIAPI
+XenonHcWaitMmioSet (
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 BarIndex,
+ IN UINT32 Offset,
+ IN UINT8 Count,
+ IN UINT64 MaskValue,
+ IN UINT64 TestValue,
+ IN UINT64 Timeout
+ )
+{
+ EFI_STATUS Status;
+ BOOLEAN InfiniteWait;
+
+ if (Timeout == 0) {
+ InfiniteWait = TRUE;
+ } else {
+ InfiniteWait = FALSE;
+ }
+
+ while (InfiniteWait || (Timeout > 0)) {
+ Status = XenonHcCheckMmioSet (
+ PciIo,
+ BarIndex,
+ Offset,
+ Count,
+ MaskValue,
+ TestValue
+ );
+ if (Status != EFI_NOT_READY) {
+ return Status;
+ }
+
+ //
+ // Stall for 1 microsecond.
+ //
+ gBS->Stall (1);
+
+ Timeout--;
+ }
+
+ return EFI_TIMEOUT;
+}
diff --git a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.c b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.c
new file mode 100644
index 0000000..7babda1
--- /dev/null
+++ b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.c
@@ -0,0 +1,432 @@
+/*******************************************************************************
+Copyright (C) 2018 Marvell International Ltd.
+
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+* Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+* Neither the name of Marvell nor the names of its contributors may be
+ used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "XenonSdMmcOverride.h"
+
+STATIC EFI_HANDLE mXenonSdMmcOverrideHandle;
+STATIC EDKII_SD_MMC_OVERRIDE *mSdMmcOverride;
+
+STATIC
+EFI_STATUS
+EFIAPI
+XenonGetSdMmcDesc (
+ IN EFI_HANDLE ControllerHandle,
+ IN OUT MV_BOARD_SDMMC_DESC *SdMmcDesc
+ )
+{
+ EFI_STATUS Status;
+ MV_BOARD_SDMMC_DESC *SdMmcDescs;
+ NON_DISCOVERABLE_DEVICE *Device;
+ MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
+ UINTN Index;
+
+ Device = NULL;
+ Status = gBS->OpenProtocol (ControllerHandle,
+ &gEdkiiNonDiscoverableDeviceProtocolGuid,
+ (VOID **) &Device,
+ mXenonSdMmcOverrideHandle,
+ ControllerHandle,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ BoardDescProtocol = NULL;
+ Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
+ NULL,
+ (VOID **) &BoardDescProtocol);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = BoardDescProtocol->BoardDescSdMmcGet (BoardDescProtocol, &SdMmcDescs);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ for (Index = 0; Index < SdMmcDescs->SdMmcDevCount; Index++) {
+ if (SdMmcDescs[Index].SoC->SdMmcBaseAddress ==
+ Device->Resources[0].AddrRangeMin) {
+ *SdMmcDesc = SdMmcDescs[Index];
+ break;
+ }
+ }
+
+ if (Index == SdMmcDescs->SdMmcDevCount) {
+ BoardDescProtocol->BoardDescFree (SdMmcDescs);
+ return EFI_INVALID_PARAMETER;
+ }
+
+ BoardDescProtocol->BoardDescFree (SdMmcDescs);
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
+XenonGetPciIo (
+ IN EFI_HANDLE ControllerHandle,
+ IN OUT EFI_PCI_IO_PROTOCOL **PciIo
+ )
+{
+ EFI_STATUS Status;
+
+ *PciIo = NULL;
+ Status = gBS->OpenProtocol (ControllerHandle,
+ &gEfiPciIoProtocolGuid,
+ (VOID **) PciIo,
+ mXenonSdMmcOverrideHandle,
+ ControllerHandle,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+ return Status;
+}
+
+/**
+ Set SD Host Controler control 2 registry according to selected speed.
+
+ @param[in] ControllerHandle The EFI_HANDLE of the controller.
+ @param[in] Slot The slot number of the SD card to send the command to.
+ @param[in] Timing The timing to select.
+
+ @retval EFI_SUCCESS The override function completed successfully.
+ @retval EFI_NOT_FOUND The specified controller or slot does not exist.
+**/
+STATIC
+EFI_STATUS
+XenonSdMmcHcUhsSignaling (
+ IN EFI_HANDLE ControllerHandle,
+ IN UINT8 Slot,
+ IN SD_MMC_BUS_MODE Timing
+ )
+{
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ EFI_STATUS Status;
+ UINT8 HostCtrl2;
+ UINT8 XenonUhsSelect;
+
+ if (Slot != 0) {
+ return EFI_NOT_FOUND;
+ }
+
+ //
+ // Update Host Control Register 2 only for HS200/HS400.
+ //
+ switch (Timing) {
+ case SdMmcMmcHs200:
+ XenonUhsSelect = XENON_SD_MMC_HC_CTRL_HS200;
+ break;
+ case SdMmcMmcHs400:
+ XenonUhsSelect = XENON_SD_MMC_HC_CTRL_HS400;
+ break;
+ default:
+ return EFI_SUCCESS;
+ }
+
+ Status = XenonGetPciIo (ControllerHandle, &PciIo);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ HostCtrl2 = (UINT8)~UHS_MODE_SELECT_MASK;
+ Status = XenonHcAndMmio (PciIo,
+ Slot,
+ SDHC_HOST_CTRL2,
+ sizeof (HostCtrl2),
+ &HostCtrl2);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = XenonHcOrMmio (PciIo,
+ Slot,
+ SDHC_HOST_CTRL2,
+ sizeof (XenonUhsSelect),
+ &XenonUhsSelect);
+
+ return Status;
+}
+
+/**
+
+ Additional operations specific for host controller
+
+ @param[in] ControllerHandle The EFI_HANDLE of the controller.
+ @param[in] Slot The 0 based slot index.
+ @param[in] Timing The timing which should be set by
+ host controller.
+
+ @retval EFI_SUCCESS The override function completed successfully.
+ @retval EFI_NOT_FOUND The specified controller or slot does not exist.
+
+**/
+STATIC
+EFI_STATUS
+XenonSwitchClockFreqPost (
+ IN EFI_HANDLE ControllerHandle,
+ IN UINT8 Slot,
+ IN SD_MMC_BUS_MODE Timing
+ )
+{
+ EFI_STATUS Status;
+ MV_BOARD_SDMMC_DESC SdMmcDesc;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+
+ if (Slot != 0) {
+ return EFI_NOT_FOUND;
+ }
+
+ Status = XenonGetPciIo (ControllerHandle, &PciIo);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ Status = XenonGetSdMmcDesc (ControllerHandle, &SdMmcDesc);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = XenonSetPhy (PciIo,
+ SdMmcDesc.XenonSlowModeEnabled,
+ SdMmcDesc.XenonTuningStepDivisor,
+ Timing);
+
+ return Status;
+}
+
+/**
+
+ Override function for SDHCI controller operations
+
+ @param[in] ControllerHandle The EFI_HANDLE of the controller.
+ @param[in] Slot The 0 based slot index.
+ @param[in] PhaseType The type of operation and whether the
+ hook is invoked right before (pre) or
+ right after (post)
+ @param[in] PhaseData The pointer to a phase-specific data.
+
+ @retval EFI_SUCCESS The override function completed successfully.
+ @retval EFI_NOT_FOUND The specified controller or slot does not exist.
+ @retval EFI_UNSUPPORTED Nothing has been done in connection of PhaseType
+ @retval EFI_INVALID_PARAMETER PhaseType is invalid
+
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+XenonSdMmcNotifyPhase (
+ IN EFI_HANDLE ControllerHandle,
+ IN UINT8 Slot,
+ IN EDKII_SD_MMC_PHASE_TYPE PhaseType,
+ IN OUT VOID *PhaseData
+ )
+{
+ EFI_STATUS Status;
+ MV_BOARD_SDMMC_DESC SdMmcDesc;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ SD_MMC_BUS_MODE *Timing;
+
+ if (Slot != 0) {
+ return EFI_NOT_FOUND;
+ }
+
+ switch (PhaseType) {
+ case EdkiiSdMmcInitHostPre:
+ Status = XenonGetPciIo (ControllerHandle, &PciIo);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = XenonGetSdMmcDesc (ControllerHandle, &SdMmcDesc);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = XenonInit (PciIo,
+ SdMmcDesc.Xenon1v8Enabled,
+ SdMmcDesc.XenonSlowModeEnabled,
+ SdMmcDesc.XenonTuningStepDivisor);
+ return Status;
+ case EdkiiSdMmcUhsSignaling:
+ if (PhaseData == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Timing = (SD_MMC_BUS_MODE *)PhaseData;
+
+ Status = XenonSdMmcHcUhsSignaling (ControllerHandle,
+ Slot,
+ *Timing);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ break;
+ case EdkiiSdMmcSwitchClockFreqPost:
+ if (PhaseData == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Timing = (SD_MMC_BUS_MODE *)PhaseData;
+
+ Status = XenonSwitchClockFreqPost (ControllerHandle,
+ Slot,
+ *Timing);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ break;
+ default:
+ return EFI_SUCCESS;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+
+ Override function for SDHCI capability bits
+
+ @param[in] ControllerHandle The EFI_HANDLE of the controller.
+ @param[in] Slot The 0 based slot index.
+ @param[in,out] SdMmcHcSlotCapability The SDHCI capability structure.
+ @param[in,out] BaseClkFreq The base clock frequency value that
+ optionally can be updated.
+
+ @retval EFI_SUCCESS The override function completed successfully.
+ @retval EFI_NOT_FOUND The specified controller or slot does not exist.
+ @retval EFI_INVALID_PARAMETER SdMmcHcSlotCapability is NULL
+
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+XenonSdMmcCapability (
+ IN EFI_HANDLE ControllerHandle,
+ IN UINT8 Slot,
+ IN OUT VOID *SdMmcHcSlotCapability,
+ IN OUT UINT32 *BaseClkFreq
+ )
+{
+ EFI_STATUS Status;
+ MV_BOARD_SDMMC_DESC SdMmcDesc;
+ UINT64 Capability;
+
+ if (SdMmcHcSlotCapability == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+ if (Slot != 0) {
+ return EFI_NOT_FOUND;
+ }
+ Status = XenonGetSdMmcDesc (ControllerHandle, &SdMmcDesc);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Capability = ReadUnaligned64 (SdMmcHcSlotCapability);
+
+ //
+ // Override capabilities structure according to board configuration.
+ //
+ if (SdMmcDesc.Xenon1v8Enabled) {
+ Capability &= ~(UINT64)(SDHC_CAP_VOLTAGE_33 | SDHC_CAP_VOLTAGE_30);
+ } else {
+ Capability &= ~(UINT64)(SDHC_CAP_SDR104 | SDHC_CAP_DDR50 |
+ SDHC_CAP_SDR50 | SDHC_CAP_VOLTAGE_18);
+ }
+
+ if (!SdMmcDesc.Xenon8BitBusEnabled) {
+ Capability &= ~(UINT64)(SDHC_CAP_BUS_WIDTH8);
+ }
+
+ if (SdMmcDesc.XenonSlowModeEnabled) {
+ Capability &= ~(UINT64)(SDHC_CAP_SDR104 | SDHC_CAP_DDR50);
+ }
+
+ Capability &= ~(UINT64)(SDHC_CAP_SLOT_TYPE_MASK);
+ Capability |= SdMmcDesc.SlotType << SDHC_CAP_SLOT_TYPE_OFFSET;
+
+ WriteUnaligned64 (SdMmcHcSlotCapability, Capability);
+
+ //
+ // Override inappropriate base clock frequency from Capabilities Register 1.
+ // Actual clock speed of Xenon controller is 400MHz.
+ //
+ *BaseClkFreq = XENON_MMC_MAX_CLK / 1000 / 1000;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ The entry point for Xenon driver, used to install SdMMcOverrideProtocol
+ on the ImageHandle.
+
+ @param[in] ImageHandle The firmware allocated handle for this driver image.
+ @param[in] SystemTable Pointer to the EFI system table.
+
+ @retval EFI_SUCCESS Driver loaded.
+ @retval other Driver not loaded.
+
+**/
+EFI_STATUS
+EFIAPI
+InitializeXenonDxe (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ mSdMmcOverride = AllocateZeroPool (sizeof (EDKII_SD_MMC_OVERRIDE));
+ if (mSdMmcOverride == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ mSdMmcOverride->Version = EDKII_SD_MMC_OVERRIDE_PROTOCOL_VERSION;
+ mSdMmcOverride->Capability = XenonSdMmcCapability;
+ mSdMmcOverride->NotifyPhase = XenonSdMmcNotifyPhase;
+
+ Status = gBS->InstallProtocolInterface (&ImageHandle,
+ &gEdkiiSdMmcOverrideProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ mSdMmcOverride);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR,
+ "%a: Filed to install SdMmcOverride protocol\n",
+ __FUNCTION__));
+ return Status;
+ }
+
+ mXenonSdMmcOverrideHandle = ImageHandle;
+
+ return Status;
+}
diff --git a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.c b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.c
index 6bbe5bc..0b4949d 100755
--- a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.c
+++ b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.c
@@ -41,7 +41,7 @@ XenonReadVersion (
OUT UINT32 *ControllerVersion
)
{
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SD_MMC_HC_CTRL_VER, TRUE, SDHC_REG_SIZE_2B, ControllerVersion);
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_CTRL_VER, TRUE, SDHC_REG_SIZE_2B, ControllerVersion);
}
// Auto Clock Gating
@@ -54,7 +54,7 @@ XenonSetAcg (
{
UINT32 Var;
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_SYS_OP_CTRL, TRUE, SDHC_REG_SIZE_4B, &Var);
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_SYS_OP_CTRL, TRUE, SDHC_REG_SIZE_4B, &Var);
if (Enable) {
Var &= ~AUTO_CLKGATE_DISABLE_MASK;
@@ -62,7 +62,7 @@ XenonSetAcg (
Var |= AUTO_CLKGATE_DISABLE_MASK;
}
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_SYS_OP_CTRL, FALSE, SDHC_REG_SIZE_4B, &Var);
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_SYS_OP_CTRL, FALSE, SDHC_REG_SIZE_4B, &Var);
}
STATIC
@@ -75,14 +75,17 @@ XenonSetSlot (
{
UINT32 Var;
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_SYS_OP_CTRL, TRUE, SDHC_REG_SIZE_4B, &Var);
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_SYS_OP_CTRL, TRUE, SDHC_REG_SIZE_4B, &Var);
if (Enable) {
Var |= ((0x1 << Slot) << SLOT_ENABLE_SHIFT);
} else {
Var &= ~((0x1 << Slot) << SLOT_ENABLE_SHIFT);
}
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_SYS_OP_CTRL, FALSE, SDHC_REG_SIZE_4B, &Var);
+ // Enable SDCLK off while idle
+ Var |= SDCLK_IDLEOFF_ENABLE_MASK;
+
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_SYS_OP_CTRL, FALSE, SDHC_REG_SIZE_4B, &Var);
}
//
@@ -111,7 +114,6 @@ XenonSetPower (
)
{
UINT8 Pwr = 0;
- UINT32 Ctrl = 0;
// Below statement calls routine to set voltage for SDIO devices in either HIGH (1) or LOW (0) mode
switch (Vcc) {
@@ -141,39 +143,36 @@ XenonSetPower (
}
if (Pwr == 0) {
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SD_MMC_HC_POWER_CTRL, FALSE, SDHC_REG_SIZE_1B, &Pwr);
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_POWER_CTRL, FALSE, SDHC_REG_SIZE_1B, &Pwr);
return;
}
Pwr |= SDHCI_POWER_ON;
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX,SD_MMC_HC_POWER_CTRL, FALSE, SDHC_REG_SIZE_1B, &Pwr);
-
- // Set VCCQ
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_SLOT_eMMC_CTRL, TRUE, SDHC_REG_SIZE_4B, &Ctrl);
- Ctrl |= Vccq;
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_SLOT_eMMC_CTRL, FALSE, SDHC_REG_SIZE_4B, &Ctrl);
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_POWER_CTRL, FALSE, SDHC_REG_SIZE_1B, &Pwr);
}
UINTN
XenonSetClk (
IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN SD_MMC_HC_PRIVATE_DATA *Private,
IN UINT32 Clock
)
{
UINT32 Div;
UINT32 Clk;
UINT32 Retry;
+ UINT32 ControllerVersion;
UINT16 Value = 0;
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SD_MMC_HC_CLOCK_CTRL, FALSE, SDHC_REG_SIZE_2B, &Value);
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_CLOCK_CTRL, FALSE, SDHC_REG_SIZE_2B, &Value);
if (Clock == 0) {
return 0;
}
- if (Private->ControllerVersion >= SDHCI_SPEC_300) {
+ XenonReadVersion (PciIo, &ControllerVersion);
+
+ if (ControllerVersion >= SDHCI_SPEC_300) {
// Version 3.00 Divisors must be a multiple of 2
if (XENON_MMC_MAX_CLK <= Clock) {
Div = 1;
@@ -196,7 +195,7 @@ XenonSetClk (
Clk |= ((Div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) << SDHCI_DIVIDER_HI_SHIFT;
Clk |= SDHCI_CLOCK_INT_EN;
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SD_MMC_HC_CLOCK_CTRL, FALSE, SDHC_REG_SIZE_2B, &Clk);
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_CLOCK_CTRL, FALSE, SDHC_REG_SIZE_2B, &Clk);
//
// Poll for internal controller clock to be stabilised
@@ -205,7 +204,7 @@ XenonSetClk (
Retry = 200;
do {
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SD_MMC_HC_CLOCK_CTRL, TRUE, SDHC_REG_SIZE_2B, &Clk);
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_CLOCK_CTRL, TRUE, SDHC_REG_SIZE_2B, &Clk);
if (Retry == 0) {
DEBUG((DEBUG_ERROR, "SD/MMC: Internal Clock never stabilised\n"));
return -1;
@@ -219,7 +218,7 @@ XenonSetClk (
} while (!(Clk & SDHCI_CLOCK_INT_STABLE));
Clk |= SDHCI_CLOCK_CARD_EN;
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SD_MMC_HC_CLOCK_CTRL, FALSE, SDHC_REG_SIZE_2B, &Clk);
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_CLOCK_CTRL, FALSE, SDHC_REG_SIZE_2B, &Clk);
return 0;
}
@@ -231,54 +230,11 @@ XenonPhyInit (
{
UINT32 Var, Wait, Time;
UINT32 Clock = XENON_MMC_MAX_CLK;
- UINT16 ClkCtrl;
-
- // Need to disable the clock to set EMMC_PHY_TIMING_ADJUST register
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SD_MMC_HC_CLOCK_CTRL, TRUE, SDHC_REG_SIZE_2B, &ClkCtrl);
- ClkCtrl &= ~(SDHCI_CLOCK_CARD_EN | SDHCI_CLOCK_INT_EN);
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SD_MMC_HC_CLOCK_CTRL, FALSE, SDHC_REG_SIZE_2B, &ClkCtrl);
-
- // Enable QSP PHASE SELECT
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_TIMING_ADJUST, TRUE, SDHC_REG_SIZE_4B, &Var);
- Var |= SAMPL_INV_QSP_PHASE_SELECT;
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_TIMING_ADJUST, FALSE, SDHC_REG_SIZE_4B, &Var);
-
- // Enable internal clock
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SD_MMC_HC_CLOCK_CTRL, TRUE, SDHC_REG_SIZE_2B, &ClkCtrl);
- ClkCtrl |= SDHCI_CLOCK_INT_EN;
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SD_MMC_HC_CLOCK_CTRL, FALSE, SDHC_REG_SIZE_2B, &ClkCtrl);
-
- //
- // Poll for host MMC PHY clock init to be stable
- // Wait up to 100us
- //
- Time = 100;
- while (Time--) {
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_TIMING_ADJUST, TRUE, SDHC_REG_SIZE_4B, &Var);
- if (Var & SDHCI_CLOCK_INT_STABLE) {
- break;
- }
-
- // Poll interval for MMC PHY clock to be stable is 1us
- gBS->Stall (1);
- }
- if (Time <= 0) {
- DEBUG((DEBUG_ERROR, "SD/MMC: Failed to enable MMC internal clock in Time\n"));
- return;
- }
-
- // Enable bus clock
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SD_MMC_HC_CLOCK_CTRL, TRUE, SDHC_REG_SIZE_2B, &ClkCtrl);
- ClkCtrl |= SDHCI_CLOCK_CARD_EN;
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SD_MMC_HC_CLOCK_CTRL, FALSE, SDHC_REG_SIZE_2B, &ClkCtrl);
-
- // Delay 200us to wait for the completion of bus clock
- gBS->Stall (200);
// Init PHY
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_TIMING_ADJUST, TRUE, SDHC_REG_SIZE_4B, &Var);
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_TIMING_ADJUST, TRUE, SDHC_REG_SIZE_4B, &Var);
Var |= PHY_INITIALIZAION;
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_TIMING_ADJUST, FALSE, SDHC_REG_SIZE_4B, &Var);
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_TIMING_ADJUST, FALSE, SDHC_REG_SIZE_4B, &Var);
// Add duration of FC_SYNC_RST
Wait = ((Var >> FC_SYNC_RST_DURATION_SHIFT) & FC_SYNC_RST_DURATION_MASK);
@@ -308,7 +264,7 @@ XenonPhyInit (
// Poll for host eMMC PHY init to complete, wait up to 100us
Time = 100;
while (Time--) {
- Var = SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_TIMING_ADJUST, TRUE, SDHC_REG_SIZE_4B, &Var);
+ Var = XenonHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_TIMING_ADJUST, TRUE, SDHC_REG_SIZE_4B, &Var);
Var &= PHY_INITIALIZAION;
if (!Var) {
break;
@@ -326,52 +282,227 @@ XenonPhyInit (
return;
}
+//
+// Enable eMMC PHY HW DLL
+// DLL should be enabled and stable before HS200/SDR104 tuning,
+// and before HS400 data strobe setting.
+//
STATIC
-VOID
+EFI_STATUS
+EmmcPhyEnableDll (
+ IN EFI_PCI_IO_PROTOCOL *PciIo
+ )
+{
+ UINT32 Var;
+ UINT16 SlotState;
+ UINT8 Retry;
+
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_DLL_CONTROL, TRUE, SDHC_REG_SIZE_4B, &Var);
+ if (Var & DLL_ENABLE) {
+ return EFI_SUCCESS;
+ }
+
+ // Enable DLL
+ Var |= (DLL_ENABLE | DLL_FAST_LOCK);
+
+ //
+ // Set Phase as 90 degree, which is most common value.
+ //
+ Var &= ~((DLL_PHASE_MASK << DLL_PHSEL0_SHIFT) |
+ (DLL_PHASE_MASK << DLL_PHSEL1_SHIFT));
+ Var |= ((DLL_PHASE_90_DEGREE << DLL_PHSEL0_SHIFT) |
+ (DLL_PHASE_90_DEGREE << DLL_PHSEL1_SHIFT));
+
+ Var &= ~(DLL_BYPASS_EN | DLL_REFCLK_SEL);
+ Var |= DLL_UPDATE;
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_DLL_CONTROL, FALSE, SDHC_REG_SIZE_4B, &Var);
+
+ // Wait max 32 ms for the DLL to lock
+ Retry = 32;
+ do {
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, XENON_SLOT_EXT_PRESENT_STATE, TRUE, SDHC_REG_SIZE_2B, &SlotState);
+
+ if (Retry == 0) {
+ DEBUG ((DEBUG_ERROR, "SD/MMC: Fail to lock DLL\n"));
+ return EFI_TIMEOUT;
+ }
+
+ gBS->Stall (1000);
+ Retry--;
+
+ } while (!(SlotState & DLL_LOCK_STATE));
+
+ return EFI_SUCCESS;
+}
+
+//
+// Config to eMMC PHY to prepare for tuning.
+// Enable HW DLL and set the TUNING_STEP
+//
+STATIC
+EFI_STATUS
+EmmcPhyConfigTuning (
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 TuningStepDivisor
+ )
+{
+ UINT32 Var, TuningStep;
+ EFI_STATUS Status;
+
+ Status = EmmcPhyEnableDll (PciIo);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ // Achieve TUNING_STEP with HW DLL help
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, XENON_SLOT_DLL_CUR_DLY_VAL, TRUE, SDHC_REG_SIZE_4B, &Var);
+ TuningStep = Var / TuningStepDivisor;
+ if (TuningStep > TUNING_STEP_MASK) {
+ DEBUG ((DEBUG_ERROR, "HS200 TUNING_STEP %d is larger than MAX value\n", TuningStep));
+ TuningStep = TUNING_STEP_MASK;
+ }
+
+ // Set TUNING_STEP for later tuning
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, XENON_SLOT_OP_STATUS_CTRL, TRUE, SDHC_REG_SIZE_4B, &Var);
+ Var &= ~(TUN_CONSECUTIVE_TIMES_MASK << TUN_CONSECUTIVE_TIMES_SHIFT);
+ Var |= (TUN_CONSECUTIVE_TIMES << TUN_CONSECUTIVE_TIMES_SHIFT);
+ Var &= ~(TUNING_STEP_MASK << TUNING_STEP_SHIFT);
+ Var |= (TuningStep << TUNING_STEP_SHIFT);
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, XENON_SLOT_OP_STATUS_CTRL, FALSE, SDHC_REG_SIZE_4B, &Var);
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+BOOLEAN
+XenonPhySlowMode (
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN SD_MMC_BUS_MODE Timing,
+ IN BOOLEAN SlowMode
+ )
+{
+ UINT32 Var = 0;
+
+ // Check if Slow Mode is required in lower speed mode in SDR mode
+ if (((Timing == SdMmcUhsSdr50) ||
+ (Timing == SdMmcUhsSdr25) ||
+ (Timing == SdMmcUhsSdr12) ||
+ (Timing == SdMmcMmcHsDdr) ||
+ (Timing == SdMmcMmcHsSdr) ||
+ (Timing == SdMmcMmcLegacy)) && SlowMode) {
+ Var = QSN_PHASE_SLOW_MODE_BIT;
+ XenonHcOrMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_TIMING_ADJUST, SDHC_REG_SIZE_4B, &Var);
+ return TRUE;
+ }
+
+ Var = ~QSN_PHASE_SLOW_MODE_BIT;
+ XenonHcAndMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_TIMING_ADJUST, SDHC_REG_SIZE_4B, &Var);
+ return FALSE;
+}
+
+EFI_STATUS
XenonSetPhy (
IN EFI_PCI_IO_PROTOCOL *PciIo,
- UINT8 Timing
+ IN BOOLEAN SlowMode,
+ IN UINT8 TuningStepDivisor,
+ IN SD_MMC_BUS_MODE Timing
)
{
UINT32 Var = 0;
+ UINT16 ClkCtrl;
- // Setup pad, set bit[30], bit[28] and bits[26:24]
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_PAD_CONTROL, TRUE, SDHC_REG_SIZE_4B, &Var);
- Var |= (AUTO_RECEN_CTRL | OEN_QSN | FC_QSP_RECEN | FC_CMD_RECEN | FC_DQ_RECEN);
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_PAD_CONTROL, FALSE, SDHC_REG_SIZE_4B, &Var);
+ // Setup pad, bit[28] and bits[26:24]
+ Var = OEN_QSN | FC_QSP_RECEN | FC_CMD_RECEN | FC_DQ_RECEN;
+ // All FC_XX_RECEIVCE should be set as CMOS Type
+ Var |= FC_ALL_CMOS_RECEIVER;
+ XenonHcOrMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_PAD_CONTROL, SDHC_REG_SIZE_4B, &Var);
+
+ // Set CMD and DQ Pull Up
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_PAD_CONTROL1, TRUE, SDHC_REG_SIZE_4B, &Var);
+ Var |= (EMMC5_1_FC_CMD_PU | EMMC5_1_FC_DQ_PU);
+ Var &= ~(EMMC5_1_FC_CMD_PD | EMMC5_1_FC_DQ_PD);
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_PAD_CONTROL1, FALSE, SDHC_REG_SIZE_4B, &Var);
+
+ if (Timing == SdMmcUhsSdr12) {
+ if (SlowMode) {
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_TIMING_ADJUST, TRUE, SDHC_REG_SIZE_4B, &Var);
+ Var |= QSN_PHASE_SLOW_MODE_BIT;
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_TIMING_ADJUST, FALSE, SDHC_REG_SIZE_4B, &Var);
+ }
+
+ goto PhyInit;
+ }
//
// If Timing belongs to high speed, set bit[17] of
// EMMC_PHY_TIMING_ADJUST register
//
- if ((Timing == MMC_TIMING_MMC_HS400) ||
- (Timing == MMC_TIMING_MMC_HS200) ||
- (Timing == MMC_TIMING_UHS_SDR50) ||
- (Timing == MMC_TIMING_UHS_SDR104) ||
- (Timing == MMC_TIMING_UHS_DDR50) ||
- (Timing == MMC_TIMING_UHS_SDR25)) {
-
- SdMmcHcRwMmio(PciIo, SD_BAR_INDEX, EMMC_PHY_TIMING_ADJUST, TRUE, SDHC_REG_SIZE_4B, &Var);
-
- // Set SLOW_MODE for PHY
- Var |= OUTPUT_QSN_PHASE_SELECT | QSN_PHASE_SLOW_MODE_BIT;
- SdMmcHcRwMmio(PciIo, SD_BAR_INDEX, EMMC_PHY_TIMING_ADJUST, FALSE, SDHC_REG_SIZE_4B, &Var);
+ if ((Timing == SdMmcMmcHs400) ||
+ (Timing == SdMmcMmcHs200) ||
+ (Timing == SdMmcUhsDdr50) ||
+ (Timing == SdMmcUhsSdr50) ||
+ (Timing == SdMmcUhsSdr104) ||
+ (Timing == SdMmcUhsSdr25)) {
+ Var = ~OUTPUT_QSN_PHASE_SELECT;
+ XenonHcAndMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_TIMING_ADJUST, SDHC_REG_SIZE_4B, &Var);
}
- SdMmcHcRwMmio(PciIo, SD_BAR_INDEX, EMMC_PHY_FUNC_CONTROL, TRUE, SDHC_REG_SIZE_4B, &Var);
- Var |= (DQ_DDR_MODE_MASK << DQ_DDR_MODE_SHIFT) | CMD_DDR_MODE;
- SdMmcHcRwMmio(PciIo, SD_BAR_INDEX, EMMC_PHY_FUNC_CONTROL, FALSE, SDHC_REG_SIZE_4B, &Var);
+ if (XenonPhySlowMode (PciIo, Timing, SlowMode)) {
+ goto PhyInit;
+ }
+
+ // Set default ZNR and ZPR value
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_PAD_CONTROL2, TRUE, SDHC_REG_SIZE_4B, &Var);
+ Var &= ~((ZNR_MASK << ZNR_SHIFT) | ZPR_MASK);
+ Var |= ((ZNR_DEF_VALUE << ZNR_SHIFT) | ZPR_DEF_VALUE);
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_PAD_CONTROL2, FALSE, SDHC_REG_SIZE_4B, &Var);
+
+ // Need to disable the clock to set EMMC_PHY_FUNC_CONTROL register
+ ClkCtrl = ~SDHCI_CLOCK_CARD_EN;
+ XenonHcAndMmio (PciIo, SD_BAR_INDEX, SDHC_CLOCK_CTRL, SDHC_REG_SIZE_2B, &ClkCtrl);
+
+ if ((Timing == SdMmcMmcHs400) ||
+ (Timing == SdMmcUhsDdr50)) {
+ Var = (DQ_DDR_MODE_MASK << DQ_DDR_MODE_SHIFT) | CMD_DDR_MODE;
+ XenonHcOrMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_FUNC_CONTROL, SDHC_REG_SIZE_4B, &Var);
+ } else {
+ Var = ~((DQ_DDR_MODE_MASK << DQ_DDR_MODE_SHIFT) | CMD_DDR_MODE);
+ XenonHcAndMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_FUNC_CONTROL, SDHC_REG_SIZE_4B, &Var);
+ }
+
+ if (Timing == SdMmcMmcHs400) {
+ Var = ~DQ_ASYNC_MODE;
+ XenonHcAndMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_FUNC_CONTROL, SDHC_REG_SIZE_4B, &Var);
+ } else {
+ Var = DQ_ASYNC_MODE;
+ XenonHcOrMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_FUNC_CONTROL, SDHC_REG_SIZE_4B, &Var);
+ }
- if (Timing == MMC_TIMING_MMC_HS400) {
- SdMmcHcRwMmio(PciIo, SD_BAR_INDEX, EMMC_PHY_FUNC_CONTROL, TRUE, SDHC_REG_SIZE_4B, &Var);
- Var &= ~DQ_ASYNC_MODE;
- SdMmcHcRwMmio(PciIo, SD_BAR_INDEX, EMMC_PHY_FUNC_CONTROL, FALSE, SDHC_REG_SIZE_4B, &Var);
+ // Enable bus clock
+ ClkCtrl = SDHCI_CLOCK_CARD_EN;
+ XenonHcOrMmio (PciIo, SD_BAR_INDEX, SDHC_CLOCK_CTRL, SDHC_REG_SIZE_2B, &ClkCtrl);
+ // Delay 200us to wait for the completion of bus clock
+ gBS->Stall (200);
+
+ if (Timing == SdMmcMmcHs400) {
Var = LOGIC_TIMING_VALUE;
- SdMmcHcRwMmio(PciIo, SD_BAR_INDEX, EMMC_LOGIC_TIMING_ADJUST, FALSE, SDHC_REG_SIZE_4B, &Var);
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_LOGIC_TIMING_ADJUST, FALSE, SDHC_REG_SIZE_4B, &Var);
+ } else {
+ // Disable data strobe
+ Var = ~ENABLE_DATA_STROBE;
+ XenonHcAndMmio (PciIo, SD_BAR_INDEX, XENON_SLOT_EMMC_CTRL, SDHC_REG_SIZE_4B, &Var);
}
+PhyInit:
XenonPhyInit (PciIo);
+
+ if ((Timing == SdMmcMmcHs200) ||
+ (Timing == SdMmcUhsSdr104)) {
+ return EmmcPhyConfigTuning (PciIo, TuningStepDivisor);
+ }
+
+ return EFI_SUCCESS;
}
STATIC
@@ -384,16 +515,16 @@ XenonConfigureInterrupts (
// Clear interrupt status
Var = SDHC_CLR_ALL_IRQ_MASK;
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SD_MMC_HC_NOR_INT_STS, FALSE, SDHC_REG_SIZE_4B, &Var);
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SD_MMC_HC_NOR_INT_STS, FALSE, SDHC_REG_SIZE_4B, &Var);
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_NOR_INT_STS, FALSE, SDHC_REG_SIZE_4B, &Var);
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_NOR_INT_STS, FALSE, SDHC_REG_SIZE_4B, &Var);
// Enable only interrupts served by the SD controller
Var = SDHC_CLR_ALL_IRQ_MASK & ~(NOR_INT_STS_CARD_INS | NOR_INT_STS_CARD_INT);
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SD_MMC_HC_NOR_INT_STS_EN, FALSE, SDHC_REG_SIZE_4B, &Var);
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_NOR_INT_STS_EN, FALSE, SDHC_REG_SIZE_4B, &Var);
// Mask all sdhci interrupt sources
Var = SDHC_CLR_ALL_IRQ_MASK & ~NOR_INT_SIG_EN_CARD_INT;
- SdMmcHcRwMmio (PciIo, SD_BAR_INDEX, SD_MMC_HC_NOR_INT_SIG_EN, FALSE, SDHC_REG_SIZE_4B, &Var);
+ XenonHcRwMmio (PciIo, SD_BAR_INDEX, SDHC_NOR_INT_SIG_EN, FALSE, SDHC_REG_SIZE_4B, &Var);
}
// Enable Parallel Transfer Mode
@@ -407,7 +538,7 @@ XenonSetParallelTransfer (
{
UINT32 Var;
- SdMmcHcRwMmio(PciIo, SD_BAR_INDEX, SDHC_SYS_EXT_OP_CTRL, TRUE, SDHC_REG_SIZE_4B, &Var);
+ XenonHcRwMmio(PciIo, SD_BAR_INDEX, SDHC_SYS_EXT_OP_CTRL, TRUE, SDHC_REG_SIZE_4B, &Var);
if (Enable) {
Var |= (0x1 << Slot);
@@ -415,7 +546,10 @@ XenonSetParallelTransfer (
Var &= ~(0x1 << Slot);
}
- SdMmcHcRwMmio(PciIo, SD_BAR_INDEX, SDHC_SYS_EXT_OP_CTRL, FALSE, SDHC_REG_SIZE_4B, &Var);
+ // Mask command conflict error
+ Var |= MASK_CMD_CONFLICT_ERR;
+
+ XenonHcRwMmio(PciIo, SD_BAR_INDEX, SDHC_SYS_EXT_OP_CTRL, FALSE, SDHC_REG_SIZE_4B, &Var);
}
STATIC
@@ -429,7 +563,7 @@ XenonSetTuning (
UINT32 Var;
// Set the Re-Tuning Request functionality
- SdMmcHcRwMmio(PciIo, SD_BAR_INDEX, SDHC_SLOT_RETUNING_REQ_CTRL, TRUE, SDHC_REG_SIZE_4B, &Var);
+ XenonHcRwMmio(PciIo, SD_BAR_INDEX, SDHC_SLOT_RETUNING_REQ_CTRL, TRUE, SDHC_REG_SIZE_4B, &Var);
if (Enable) {
Var |= RETUNING_COMPATIBLE;
@@ -437,10 +571,10 @@ XenonSetTuning (
Var &= ~RETUNING_COMPATIBLE;
}
- SdMmcHcRwMmio(PciIo, SD_BAR_INDEX, SDHC_SLOT_RETUNING_REQ_CTRL, FALSE, SDHC_REG_SIZE_4B, &Var);
+ XenonHcRwMmio(PciIo, SD_BAR_INDEX, SDHC_SLOT_RETUNING_REQ_CTRL, FALSE, SDHC_REG_SIZE_4B, &Var);
// Set the Re-tuning Event Signal Enable
- SdMmcHcRwMmio(PciIo, SD_BAR_INDEX, SDHCI_SIGNAL_ENABLE, TRUE, SDHC_REG_SIZE_4B, &Var);
+ XenonHcRwMmio(PciIo, SD_BAR_INDEX, SDHCI_SIGNAL_ENABLE, TRUE, SDHC_REG_SIZE_4B, &Var);
if (Enable) {
Var |= SDHCI_RETUNE_EVT_INTSIG;
@@ -448,12 +582,12 @@ XenonSetTuning (
Var &= ~SDHCI_RETUNE_EVT_INTSIG;
}
- SdMmcHcRwMmio(PciIo, SD_BAR_INDEX, SDHCI_SIGNAL_ENABLE, FALSE, SDHC_REG_SIZE_4B, &Var);
+ XenonHcRwMmio(PciIo, SD_BAR_INDEX, SDHCI_SIGNAL_ENABLE, FALSE, SDHC_REG_SIZE_4B, &Var);
}
VOID
XenonReset (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINT8 Slot,
IN UINT8 Mask
)
@@ -463,19 +597,19 @@ XenonReset (
SwReset = Mask;
- SdMmcHcRwMmio (
- Private->PciIo,
+ XenonHcRwMmio (
+ PciIo,
Slot,
- SD_MMC_HC_SW_RST,
+ SDHC_SW_RST,
FALSE,
sizeof (SwReset),
&SwReset
);
- SdMmcHcRwMmio (
- Private->PciIo,
+ XenonHcRwMmio (
+ PciIo,
Slot,
- SD_MMC_HC_SW_RST,
+ SDHC_SW_RST,
TRUE,
sizeof (SwReset),
&SwReset
@@ -491,10 +625,10 @@ XenonReset (
// Poll interval for SwReset is 100us according to SDHCI spec
gBS-> Stall (100);
- SdMmcHcRwMmio (
- Private->PciIo,
+ XenonHcRwMmio (
+ PciIo,
Slot,
- SD_MMC_HC_SW_RST,
+ SDHC_SW_RST,
TRUE,
sizeof (SwReset),
&SwReset
@@ -505,7 +639,6 @@ XenonReset (
STATIC
VOID
XenonTransferPio (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
IN UINT8 Slot,
IN OUT VOID *Buffer,
IN UINT16 BlockSize,
@@ -532,7 +665,7 @@ XenonTransferPio (
EFI_STATUS
XenonTransferData (
- IN SD_MMC_HC_PRIVATE_DATA *Private,
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINT8 Slot,
IN OUT VOID *Buffer,
IN UINT32 DataLen,
@@ -552,10 +685,10 @@ XenonTransferData (
Mask = PRESENT_STATE_BUFFER_RD_EN | PRESENT_STATE_BUFFER_WR_EN;
do {
- SdMmcHcRwMmio (
- Private->PciIo,
+ XenonHcRwMmio (
+ PciIo,
Slot,
- SD_MMC_HC_NOR_INT_STS,
+ SDHC_NOR_INT_STS,
TRUE,
sizeof (IntStatus),
&IntStatus
@@ -567,10 +700,10 @@ XenonTransferData (
}
if (IntStatus & Rdy) {
- SdMmcHcRwMmio (
- Private->PciIo,
+ XenonHcRwMmio (
+ PciIo,
Slot,
- SD_MMC_HC_PRESENT_STATE,
+ SDHC_PRESENT_STATE,
TRUE,
sizeof (PresentState),
&PresentState
@@ -580,16 +713,16 @@ XenonTransferData (
continue;
}
- SdMmcHcRwMmio (
- Private->PciIo,
+ XenonHcRwMmio (
+ PciIo,
Slot,
- SD_MMC_HC_NOR_INT_STS,
+ SDHC_NOR_INT_STS,
FALSE,
sizeof (Rdy),
&Rdy
);
- XenonTransferPio (Private, Slot, Buffer, BlockSize, Read);
+ XenonTransferPio (Slot, Buffer, BlockSize, Read);
Buffer += BlockSize;
if (++Block >= Blocks) {
@@ -612,13 +745,13 @@ XenonTransferData (
EFI_STATUS
XenonInit (
- IN SD_MMC_HC_PRIVATE_DATA *Private
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN BOOLEAN Support1v8,
+ IN BOOLEAN SlowMode,
+ IN UINT8 TuningStepDivisor
)
{
- EFI_PCI_IO_PROTOCOL *PciIo = Private->PciIo;
-
- // Read XENON version
- XenonReadVersion (PciIo, &Private->ControllerVersion);
+ EFI_STATUS Status;
// Disable auto clock generator
XenonSetAcg (PciIo, FALSE);
@@ -626,11 +759,11 @@ XenonInit (
// XENON has only one port
XenonSetSlot (PciIo, XENON_MMC_SLOT_ID, TRUE);
- XenonSetPower (PciIo, MMC_VDD_165_195, eMMC_VCCQ_1_8V, XENON_MMC_MODE_SD_SDIO);
-
- // Set MAX_CLOCK for configuring PHY
- XenonSetClk (PciIo, Private, XENON_MMC_MAX_CLK);
- XenonSetPhy (PciIo, MMC_TIMING_UHS_SDR50);
+ if (Support1v8) {
+ XenonSetPower (PciIo, MMC_VDD_165_195, eMMC_VCCQ_1_8V, XENON_MMC_MODE_SD_SDIO);
+ } else {
+ XenonSetPower (PciIo, MMC_VDD_32_33, eMMC_VCCQ_3_3V, XENON_MMC_MODE_SD_SDIO);
+ }
XenonConfigureInterrupts (PciIo);
@@ -641,9 +774,12 @@ XenonInit (
// Enable auto clock generator
XenonSetAcg (PciIo, TRUE);
- // Set proper clock for PHY configuration
- XenonSetClk (PciIo, Private, XENON_MMC_BASE_CLK);
- XenonPhyInit (PciIo);
+ // Set lowest clock and the PHY for the initialization phase
+ XenonSetClk (PciIo, XENON_MMC_BASE_CLK);
+ Status = XenonSetPhy (PciIo, SlowMode, TuningStepDivisor, SdMmcUhsSdr12);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
return EFI_SUCCESS;
}
diff --git a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.uni b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.uni
deleted file mode 100644
index 57f9fa7..0000000
--- a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.uni
+++ /dev/null
@@ -1,23 +0,0 @@
-// /** @file
-// SdMmcPciHcDxe driver is used to manage those host controllers which comply with SD
-// Host Controller Simplified Specifiction version 3.0.
-//
-// It will produce EFI_SD_MMC_PASS_THRU_PROTOCOL to allow sending SD/MMC/eMMC cmds
-// to specified devices from upper layer.
-//
-// Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-// **/
-
-
-#string STR_MODULE_ABSTRACT #language en-US "SD/MMC Pci Host Controller driver to manage SD/MMC host controllers"
-
-#string STR_MODULE_DESCRIPTION #language en-US "This driver follows the UEFI driver model and produces SD/MMC Pass Thru protocol for upper layer bus driver."
-
diff --git a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxeExtra.uni b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxeExtra.uni
deleted file mode 100644
index c7aedb4..0000000
--- a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxeExtra.uni
+++ /dev/null
@@ -1,19 +0,0 @@
-// /** @file
-// SdMmcPciHcDxe Localized Strings and Content
-//
-// Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-// **/
-
-#string STR_PROPERTIES_MODULE_NAME
-#language en-US
-"SD/MMC Pci Host Controller Driver"
-
-
--
2.7.4
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [platforms: PATCH v4 1/7] Silicon/SynQuacer/PlatformDxe: adjust to updated SdMmcOverride
2018-11-09 23:01 ` [platforms: PATCH v4 1/7] Silicon/SynQuacer/PlatformDxe: adjust to updated SdMmcOverride Marcin Wojtas
@ 2018-11-12 10:24 ` Ard Biesheuvel
0 siblings, 0 replies; 14+ messages in thread
From: Ard Biesheuvel @ 2018-11-12 10:24 UTC (permalink / raw)
To: Marcin Wojtas
Cc: edk2-devel@lists.01.org, Leif Lindholm, Wu, Hao A, Nadav Haklai,
Jan Dąbroś, Grzegorz Jaszczyk, Kostya Porotchkin,
Tomasz Michalec
On Sat, 10 Nov 2018 at 00:02, Marcin Wojtas <mw@semihalf.com> wrote:
>
> The newest changes in the SdMmcOverride protocol added additional
> arguments to the NotifyPhase and Capability routines. Update
> according places in the Synquacer Emmc driver.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Emmc.c | 9 +++++++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Emmc.c b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Emmc.c
> index e0987c9..47f5ccc 100644
> --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Emmc.c
> +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Emmc.c
> @@ -72,6 +72,8 @@ STATIC VOID *mEventRegistration;
> @param[in] ControllerHandle The EFI_HANDLE of the controller.
> @param[in] Slot The 0 based slot index.
> @param[in,out] SdMmcHcSlotCapability The SDHCI capability structure.
> + @param[in,out] BaseClkFreq The base clock frequency value that
> + optionally can be updated.
>
> @retval EFI_SUCCESS The override function completed successfully.
> @retval EFI_NOT_FOUND The specified controller or slot does not exist.
> @@ -84,7 +86,8 @@ EFIAPI
> SynQuacerSdMmcCapability (
> IN EFI_HANDLE ControllerHandle,
> IN UINT8 Slot,
> - IN OUT VOID *SdMmcHcSlotCapability
> + IN OUT VOID *SdMmcHcSlotCapability,
> + IN OUT UINT32 *BaseClkFreq
> )
> {
> UINT64 Capability;
> @@ -117,6 +120,7 @@ SynQuacerSdMmcCapability (
> @param[in] PhaseType The type of operation and whether the
> hook is invoked right before (pre) or
> right after (post)
> + @param[in,out] PhaseData The pointer to a phase-specific data.
>
> @retval EFI_SUCCESS The override function completed successfully.
> @retval EFI_NOT_FOUND The specified controller or slot does not exist.
> @@ -129,7 +133,8 @@ EFIAPI
> SynQuacerSdMmcNotifyPhase (
> IN EFI_HANDLE ControllerHandle,
> IN UINT8 Slot,
> - IN EDKII_SD_MMC_PHASE_TYPE PhaseType
> + IN EDKII_SD_MMC_PHASE_TYPE PhaseType,
> + IN OUT VOID *PhaseData
> )
> {
> if (ControllerHandle != mSdMmcControllerHandle) {
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [platforms: PATCH v4 2/7] Marvell/Library: ArmadaBoardDescLib: Extend SDMMC information
2018-11-09 23:01 ` [platforms: PATCH v4 2/7] Marvell/Library: ArmadaBoardDescLib: Extend SDMMC information Marcin Wojtas
@ 2018-11-12 10:24 ` Ard Biesheuvel
0 siblings, 0 replies; 14+ messages in thread
From: Ard Biesheuvel @ 2018-11-12 10:24 UTC (permalink / raw)
To: Marcin Wojtas
Cc: edk2-devel@lists.01.org, Leif Lindholm, Wu, Hao A, Nadav Haklai,
Jan Dąbroś, Grzegorz Jaszczyk, Kostya Porotchkin,
Tomasz Michalec
On Sat, 10 Nov 2018 at 00:02, Marcin Wojtas <mw@semihalf.com> wrote:
>
> From: Tomasz Michalec <tm@semihalf.com>
>
> Added fields specific for Xenon host controller and declaration
> of ArmadaBoardDescSdMmcGet function.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 22 +++++++++++++++++++-
> 1 file changed, 21 insertions(+), 1 deletion(-)
>
> diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> index ee8e06e..8e29a68 100644
> --- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> +++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> @@ -55,9 +55,21 @@ typedef struct {
> //
> // SDMMC devices per-board description
> //
> +typedef enum {
> + RemovableSlot,
> + EmbeddedSlot,
> + SharedBusSlot,
> + UnknownSlot
> +} MV_SDMMC_SLOT_TYPE;
> +
> typedef struct {
> MV_SOC_SDMMC_DESC *SoC;
> - UINTN SdMmcDevCount;
> + UINTN SdMmcDevCount;
> + BOOLEAN Xenon1v8Enabled;
> + BOOLEAN Xenon8BitBusEnabled;
> + BOOLEAN XenonSlowModeEnabled;
> + UINT8 XenonTuningStepDivisor;
> + MV_SDMMC_SLOT_TYPE SlotType;
> } MV_BOARD_SDMMC_DESC;
>
> //
> @@ -84,4 +96,12 @@ typedef struct {
> UINTN UtmiDevCount;
> UINTN UtmiPortType;
> } MV_BOARD_UTMI_DESC;
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaBoardDescSdMmcGet (
> + IN OUT UINTN *SdMmcDevCount,
> + IN OUT MV_BOARD_SDMMC_DESC **SdMmcDesc
> + );
> +
> #endif /* __ARMADA_SOC_DESC_LIB_H__ */
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [platforms: PATCH v4 3/7] SolidRun/Armada80x0McBin: Introduce board description library
2018-11-09 23:01 ` [platforms: PATCH v4 3/7] SolidRun/Armada80x0McBin: Introduce board description library Marcin Wojtas
@ 2018-11-12 10:26 ` Ard Biesheuvel
0 siblings, 0 replies; 14+ messages in thread
From: Ard Biesheuvel @ 2018-11-12 10:26 UTC (permalink / raw)
To: Marcin Wojtas
Cc: edk2-devel@lists.01.org, Leif Lindholm, Wu, Hao A, Nadav Haklai,
Jan Dąbroś, Grzegorz Jaszczyk, Kostya Porotchkin,
Tomasz Michalec
On Sat, 10 Nov 2018 at 00:02, Marcin Wojtas <mw@semihalf.com> wrote:
>
> From: Tomasz Michalec <tm@semihalf.com>
>
> This patch implements ArmadaBoarDescLib library for
> Armada80x0McBin comunity board and add to it ArmadaBoardDescSdMmcGet
> function with description of connected Xenon host controllers.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
> Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc | 3 +
> Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.inf | 34 ++++++++++
> Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c | 66 ++++++++++++++++++++
> 3 files changed, 103 insertions(+)
> create mode 100644 Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.inf
> create mode 100644 Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c
>
> diff --git a/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc
> index 52e2b9b..077224d 100644
> --- a/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc
> +++ b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc
> @@ -55,6 +55,9 @@
> [Components.AARCH64]
> Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin.inf
>
> +[LibraryClasses.common]
> + ArmadaBoardDescLib|Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.inf
> +
> ################################################################################
> #
> # Pcd Section - list of all EDK II PCD Entries defined by this Platform
> diff --git a/Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.inf b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.inf
> new file mode 100644
> index 0000000..63a4f66
> --- /dev/null
> +++ b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.inf
> @@ -0,0 +1,34 @@
> +## @file
> +#
> +# Copyright (C) 2018, Marvell International Ltd. and its affiliates<BR>
> +#
> +# This program and the accompanying materials are licensed and made available
> +# under the terms and conditions of the BSD License which accompanies this
> +# distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> +# IMPLIED.
> +#
> +#
> +##
> +
> +[Defines]
> + INF_VERSION = 0x0001001A
> + BASE_NAME = ArmadaMcBinBoardDescLib
> + FILE_GUID = 8208558f-5f33-46e2-b5c5-43354384389e
> + MODULE_TYPE = BASE
> + VERSION_STRING = 1.0
> + LIBRARY_CLASS = ArmadaBoardDescLib
> +
> +[Sources]
> + Armada80x0McBinBoardDescLib.c
> +
> +[Packages]
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> + Silicon/Marvell/Marvell.dec
> +
> +[LibraryClasses]
> + DebugLib
> + IoLib
> diff --git a/Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c
> new file mode 100644
> index 0000000..9e38ce0
> --- /dev/null
> +++ b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c
> @@ -0,0 +1,66 @@
> +/**
> +*
> +* Copyright (C) 2018, Marvell International Ltd. and its affiliates.
> +*
> +* This program and the accompanying materials are licensed and made available
> +* under the terms and conditions of the BSD License which accompanies this
> +* distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include <Uefi.h>
> +
> +#include <Library/ArmadaBoardDescLib.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/IoLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +
> +//
> +// Order of devices in SdMmcDescTemplate has to be in par with ArmadaSoCDescLib
> +//
> +STATIC
> +MV_BOARD_SDMMC_DESC mMcBinSdMmcDescTemplate[] = {
> + { /* eMMC 0xF06E0000 */
> + 0, /* SOC will be filled by MvBoardDescDxe */
> + 0, /* SdMmcDevCount will be filled by MvBoardDescDxe */
> + FALSE, /* Xenon1v8Enabled */
> + TRUE, /* Xenon8BitBusEnabled */
> + TRUE, /* XenonSlowModeEnabled */
> + 0x40, /* XenonTuningStepDivisor */
> + EmbeddedSlot /* SlotType */
> + },
> + { /* SD/MMC 0xF2780000 */
> + 0, /* SOC will be filled by MvBoardDescDxe */
> + 0, /* SdMmcDevCount will be filled by MvBoardDescDxe */
> + FALSE, /* Xenon1v8Enabled */
> + FALSE, /* Xenon8BitBusEnabled */
> + FALSE, /* XenonSlowModeEnabled */
> + 0x19, /* XenonTuningStepDivisor */
> + EmbeddedSlot /* SlotType */
> + }
> +};
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaBoardDescSdMmcGet (
> + IN OUT UINTN *SdMmcDevCount,
> + IN OUT MV_BOARD_SDMMC_DESC **SdMmcDesc
There are OUT not IN OUT
> + )
> +{
> + *SdMmcDevCount = ARRAY_SIZE (mMcBinSdMmcDescTemplate);
> +
> + *SdMmcDesc = AllocateCopyPool (sizeof (mMcBinSdMmcDescTemplate),
> + &mMcBinSdMmcDescTemplate);
> + if (*SdMmcDesc == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> + return EFI_OUT_OF_RESOURCES;
Please do the checks first, and only assign the outputs when it is
guaranteed that you will return succes.
With those changes:
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> + }
> +
> + return EFI_SUCCESS;
> +}
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [platforms: PATCH v4 4/7] Marvell/Armada70x0Db: Introduce board description library
[not found] ` <1541804508-27499-5-git-send-email-mw@semihalf.com>
@ 2018-11-12 10:27 ` Ard Biesheuvel
0 siblings, 0 replies; 14+ messages in thread
From: Ard Biesheuvel @ 2018-11-12 10:27 UTC (permalink / raw)
To: Marcin Wojtas
Cc: edk2-devel@lists.01.org, Leif Lindholm, Wu, Hao A, Nadav Haklai,
Jan Dąbroś, Grzegorz Jaszczyk, Kostya Porotchkin,
Tomasz Michalec
On Sat, 10 Nov 2018 at 00:02, Marcin Wojtas <mw@semihalf.com> wrote:
>
> From: Tomasz Michalec <tm@semihalf.com>
>
> This patch implements ArmadaBoarDescLib library for
> Armada7040 Development Board and add to it ArmadaBoardDescSdMmcGet
> function with description of connected Xenon host controllers.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
> Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc | 3 +
> Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.inf | 34 ++++++++++
> Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.c | 66 ++++++++++++++++++++
> 3 files changed, 103 insertions(+)
> create mode 100644 Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.inf
> create mode 100644 Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.c
>
> diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
> index e0bf447..a935f36 100644
> --- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
> +++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
> @@ -54,6 +54,9 @@
> [Components.AARCH64]
> Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db.inf
>
> +[LibraryClasses.common]
> + ArmadaBoardDescLib|Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.inf
> +
> ################################################################################
> #
> # Pcd Section - list of all EDK II PCD Entries defined by this Platform
> diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.inf b/Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.inf
> new file mode 100644
> index 0000000..b26f55b
> --- /dev/null
> +++ b/Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.inf
> @@ -0,0 +1,34 @@
> +## @file
> +#
> +# Copyright (C) 2018, Marvell International Ltd. and its affiliates<BR>
> +#
> +# This program and the accompanying materials are licensed and made available
> +# under the terms and conditions of the BSD License which accompanies this
> +# distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> +# IMPLIED.
> +#
> +#
> +##
> +
> +[Defines]
> + INF_VERSION = 0x0001001A
> + BASE_NAME = Armada70x0DbBoardDescLib
> + FILE_GUID = 3164c8d9-19d4-4ad6-8196-cea094b1ddf1
> + MODULE_TYPE = BASE
> + VERSION_STRING = 1.0
> + LIBRARY_CLASS = ArmadaBoardDescLib
> +
> +[Sources]
> + Armada70x0DbBoardDescLib.c
> +
> +[Packages]
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> + Silicon/Marvell/Marvell.dec
> +
> +[LibraryClasses]
> + DebugLib
> + IoLib
> diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.c b/Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.c
> new file mode 100644
> index 0000000..dd5e3a0
> --- /dev/null
> +++ b/Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.c
> @@ -0,0 +1,66 @@
> +/**
> +*
> +* Copyright (C) 2018, Marvell International Ltd. and its affiliates.
> +*
> +* This program and the accompanying materials are licensed and made available
> +* under the terms and conditions of the BSD License which accompanies this
> +* distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include <Uefi.h>
> +
> +#include <Library/ArmadaBoardDescLib.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/IoLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +
> +//
> +// Order of devices in SdMmcDescTemplate has to be in par with ArmadaSoCDescLib
> +//
> +STATIC
> +MV_BOARD_SDMMC_DESC mSdMmcDescTemplate[] = {
> + { /* eMMC 0xF06E0000 */
> + 0, /* SOC will be filled by MvBoardDescDxe */
> + 0, /* SdMmcDevCount will be filled by MvBoardDescDxe */
> + FALSE, /* Xenon1v8Enabled */
> + FALSE, /* Xenon8BitBusEnabled */
> + TRUE, /* XenonSlowModeEnabled */
> + 0x40, /* XenonTuningStepDivisor */
> + EmbeddedSlot /* SlotType */
> + },
> + { /* SD/MMC 0xF2780000 */
> + 0, /* SOC will be filled by MvBoardDescDxe */
> + 0, /* SdMmcDevCount will be filled by MvBoardDescDxe */
> + FALSE, /* Xenon1v8Enabled */
> + FALSE, /* Xenon8BitBusEnabled */
> + FALSE, /* XenonSlowModeEnabled */
> + 0x19, /* XenonTuningStepDivisor */
> + EmbeddedSlot /* SlotType */
> + }
> +};
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaBoardDescSdMmcGet (
> + IN OUT UINTN *SdMmcDevCount,
> + IN OUT MV_BOARD_SDMMC_DESC **SdMmcDesc
> + )
> +{
> + *SdMmcDevCount = ARRAY_SIZE (mSdMmcDescTemplate);
> +
> + *SdMmcDesc = AllocateCopyPool (sizeof (mSdMmcDescTemplate),
> + &mSdMmcDescTemplate);
> + if (*SdMmcDesc == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
Same as previous patch: change 'IN OUT' -> 'OUT' and move output param
assignments after the error return for:
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> + return EFI_SUCCESS;
> +}
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [platforms: PATCH v4 5/7] Marvell/Armada80x0Db: Introduce board description library
2018-11-09 23:01 ` [platforms: PATCH v4 5/7] Marvell/Armada80x0Db: " Marcin Wojtas
@ 2018-11-12 10:28 ` Ard Biesheuvel
0 siblings, 0 replies; 14+ messages in thread
From: Ard Biesheuvel @ 2018-11-12 10:28 UTC (permalink / raw)
To: Marcin Wojtas
Cc: edk2-devel@lists.01.org, Leif Lindholm, Wu, Hao A, Nadav Haklai,
Jan Dąbroś, Grzegorz Jaszczyk, Kostya Porotchkin,
Tomasz Michalec
On Sat, 10 Nov 2018 at 00:02, Marcin Wojtas <mw@semihalf.com> wrote:
>
> From: Tomasz Michalec <tm@semihalf.com>
>
> This patch implements ArmadaBoarDescLib library for
> Armada8040 Development Board and add to it ArmadaBoardDescSdMmcGet
> function with description of connected Xenon host controllers.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
> Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc | 3 +
> Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.inf | 34 ++++++++++
> Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c | 66 ++++++++++++++++++++
> 3 files changed, 103 insertions(+)
> create mode 100644 Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.inf
> create mode 100644 Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c
>
> diff --git a/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc b/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
> index 92e2dc8..42f7bd3 100644
> --- a/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
> +++ b/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
> @@ -54,6 +54,9 @@
> [Components.AARCH64]
> Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db.inf
>
> +[LibraryClasses.common]
> + ArmadaBoardDescLib|Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.inf
> +
> ################################################################################
> #
> # Pcd Section - list of all EDK II PCD Entries defined by this Platform
> diff --git a/Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.inf b/Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.inf
> new file mode 100644
> index 0000000..2d39d96
> --- /dev/null
> +++ b/Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.inf
> @@ -0,0 +1,34 @@
> +## @file
> +#
> +# Copyright (C) 2018, Marvell International Ltd. and its affiliates<BR>
> +#
> +# This program and the accompanying materials are licensed and made available
> +# under the terms and conditions of the BSD License which accompanies this
> +# distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> +# IMPLIED.
> +#
> +#
> +##
> +
> +[Defines]
> + INF_VERSION = 0x0001001A
> + BASE_NAME = Armada80x0DbBoardDescLib
> + FILE_GUID = fee9e874-1481-4b4f-9882-966bd0d1310f
> + MODULE_TYPE = BASE
> + VERSION_STRING = 1.0
> + LIBRARY_CLASS = ArmadaBoardDescLib
> +
> +[Sources]
> + Armada80x0DbBoardDescLib.c
> +
> +[Packages]
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> + Silicon/Marvell/Marvell.dec
> +
> +[LibraryClasses]
> + DebugLib
> + IoLib
> diff --git a/Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c b/Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c
> new file mode 100644
> index 0000000..00d696d
> --- /dev/null
> +++ b/Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c
> @@ -0,0 +1,66 @@
> +/**
> +*
> +* Copyright (C) 2018, Marvell International Ltd. and its affiliates.
> +*
> +* This program and the accompanying materials are licensed and made available
> +* under the terms and conditions of the BSD License which accompanies this
> +* distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include <Uefi.h>
> +
> +#include <Library/ArmadaBoardDescLib.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/IoLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +
> +//
> +// Order of devices in SdMmcDescTemplate has to be in par with ArmadaSoCDescLib
> +//
> +STATIC
> +MV_BOARD_SDMMC_DESC mSdMmcDescTemplate[] = {
> + { /* eMMC 0xF06E0000 */
> + 0, /* SOC will be filled by MvBoardDescDxe */
> + 0, /* SdMmcDevCount will be filled by MvBoardDescDxe */
> + TRUE, /* Xenon1v8Enabled */
> + TRUE, /* Xenon8BitBusEnabled */
> + TRUE, /* XenonSlowModeEnabled */
> + 0x40, /* XenonTuningStepDivisor */
> + EmbeddedSlot /* SlotType */
> + },
> + { /* SD/MMC 0xF2780000 */
> + 0, /* SOC will be filled by MvBoardDescDxe */
> + 0, /* SdMmcDevCount will be filled by MvBoardDescDxe */
> + FALSE, /* Xenon1v8Enabled */
> + FALSE, /* Xenon8BitBusEnabled */
> + FALSE, /* XenonSlowModeEnabled */
> + 0x19, /* XenonTuningStepDivisor */
> + EmbeddedSlot /* SlotType */
> + }
> +};
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaBoardDescSdMmcGet (
> + IN OUT UINTN *SdMmcDevCount,
> + IN OUT MV_BOARD_SDMMC_DESC **SdMmcDesc
> + )
> +{
> + *SdMmcDevCount = ARRAY_SIZE (mSdMmcDescTemplate);
> +
> + *SdMmcDesc = AllocateCopyPool (sizeof (mSdMmcDescTemplate),
> + &mSdMmcDescTemplate);
> + if (*SdMmcDesc == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> + return EFI_OUT_OF_RESOURCES;
> + }
Same as previous 2 patches.
> +
> + return EFI_SUCCESS;
> +}
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [platforms: PATCH v4 6/7] Marvell/Drivers: MvBoardDesc: Extend information for SdMmc
2018-11-09 23:01 ` [platforms: PATCH v4 6/7] Marvell/Drivers: MvBoardDesc: Extend information for SdMmc Marcin Wojtas
@ 2018-11-12 10:29 ` Ard Biesheuvel
0 siblings, 0 replies; 14+ messages in thread
From: Ard Biesheuvel @ 2018-11-12 10:29 UTC (permalink / raw)
To: Marcin Wojtas
Cc: edk2-devel@lists.01.org, Leif Lindholm, Wu, Hao A, Nadav Haklai,
Jan Dąbroś, Grzegorz Jaszczyk, Kostya Porotchkin,
Tomasz Michalec
On Sat, 10 Nov 2018 at 00:02, Marcin Wojtas <mw@semihalf.com> wrote:
>
> From: Tomasz Michalec <tm@semihalf.com>
>
> Extend MvBoardDescSdMmcGet function to fill MV_BOARD_SDMMC_DESC
> with Xenon specific info obtained from ArmadaBoardDescLib.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 1 +
> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 24 +++++++++++++-------
> 2 files changed, 17 insertions(+), 8 deletions(-)
>
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> index 41f72d6..0b93948 100644
> --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> @@ -47,6 +47,7 @@
> Silicon/Marvell/Marvell.dec
>
> [LibraryClasses]
> + ArmadaBoardDescLib
> ArmadaSoCDescLib
> DebugLib
> MemoryAllocationLib
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> index 39dc06c..f71bfc4 100644
> --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> @@ -270,6 +270,7 @@ MvBoardDescSdMmcGet (
> {
> UINT8 *SdMmcDeviceEnabled;
> UINTN SdMmcCount, SdMmcDeviceTableSize, SdMmcIndex, Index;
> + UINTN SdMmcDevCount;
> MV_BOARD_SDMMC_DESC *BoardDesc;
> MV_SOC_SDMMC_DESC *SoCDesc;
> EFI_STATUS Status;
> @@ -280,6 +281,13 @@ MvBoardDescSdMmcGet (
> return Status;
> }
>
> + /* Get per-board configuration of the controllers */
> + Status = ArmadaBoardDescSdMmcGet (&SdMmcDevCount, &BoardDesc);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "%a: ArmadaBoardDescSdMmcGet filed\n", __FUNCTION__));
> + return Status;
> + }
> +
> /*
> * Obtain table with enabled SDMMC controllers
> * which is represented as an array of UINT8 values
> @@ -294,18 +302,12 @@ MvBoardDescSdMmcGet (
> SdMmcDeviceTableSize = PcdGetSize (PcdPciESdhci);
>
> /* Check if PCD with SDMMC controllers is correctly defined */
> - if (SdMmcDeviceTableSize > SdMmcCount) {
> + if ((SdMmcDeviceTableSize > SdMmcCount) ||
> + (SdMmcDeviceTableSize < SdMmcDevCount)) {
> DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciESdhci format\n", __FUNCTION__));
> return EFI_INVALID_PARAMETER;
> }
>
> - /* Allocate and fill board description */
> - BoardDesc = AllocateZeroPool (SdMmcDeviceTableSize * sizeof (MV_BOARD_SDMMC_DESC));
> - if (BoardDesc == NULL) {
> - DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> - return EFI_OUT_OF_RESOURCES;
> - }
> -
> SdMmcIndex = 0;
> for (Index = 0; Index < SdMmcDeviceTableSize; Index++) {
> if (!SdMmcDeviceEnabled[Index]) {
> @@ -313,6 +315,12 @@ MvBoardDescSdMmcGet (
> continue;
> }
>
> + if (SdMmcIndex >= SdMmcDevCount) {
> + DEBUG ((DEBUG_ERROR,
> + "%a: More enabled devices than returned by ArmadaBoardDescSdMmcGet\n",
> + __FUNCTION__));
> + return EFI_INVALID_PARAMETER;
> + }
> BoardDesc[SdMmcIndex].SoC = &SoCDesc[Index];
> SdMmcIndex++;
> }
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [platforms: PATCH v4 7/7] Marvell/Drivers: XenonDxe: Switch to use generic SdMmcPciHcDxe
2018-11-09 23:01 ` [platforms: PATCH v4 7/7] Marvell/Drivers: XenonDxe: Switch to use generic SdMmcPciHcDxe Marcin Wojtas
@ 2018-11-12 10:36 ` Ard Biesheuvel
0 siblings, 0 replies; 14+ messages in thread
From: Ard Biesheuvel @ 2018-11-12 10:36 UTC (permalink / raw)
To: Marcin Wojtas
Cc: edk2-devel@lists.01.org, Leif Lindholm, Wu, Hao A, Nadav Haklai,
Jan Dąbroś, Grzegorz Jaszczyk, Kostya Porotchkin,
Tomasz Michalec
On Sat, 10 Nov 2018 at 00:02, Marcin Wojtas <mw@semihalf.com> wrote:
>
> From: Tomasz Michalec <tm@semihalf.com>
>
> XenonDxe was copy of SdMmcPciHcDxe from edk2/MdeModulePkg.
>
> Now it implements SdMmcOverride protocol which allows
> to add quirks to the generic SdMmcPciHcDxe.
>
> Platforms that were using XenonDxe/SdMmcPciHcDxe have fixed *.fdf
> and *.dsc.inc files to use new implementation of XenonDxe.
>
> In the new version of the driver apart from using SdMmcOverride
> protocol, this patch utilizes newly added controllers'
> description in MvBoardDesc protocol, as well as improved
> PHY configuration sequence.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Could you please split this up in 2 patches: one that removes the old
files and one that adds back the new ones? I want to review the new
code, but the size of the patch makes Chrome hang in the Gmail compose
window.
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2018-11-12 10:36 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-11-09 23:01 [platforms: PATCH v4 0/7] Armada7k8k Xenon driver rework Marcin Wojtas
2018-11-09 23:01 ` [platforms: PATCH v4 1/7] Silicon/SynQuacer/PlatformDxe: adjust to updated SdMmcOverride Marcin Wojtas
2018-11-12 10:24 ` Ard Biesheuvel
2018-11-09 23:01 ` [platforms: PATCH v4 2/7] Marvell/Library: ArmadaBoardDescLib: Extend SDMMC information Marcin Wojtas
2018-11-12 10:24 ` Ard Biesheuvel
2018-11-09 23:01 ` [platforms: PATCH v4 3/7] SolidRun/Armada80x0McBin: Introduce board description library Marcin Wojtas
2018-11-12 10:26 ` Ard Biesheuvel
2018-11-09 23:01 ` [platforms: PATCH v4 5/7] Marvell/Armada80x0Db: " Marcin Wojtas
2018-11-12 10:28 ` Ard Biesheuvel
2018-11-09 23:01 ` [platforms: PATCH v4 6/7] Marvell/Drivers: MvBoardDesc: Extend information for SdMmc Marcin Wojtas
2018-11-12 10:29 ` Ard Biesheuvel
2018-11-09 23:01 ` [platforms: PATCH v4 7/7] Marvell/Drivers: XenonDxe: Switch to use generic SdMmcPciHcDxe Marcin Wojtas
2018-11-12 10:36 ` Ard Biesheuvel
[not found] ` <1541804508-27499-5-git-send-email-mw@semihalf.com>
2018-11-12 10:27 ` [platforms: PATCH v4 4/7] Marvell/Armada70x0Db: Introduce board description library Ard Biesheuvel
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox