From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f65.google.com (mail-wm1-f65.google.com [209.85.128.65]) by mx.groups.io with SMTP id smtpd.web11.9517.1576762372374028694 for ; Thu, 19 Dec 2019 05:32:52 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=SxTlQRf0; spf=pass (domain: linaro.org, ip: 209.85.128.65, mailfrom: ard.biesheuvel@linaro.org) Received: by mail-wm1-f65.google.com with SMTP id t14so5614884wmi.5 for ; Thu, 19 Dec 2019 05:32:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=aEuLVQbRhKw5TKU9ti8rElaBYGGMvthV5qsRz0uXab4=; b=SxTlQRf0XVRLPDcR009/nvv2gGL/TELoVJIeZ2uX6fO+yqboP3ZrHB8zV7OYT583ru hXdqafoihrtduAORpyU+wox8WWwYpzkFfsS2TCHRByoon2vlT7aNP5gcmGKk9woS3IlN i4cj8msr/pvdbJ9mnRn2Ii34E/sOmakNuy+z6nH4cRdkQyuVG7e1taCg0PpR1OE0qRCX qe0pV1iBuYDZ5f1p/YZupMbj6X3Cy4d8K72ZPonHh7Jd4r4jTBoPMn1kt2c7n4+Pv8r9 ZG1AdHkgM72J42CVT4jSl/Ebba+TztC7ZOsEjLyrTIli7Wffir7WuiqE8PYyxVNrzXFN HTHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=aEuLVQbRhKw5TKU9ti8rElaBYGGMvthV5qsRz0uXab4=; b=uHPxHlE53qkoKuIt3B/UgEpGrEi9F+dnAs0YQz0b8xaNExNe5VAlgXIKZS/aFS1JvT BRh35UxfzCu/Kw0dErKpzO4DgUxMiBvuO77rCCJuCjPuvqp9JTm/rocHALsCg2xcrCFL fHVMXezbY4n6ZFvBxM6EkPa/LMnqLImQzezcgC1WrNFhGzP6dsRgQrpfNEMZ94FrnEJX fsN10tTrO/QTjt0moqHzNS3jv1lQo31PgbDkm3H2MQW58iRQbMYtPoJnuhkZG0xpv6xu J3CjwptwsZ57YOejOcxEYgsgjKkE5maoMG9Mooq0ggZOxwXdIJsCv+jcxLn2pBLL9hIr 3IZw== X-Gm-Message-State: APjAAAV23PVUVkIivbvuUjN+/0qMphkxt/c6eXh8QABHM9rhj90Nq98i 3C6DhRnwxxLu+AfPpJxDMQKUh8TQnm6Lu7qyiLjfGQ== X-Google-Smtp-Source: APXvYqx44YQyXsGcwoNoMDapQ4c+MZ7apXlXNstH02HObHSAy15Wof3jzi7xdDn8WkcasNdURpNFvjkiCDXcoyGFNzc= X-Received: by 2002:a1c:7901:: with SMTP id l1mr9911145wme.67.1576762370907; Thu, 19 Dec 2019 05:32:50 -0800 (PST) MIME-Version: 1.0 References: <20191219121434.2856-1-pete@akeo.ie> <20191219121434.2856-2-pete@akeo.ie> <617f1b75-563d-55d9-c562-6d169d511be3@redhat.com> In-Reply-To: <617f1b75-563d-55d9-c562-6d169d511be3@redhat.com> From: "Ard Biesheuvel" Date: Thu, 19 Dec 2019 13:32:45 +0000 Message-ID: Subject: Re: [edk2-platforms][PATCH v2 1/7] Silicon/Bcm283x: Add UART constants for PL011 and miniUART To: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= Cc: Pete Batard , edk2-devel-groups-io , Leif Lindholm Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, 19 Dec 2019 at 15:27, Philippe Mathieu-Daud=C3=A9 wrote: > > On 12/19/19 1:14 PM, Pete Batard wrote: > > This adds offset, base address, interrupt and register-space length > > for the 2 UARTs that the Bcm283x SoC provides. > > > > To be consistent, we simplify the two other existing base address > > definitions to a more legible equivalent since there is no point > > in explicit refs to FixedPcdGet64 (PcdBcm283xRegistersAddress). > > > > Signed-off-by: Pete Batard > > --- > > Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h | 17 ++++= +++++++++---- > > 1 file changed, 13 insertions(+), 4 deletions(-) > > > > diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.= h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h > > index 02107086d439..dd9a698f7218 100644 > > --- a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h > > +++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h > > @@ -24,8 +24,7 @@ > > > > /* watchdog constants */ > > #define BCM2836_WDOG_OFFSET 0x0010000= 0 > > -#define BCM2836_WDOG_BASE_ADDRESS (FixedPcdG= et64 (PcdBcm283xRegistersAddress) \ > > - + BCM2836_= WDOG_OFFSET) > > +#define BCM2836_WDOG_BASE_ADDRESS (BCM2836_S= OC_REGISTERS + BCM2836_WDOG_OFFSET) > > Good! > > > #define BCM2836_WDOG_PASSWORD 0x5a00000= 0 > > #define BCM2836_WDOG_RSTC_OFFSET 0x0000001= c > > #define BCM2836_WDOG_WDOG_OFFSET 0x0000002= 4 > > @@ -34,8 +33,7 @@ > > > > /* mailbox interface constants */ > > #define BCM2836_MBOX_OFFSET 0x0000b88= 0 > > -#define BCM2836_MBOX_BASE_ADDRESS (FixedPcdG= et64 (PcdBcm283xRegistersAddress) \ > > - + BCM2836_= MBOX_OFFSET) > > +#define BCM2836_MBOX_BASE_ADDRESS (BCM2836_S= OC_REGISTERS + BCM2836_MBOX_OFFSET) > > #define BCM2836_MBOX_READ_OFFSET 0x0000000= 0 > > #define BCM2836_MBOX_STATUS_OFFSET 0x0000001= 8 > > #define BCM2836_MBOX_CONFIG_OFFSET 0x0000001= c > > @@ -50,4 +48,15 @@ > > #define BCM2836_INTC_TIMER_CONTROL_OFFSET 0x0000004= 0 > > #define BCM2836_INTC_TIMER_PENDING_OFFSET 0x0000006= 0 > > > > +/* uart constants */ > > +#define BCM2836_PL011_UART_OFFSET 0x00201000 > > +#define BCM2836_PL011_UART_BASE_ADDRESS (BCM2836_S= OC_REGISTERS + BCM2836_PL011_UART_OFFSET) > > +#define BCM2836_PL011_UART_LENGTH 0x00001000 > > +#define BCM2836_PL011_UART_INTERRUPT 0x99 > > Hmm 96 + 29 =3D 0x7D, 96 + 57 =3D 0x99. OK. > Maybe we can later add a definition for this '96'. > Ehm, no that's not going to happen. It is fine to abstract actual physical properties like the base of a register block, but that doesn't make it an end in itself to express arbitrary values like interrupt line numbers like this. > Reviewed-by: Philippe Mathieu-Daude > Thanks! > > + > > +#define BCM2836_MINI_UART_OFFSET 0x00215000 > > +#define BCM2836_MINI_UART_BASE_ADDRESS (BCM2836_S= OC_REGISTERS + BCM2836_MINI_UART_OFFSET) > > +#define BCM2836_MINI_UART_LENGTH 0x00000070 > > +#define BCM2836_MINI_UART_INTERRUPT 0x7D > > + > > #endif /*__BCM2836_H__ */ > > >