From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c06::230; helo=mail-io0-x230.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-io0-x230.google.com (mail-io0-x230.google.com [IPv6:2607:f8b0:4001:c06::230]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 54C32221A2B9B for ; Wed, 20 Dec 2017 01:09:13 -0800 (PST) Received: by mail-io0-x230.google.com with SMTP id o2so16575065ioe.8 for ; Wed, 20 Dec 2017 01:14:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=blYo3zHrn14us+Pwp2z2Y8jrVZHWHKyQAzkIQLebQOg=; b=BuZ68bEbUO1nBgEO1xP0vuthBCHqIPnOG7whzbL0XOZNa3WZHfEWxbe7AxShoIxGAf egExt4NpY7dXW10DeBBHgXnvHB5F+oV+2gzUFItGcN5v/eP8Yml8lj9J9Hvi8y9QaBdr DKCKxnFibMh6Y2Vcg+T9Aq6gWhmz5E5HitJQs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=blYo3zHrn14us+Pwp2z2Y8jrVZHWHKyQAzkIQLebQOg=; b=blRlBdfGePIu1XW1Sl3d57OMdGm1hvygtlCNAEq3RoBs2scSsUIC5DW3W19xV4iCwE lLiNe3GPF1rKMr9U2JQaxpn/XY3rB+2YYO8BefkeZ3wOuDGZbE35llMbmt70p/cHVL45 trcyVRPb8HNRx346JqsjYt854kYSzhdyILqLODRmodTuZVOkfTknzuhFeRZo2XyQJYIV 6wMtqmIVc8+uwoMaz2xxZkJPiSEwyHj1H7rHBiAqvNRUcsX32h6EAYvJ0BMGQ3UqRJec 6M5Zr3qA+FrjhOgw5JghzUS56M5pFLxpubVHxQ1JaGVpzE7RsIs3iF+kJVY/T61FbutP ec2A== X-Gm-Message-State: AKGB3mJKn+M7nBQEmRX+WdfT+a2fsuGxvH4+Pz9MNv5a8SillYfddujf M0ejcz0LadgmYn1jUgm0ye6CPHD91YXWYbBLpICMOA== X-Google-Smtp-Source: ACJfBovkQ20Lx1LuRY/cz8JECmguj6urwTOD+llSMYgH5HV0OEQSKjCBmgNY7W+rE7U4tAmWx2CeGV0AM+EYSW0bQvU= X-Received: by 10.107.2.212 with SMTP id 203mr2471771ioc.186.1513761239630; Wed, 20 Dec 2017 01:13:59 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.52.14 with HTTP; Wed, 20 Dec 2017 01:13:58 -0800 (PST) In-Reply-To: <1513758078-99534-1-git-send-email-heyi.guo@linaro.org> References: <1513758078-99534-1-git-send-email-heyi.guo@linaro.org> From: Ard Biesheuvel Date: Wed, 20 Dec 2017 09:13:58 +0000 Message-ID: To: Heyi Guo Cc: linaro-uefi , "edk2-devel@lists.01.org" , Star Zeng , Eric Dong , Ruiyu Ni , Jason Zhang Subject: Re: [RFC] MdeModulePkg/PciHostBridge: Add address translation support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 20 Dec 2017 09:09:13 -0000 Content-Type: text/plain; charset="UTF-8" Hi Heyi, On 20 December 2017 at 08:21, Heyi Guo wrote: > PCIe on some ARM platforms requires address translation, not only for > legacy IO access, but also for 32bit memory BAR access as well. There > will be "Address Translation Unit" or something similar in PCI host > bridges to translation CPU address to PCI address and vice versa. So > we think it may be useful to add address translation support to the > generic PCI host bridge driver. > I agree. While unusual on a PC, it is quite common on other architectures to have more complex non 1:1 topologies, which currently require a forked PciHostBridgeDxe driver with local changes applied. > This RFC only contains one minor change to the definition of > PciHostBridgeLib, and there certainly will be a lot of other changes > to make it work, including: > > 1. Use CPU address for GCD space add and allocate operations, instead > of PCI address; also IO space will be changed to memory space if > translation exists. > For I/O space, the translation should simply be applied to the I/O range. I don't think it makes sense to use memory space here, given that it is specific to architectures that lack native port I/O. > 2. RootBridgeIoMemRead/Write, RootBridgeIoRead/Write need to get > translation of the corresponding aperture, add the translation to the > input address, and then call CpuIo2 protocol; IO access will also be > converted to memory access if IO translation exists. > Again, why is this necessary? A host bridge that implements a non 1:1 translation for port I/O ranges may be part of a system that has native port I/O, and so the translation should be based on that. > 3. RootBridgeIoConfiguration needs to fill AddrTranslationOffset in > the discriptor. > Indeed. Note that this has been a source of much confusion lately, should we should discuss this carefully before spending time on an implementation. > If it makes sense, then I'll continue to prepare the formal patch. > > Any comments? > > Thanks, > > Gary (Heyi Guo) > > Cc: Star Zeng > Cc: Eric Dong > Cc: Ruiyu Ni > Cc: Ard Biesheuvel > Cc: Jason Zhang > > --- > MdeModulePkg/Include/Library/PciHostBridgeLib.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/MdeModulePkg/Include/Library/PciHostBridgeLib.h b/MdeModulePkg/Include/Library/PciHostBridgeLib.h > index d42e9ec..b9e8c0f 100644 > --- a/MdeModulePkg/Include/Library/PciHostBridgeLib.h > +++ b/MdeModulePkg/Include/Library/PciHostBridgeLib.h > @@ -22,6 +22,7 @@ > typedef struct { > UINT64 Base; > UINT64 Limit; > + UINT64 Translation; > } PCI_ROOT_BRIDGE_APERTURE; > > typedef struct { > -- > 2.7.4 >