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From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Ryan Harkin <ryan.harkin@linaro.org>,
	edk2-devel-01 <edk2-devel@lists.01.org>,
	 Leif Lindholm <leif.lindholm@linaro.org>
Subject: Re: [PATCH v7 3/4] PL180: update for indentifying SD
Date: Wed, 23 Nov 2016 08:59:29 +0000	[thread overview]
Message-ID: <CAKv+Gu_KPBd+EMwyhB5nZYZXp92uOODJKgu0n7=nScS6b50exw@mail.gmail.com> (raw)
In-Reply-To: <1479884921-25398-4-git-send-email-haojian.zhuang@linaro.org>

On 23 November 2016 at 07:08, Haojian Zhuang <haojian.zhuang@linaro.org> wrote:
> When CMD6 & ACMD51 are added into indentifying SD process, PL180
> should also support CMD6 & ACMD51. Otherwise, it'll hang when
> system tries to read expected data.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>

Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

> ---
>  ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c | 29 ++++++++++++++++++++-------
>  1 file changed, 22 insertions(+), 7 deletions(-)
>
> diff --git a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c
> index 5526aac..b2ba4c0 100644
> --- a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c
> +++ b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c
> @@ -63,11 +63,6 @@ MciIsReadOnly (
>    return (MmioRead32 (FixedPcdGet32 (PcdPL180SysMciRegAddress)) & SYS_MCI_WPROT);
>  }
>
> -#if 0
> -//Note: This function has been commented out because it is not used yet.
> -//      This function could be used to remove the hardcoded BlockLen used
> -//      in MciPrepareDataPath
> -
>  // Convert block size to 2^n
>  STATIC
>  UINT32
> @@ -87,7 +82,6 @@ GetPow2BlockLen (
>
>    return Pow2BlockLen;
>  }
> -#endif
>
>  VOID
>  MciPrepareDataPath (
> @@ -126,6 +120,23 @@ MciSendCommand (
>      MciPrepareDataPath (MCI_DATACTL_CARD_TO_CONT);
>    } else if ((MmcCmd == MMC_CMD24) || (MmcCmd == MMC_CMD20)) {
>      MciPrepareDataPath (MCI_DATACTL_CONT_TO_CARD);
> +  } else if (MmcCmd == MMC_CMD6) {
> +    MmioWrite32 (MCI_DATA_TIMER_REG, 0xFFFFFFF);
> +    MmioWrite32 (MCI_DATA_LENGTH_REG, 64);
> +#ifndef USE_STREAM
> +    MmioWrite32 (MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_CARD_TO_CONT | GetPow2BlockLen (64));
> +#else
> +    MmioWrite32 (MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_CARD_TO_CONT | MCI_DATACTL_STREAM_TRANS);
> +#endif
> +  } else if (MmcCmd == MMC_ACMD51) {
> +    MmioWrite32 (MCI_DATA_TIMER_REG, 0xFFFFFFF);
> +    /* SCR register is 8 bytes long. */
> +    MmioWrite32 (MCI_DATA_LENGTH_REG, 8);
> +#ifndef USE_STREAM
> +    MmioWrite32 (MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_CARD_TO_CONT | GetPow2BlockLen (8));
> +#else
> +    MmioWrite32 (MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_CARD_TO_CONT | MCI_DATACTL_STREAM_TRANS);
> +#endif
>    }
>
>    // Create Command for PL180
> @@ -223,7 +234,11 @@ MciReadBlockData (
>
>    // Read data from the RX FIFO
>    Loop   = 0;
> -  Finish = MMCI0_BLOCKLEN / 4;
> +  if (Length < MMCI0_BLOCKLEN) {
> +    Finish = Length / 4;
> +  } else {
> +    Finish = MMCI0_BLOCKLEN / 4;
> +  }
>
>    // Raise the TPL at the highest level to disable Interrupts.
>    Tpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
> --
> 2.7.4
>


  reply	other threads:[~2016-11-23  8:59 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-23  7:08 [PATCH v7 0/4] enhance MMC Haojian Zhuang
2016-11-23  7:08 ` [PATCH v7 1/4] MmcDxe: add interface to change io width and speed Haojian Zhuang
2016-11-23  8:56   ` Ard Biesheuvel
2016-11-23  7:08 ` [PATCH v7 2/4] MmcDxe: set iospeed and bus width in SD stack Haojian Zhuang
2016-11-23  8:58   ` Ard Biesheuvel
2016-11-23  7:08 ` [PATCH v7 3/4] PL180: update for indentifying SD Haojian Zhuang
2016-11-23  8:59   ` Ard Biesheuvel [this message]
2016-11-23  7:08 ` [PATCH v7 4/4] MmcDxe: expand to support multiple blocks Haojian Zhuang
2016-11-23  9:01   ` Ard Biesheuvel
2016-11-23  8:54 ` [PATCH v7 0/4] enhance MMC Ard Biesheuvel

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