From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: Leif Lindholm <leif.lindholm@linaro.org>
Cc: "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>,
Joakim Bech <joakim.bech@linaro.org>
Subject: Re: [PATCH edk2-platforms 1/5] Silicon/SynQuaver/DeviceTree: add node for SPI controller
Date: Mon, 19 Feb 2018 08:20:28 +0000 [thread overview]
Message-ID: <CAKv+Gu_Lk+eVEQSFdubz1xN1DNzrC-oL1cmLpW1Yk9czAZTkug@mail.gmail.com> (raw)
In-Reply-To: <20180218113936.6f4fdemn7yurjac3@bivouac.eciton.net>
On 18 February 2018 at 11:39, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> On Fri, Feb 16, 2018 at 06:34:30PM +0000, Ard Biesheuvel wrote:
>> On 16 February 2018 at 17:00, Leif Lindholm <leif.lindholm@linaro.org> wrote:
>> > On Thu, Feb 15, 2018 at 05:20:50PM +0000, Ard Biesheuvel wrote:
>> >> Add a node for the SPI controller to the device tree so the OS may
>> >> attach to it. This is the SPI controller that is attached to the
>> >> 96boards mezzanine connector on Developer Box.
>> >
>> > Just a generic question (which also applies to the subsequent patch):
>> > Are there any implications here with regards to this bus running in
>> > master or slave mode?
>> >
>>
>> Not really, since that depends entirely on the OS. We just assert the
>> presence of a certain IP block at a certain memory offset, and whether
>> the hardware supports slave mode is left unspecified. Whether the OS
>> supports slave mode (for this particular IP block) is not a property
>> of the hardware.
>
> I was thinking more along the lines of whether the hardware supports
> slave mode or not (perhaps as a synthesis option).
>
> But, fair enough.
>
> If you change SynQuaver -> SynQuacer in 1-2 subject lines, for the series:
> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
>
Excellent, thanks. However, I am going to respin this and make it much
more generic:
- create a separate, generic MezzanineDxe driver (with its own HII menu option)
- redefine all GPIO, I2C and SPI references in terms of the 96boards
spec, e.g., GPIO-A, GPIO-B, GPIO-C
That way, you can basically specify how the LS connector has been
integrated (which I2C/SPI/GPIO), and support anything that the generic
driver supports.
This is only up to a point, of course. Using the Secure96 RNG in UEFI
requires a UEFI driver, and some I2C plumbing, but I am trying to make
that generic as well (which is feasible if the I2C bus on the LS
connector does not contain anything else that UEFI cares about)
next prev parent reply other threads:[~2018-02-19 8:14 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-15 17:20 [PATCH edk2-platforms 0/5] Add Secure96 mezzanine support Ard Biesheuvel
2018-02-15 17:20 ` [PATCH edk2-platforms 1/5] Silicon/SynQuaver/DeviceTree: add node for SPI controller Ard Biesheuvel
2018-02-16 17:00 ` Leif Lindholm
2018-02-16 18:34 ` Ard Biesheuvel
2018-02-18 11:39 ` Leif Lindholm
2018-02-19 8:20 ` Ard Biesheuvel [this message]
2018-02-19 11:48 ` Leif Lindholm
2018-02-15 17:20 ` [PATCH edk2-platforms 2/5] Silicon/SynQuaver/DeviceTree: add node for I2C controller Ard Biesheuvel
2018-02-15 17:20 ` [PATCH edk2-platforms 3/5] Platform: add support for 96boards Secure96 mezzanine adapter Ard Biesheuvel
2018-02-15 17:20 ` [PATCH edk2-platforms 4/5] Silicon/SynQuacer/PlatformDxe: add menu option to select mezzanine Ard Biesheuvel
2018-02-15 17:20 ` [PATCH edk2-platforms 5/5] Platform/Socionext/DeveloperBox: add Secure96 support Ard Biesheuvel
2018-02-16 17:35 ` [PATCH edk2-platforms 0/5] Add Secure96 mezzanine support Leif Lindholm
2018-02-16 18:41 ` Ard Biesheuvel
2018-02-21 12:10 ` Ard Biesheuvel
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