From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c06::235; helo=mail-io0-x235.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-io0-x235.google.com (mail-io0-x235.google.com [IPv6:2607:f8b0:4001:c06::235]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D371B2202E484 for ; Thu, 15 Mar 2018 08:59:52 -0700 (PDT) Received: by mail-io0-x235.google.com with SMTP id d21so9189499ioc.5 for ; Thu, 15 Mar 2018 09:06:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=r57UiPYHPrT7Ni1IHVoVojWhsciac1T4PEWSRDGc0R0=; b=b9ZOKjNFOSS6AxRyZxwYkDjdQRVLH0yPC9DgIiMTr23EAu2Pyu6HrSlEm+xa35nkYQ HXJFFa0zT4Z6j2Rc6d8eLOTMAm6jt8UmzyFhkxQQvhHHEGnxGKWkPbONP2aCQxQkSdjD QZGSFad+0qJrVkdRPWDdbUBs70yKoUR0jSAnE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=r57UiPYHPrT7Ni1IHVoVojWhsciac1T4PEWSRDGc0R0=; b=DHOKkiiVflPSXR50V7wxi86aIS1KdKFNV1Pv5fRWDR2ySDUVzW/DvbGRAQyyxHrrcz S8IBRxKU/atsNmfjCFt4HWvThrVvEBfjfsT0f4riXSnGU7B5+4AQ2zW7iHtGUtYrfmBW saIEcEzUeDQdCqCRRJIMffpWGy0u1v+2xpe8nCYOMz92NFHxmLZHOAT3z/sLj4acZG/c MdRaHMq+1FYS4Vnn7Zw2OBYWKKql1wnCFUdsJMh5HCChrqnUlj875J9snn5s9s4lPVmh 6vIMMVIZQK3wQqeK7gQFck1gaMzTcAIZs//RF7nN/soW1rHkSw9lZL10zBDbjF40igHy TT+w== X-Gm-Message-State: AElRT7FCrouVO0LSbaGVjoFZoAEaqTMYs2AhG3ITk/NWX7MjKsqRmB+F Rby/6FR6YxQ5gtMfb9Ks5eYx90eo2Dhq4k0rtxSrvQ== X-Google-Smtp-Source: AG47ELv2AkCaFl80xmwrrT23LOMSMIXBbBmaLmOp+53x9oviwtaKN8Z/O1r61Ba4mIYMP5uxhrLjSLo+8udD4EfYDJQ= X-Received: by 10.107.41.16 with SMTP id p16mr9581559iop.173.1521129976397; Thu, 15 Mar 2018 09:06:16 -0700 (PDT) MIME-Version: 1.0 Received: by 10.107.138.209 with HTTP; Thu, 15 Mar 2018 09:06:15 -0700 (PDT) In-Reply-To: References: <20180228192421.17684-1-ard.biesheuvel@linaro.org> <20180301112327.GB1635@xora-monster> From: Ard Biesheuvel Date: Thu, 15 Mar 2018 16:06:15 +0000 Message-ID: To: "Graeme Gregory (Linaro)" Cc: "edk2-devel@lists.01.org" , Leif Lindholm , Masahisa Kojima Subject: Re: [PATCH edk2-platforms v2 0/7] SynQuacer ACPI support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 15 Mar 2018 15:59:53 -0000 Content-Type: text/plain; charset="UTF-8" On 1 March 2018 at 11:24, Ard Biesheuvel wrote: > On 1 March 2018 at 11:23, Graeme Gregory (Linaro) > wrote: >> On Wed, Feb 28, 2018 at 07:24:14PM +0000, Ard Biesheuvel wrote: >>> This implements ACPI support for the SynQuacer platforms. >>> >>> Changes since v1: >>> - improve commit log (#1, #2) >>> - replace bare numbers with symbolic constants (#2) >>> - add Leif's R-b (#4) >>> - add patches #6 and #7 >>> >>> Note that supporting ACPI on this SoC is non-trivial, due to the quirky >>> DesignWare RCs and the pre-ITS that sits between the PCIe RCs and the GICv3. >>> However, the most important issue has been addressed by modifying the static >>> SMMU mapping that sits between the CPUs and the PCIe config space, working >>> around the ghosting issue that occurs on these RCs, due the complete lack of >>> type 0 config TLP filtering by the [non-existent] root port. (This was tested >>> using the 20180226-LB1.1-ACPI-ramfw.bin SCP firmware image, which is not [yet] >>> installed by default on DeveloperBox hardware) >>> >>> That leaves the MSI issue, which is worked around by limiting MSI support to a >>> single RC. In the presented configuration, this is RC #1, which connects to the >>> x16 slot [and nothing else] on the DeveloperBox PCB. The onboard PCIe devices >>> (XHCI + SATA) work without problem using wired interrupts only, and so RC #0 >>> has MSI support disabled. This means cards that require MSI support should >>> be inserted into the x16 slot, which is likely to be the preferred slot in >>> such cases anwyay (e.g., when using NVME or high end networking plugin cards) >>> >>> Patch #1 fixes a minor issue in the slot-to-BDF mapping. >>> >>> Patch #2 modifies the static PCIe window configuration so it can be described >>> using ACPI as well as DT. >>> >>> Patch #3 introduces the static ACPI tables that describe the fixed platform >>> devices and peripherals to the OS. >>> >>> Patch #4 adds a menu option to the platform driver to make ACPI vs DT user >>> selectable. >>> >>> Patch #5 adds support for describing the eMMC controller using a SSDT table >>> which is only installed if eMMC support is enabled. >>> >>> Patch #6 adds a _STA method implementation to the PCIe RC devices so that >>> they are only exposed to the OS when running on a platform that has one of >>> the several ECAM workarounds enabled. Otherwise, we can still boot via ACPI >>> using platform devices, but the PCIe RCs are unavailable. >>> >>> Patch #7 extends the _STA method for PCI0 to take the presence detect GPIO >>> into account. This is necessary because on the SynQuacer evaluation board, >>> any attempt to access the device registers will lock up the system if no >>> card is inserted into the slot. >>> >>> Note that driver support for the eMMC and network controller only landed in >>> v4.15, but when using a SATA driver and a plugin network card that does have >>> driver support, these patches should allow the SynQuacer based platforms to >>> boot stock Debian Stretch/Fedora/Centos etc installers. >>> >> >> The ACPI parts look good to me. >> >> Reviewed-by: Graeme Gregory >> > > Cheers. > > I'll hold off on merging this until Heyi's PciHostBridgeDxe patches > are in (which are in pretty good shape now) Series applies as d9c87c711412..f8acbb73fae6 Thanks all