From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::143; helo=mail-it1-x143.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-it1-x143.google.com (mail-it1-x143.google.com [IPv6:2607:f8b0:4864:20::143]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E39AB21196215 for ; Tue, 27 Nov 2018 04:26:35 -0800 (PST) Received: by mail-it1-x143.google.com with SMTP id b5so33520079iti.2 for ; Tue, 27 Nov 2018 04:26:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=F+8dShrmxqtOSwDIwG+WOfXwjTlYbkByr96f60EEABk=; b=WZOtHbAFr0tiYjjaebRERP22kWfttvNfoyo3j/1cMvJIf4rlBPmSZXzw6pu0OnOH7/ Gyzz0NqWFUa7g8WfR2sL/7QEX4tQjbw/B97YQMAqX5GedbNRV74gS1aewjtRdA7lw5lf nzYa4sQQiwj9s5T7OJSuGswUQ+6odP3VliV8w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=F+8dShrmxqtOSwDIwG+WOfXwjTlYbkByr96f60EEABk=; b=puv9To44KDs8HFeBriVa/u8gJYPvbuP45Tk+XWkh9zDzSbpKOL0gmY1fRGO3vvg2UT MAmYfSV6rbz2yaVNpJyNQuj7L4CKKtF/yA4C0SnxPrZURYnp66kFLIm/Vw2OaOHbOQqv 9J41vLL2Jj6F4Ga3TnosyNbTBWpebASfC2FJK3Vs8U+9fqLzPrG3DkdXaGWdZpKRi2X6 WH7AWuE9ZW90xgWa0lZYgUQhOliL7XJr4pXyE0H9NYZVCJekOc9poW8r1uv9lt91ZWFu ke2P/Tm+KJvKnbSQTvulI6n73P/9qsPLEqPUvDQ/ecJLtxRxW1fYdHGmBRrAaotbzuRV db2A== X-Gm-Message-State: AGRZ1gJoHtbkbzel4hNPKzI5X8JeCnzVmQcvv/hUQ6dakaKopWxtM83A SXl4XXDoRDaQrNgfSi+ffoMdOPdSKKpfKaZi93h3qqNz X-Google-Smtp-Source: AFSGD/W8BmOrOjaGgV9l2bPNAh8XEtZKtJeR0w7Z8obsfCBBAr9qbeqM4GbbFhfbrrYh0sciAaFGd3vMwkjiGH41FNI= X-Received: by 2002:a24:edc4:: with SMTP id r187mr29695639ith.158.1543321594639; Tue, 27 Nov 2018 04:26:34 -0800 (PST) MIME-Version: 1.0 References: <20181126223801.17121-1-ard.biesheuvel@linaro.org> <20181126223801.17121-2-ard.biesheuvel@linaro.org> In-Reply-To: <20181126223801.17121-2-ard.biesheuvel@linaro.org> From: Ard Biesheuvel Date: Tue, 27 Nov 2018 13:26:23 +0100 Message-ID: To: "edk2-devel@lists.01.org" Cc: Laszlo Ersek , Leif Lindholm , Auger Eric , Andrew Jones , =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= , Julien Grall Subject: Re: [PATCH v2 01/13] ArmPkg/ArmLib: add support for reading the max physical address space size X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 27 Nov 2018 12:26:36 -0000 Content-Type: text/plain; charset="UTF-8" On Mon, 26 Nov 2018 at 23:38, Ard Biesheuvel wrote: > > Add a helper function that returns the maximum physical address space > size as supported by the current CPU. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel > --- > ArmPkg/Include/Library/ArmLib.h | 17 +++++++++++++++++ > ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S | 16 ++++++++++++++++ > ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S | 8 ++++++++ > 3 files changed, 41 insertions(+) > > diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h > index ffda50e9d767..b22879fe6e94 100644 > --- a/ArmPkg/Include/Library/ArmLib.h > +++ b/ArmPkg/Include/Library/ArmLib.h > @@ -29,6 +29,17 @@ > #define EFI_MEMORY_CACHETYPE_MASK (EFI_MEMORY_UC | EFI_MEMORY_WC | \ > EFI_MEMORY_WT | EFI_MEMORY_WB | \ > EFI_MEMORY_UCE) > +// > +// ARM_MMU_IDMAP_RANGE defines the maximum size of the identity mapping > +// that covers the entire address space when running in UEFI. This is > +// limited to what can architecturally be mapped using a 4 KB granule, > +// even if the hardware is capable of mapping more using larger pages. > +// > +#ifdef MDE_CPU_ARM > +#define ARM_MMU_IDMAP_RANGE (1ULL << 32) > +#else > +#define ARM_MMU_IDMAP_RANGE (1ULL << 48) > +#endif > I just learned that this is essentially the same as MAX_ADDRESS (after we fix AArch64's definition of it) so this can be dropped. > /** > * The UEFI firmware must not use the ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_* attributes. > @@ -733,4 +744,10 @@ ArmWriteCntvOff ( > UINT64 Val > ); > > +UINTN > +EFIAPI > +ArmGetPhysicalAddressBits ( > + VOID > + ); > + > #endif // __ARM_LIB__ > diff --git a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S > index 1ef2f61f5979..7332601241aa 100644 > --- a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S > +++ b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S > @@ -196,4 +196,20 @@ ASM_FUNC(ArmWriteSctlr) > 3:msr sctlr_el3, x0 > 4:ret > > +ASM_FUNC(ArmGetPhysicalAddressBits) > + mrs x0, id_aa64mmfr0_el1 > + adr x1, .LPARanges > + and x0, x0, #7 > + ldrb w0, [x1, x0] > + ret > + > +// > +// Bits 0..2 of the AA64MFR0_EL1 system register encode the size of the > +// physical address space support on this CPU: > +// 0 == 32 bits, 1 == 36 bits, etc etc > +// 6 and 7 are reserved > +// > +.LPARanges: > + .byte 32, 36, 40, 42, 44, 48, 52, -1 > + > ASM_FUNCTION_REMOVE_IF_UNREFERENCED > diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S > index f2a517671f0a..f2f3c9a25991 100644 > --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S > +++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S > @@ -165,4 +165,12 @@ ASM_FUNC(ArmWriteCpuActlr) > isb > bx lr > > +ASM_FUNC (ArmGetPhysicalAddressBits) > + mrc p15, 0, r0, c0, c1, 4 // MMFR0 > + and r0, r0, #0xf // VMSA [3:0] > + cmp r0, #5 // >5 implies LPAE support > + movlt r0, #32 // 32 bits if no LPAE > + movge r0, #40 // 40 bits if LPAE > + bx lr > + > ASM_FUNCTION_REMOVE_IF_UNREFERENCED > -- > 2.19.1 >