From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=yLnLYUuC; spf=pass (domain: linaro.org, ip: 209.85.166.194, mailfrom: ard.biesheuvel@linaro.org) Received: from mail-it1-f194.google.com (mail-it1-f194.google.com [209.85.166.194]) by groups.io with SMTP; Fri, 24 May 2019 09:57:46 -0700 Received: by mail-it1-f194.google.com with SMTP id u186so14826168ith.0 for ; Fri, 24 May 2019 09:57:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=9SWv1mKoqOaDg8ymHBySDGSCsWB59UI8DCn94HP+IFg=; b=yLnLYUuCWqcLT7jdT1U7Dpg6Keyh9pMl21PAzv7Ijxxdk8d1skFSbSIolMWChnLwpi gOBlmmY6ohxjyCVCfm6Wb5ZnzgiNv42QaiaH4NMMYpXQo9JOoZsmC7ke56fp8TV0GRC4 b2n/6EI6pX0Qo73EB6OXWjve3iyEC+N4wWjk6AgZJQjW2ifR/jv59wlu7wPyCc1SnE2F 2OseF+LxJHVro/2RSWin1MPP8T3XOyE8eyB265yq9WFPtswwlkKFiKfhw7HhN4dG8tOW xUmqay1TEiMs6PgtxDIyIsbWFr6V0ct72znA/B4sL63RmFwZFdZW6MaBbgO67fVAGHfW 9Frw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=9SWv1mKoqOaDg8ymHBySDGSCsWB59UI8DCn94HP+IFg=; b=skxoAEf6TDcGC19fuaLc8+D3Vagd7CkQiDEQ+FO9rGkwUK4SkiFtDQ2SkISWcJ8BoX kKToYm8UkmbVB9rwRwtO4L0Nv8xh+6iLkbYAUkWdFm62CWFetiPSF5dV+yd8/6rLMJu7 JJ6DQOqis3T2YM97c4RvhPMKsxSQspRvsVGr4E73izSf9gwHzXD5r/Kn0SJID6Na/k9w sQ6oH1fCglyvw8vWuOq8H5eOClGlmhnP1FIhSZVo6iKIHUBjAAR+5tPbjfIQ+XNVg7zw mAcykk62TDkqEZgjI41cp1nZOCyKhke/Qlo/HfcFlZIX1UGTiwAI5QxXCdrG4s/WxV5Y ap3A== X-Gm-Message-State: APjAAAXrFG8O+x9HE03JZ6dxKL/Y0sJCXD5njSpDfU2O8L/0fa0ZLP8k ZD87C/9AQjqLSXxyQdH7QociuULjyBiFAB08Ii0cYg== X-Google-Smtp-Source: APXvYqwm5kF6fq0fBxlQ6GvfPqzD+AZmV7D+AraKfQwkuyC5vlPEB37t2QPbDqEBQzMYenygRpnpujlu2l/tsE9cEbs= X-Received: by 2002:a24:ca84:: with SMTP id k126mr17561017itg.104.1558717065788; Fri, 24 May 2019 09:57:45 -0700 (PDT) MIME-Version: 1.0 References: <1558713551-25363-1-git-send-email-mw@semihalf.com> In-Reply-To: <1558713551-25363-1-git-send-email-mw@semihalf.com> From: "Ard Biesheuvel" Date: Fri, 24 May 2019 18:57:33 +0200 Message-ID: Subject: Re: [edk2-platforms: PATCH v3 00/14] Armada7k8k PCIE support To: Marcin Wojtas Cc: edk2-devel-groups-io , Leif Lindholm , =?UTF-8?B?SmFuIETEhWJyb8Wb?= , Grzegorz Jaszczyk , Kostya Porotchkin , Jici Gao , Rebecca Cran , Mark Kettenis Content-Type: text/plain; charset="UTF-8" On Fri, 24 May 2019 at 17:59, Marcin Wojtas wrote: > > Hi, > > The v3 of Armada PCIE support brings one change - the custom > PciExpressLib was replaced with PciSegmentLib, that will > allow to extend the support with more slots available > on some platforms. > > The patches are available in the github: > https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/pcie-upstream-r20190524 > > I'm looking forward to your comments or remarks. > > Best regards, > Marcin > For the series Reviewed-by: Ard Biesheuvel Pushed as 21e36d78ddae..50a9caf82b81 Thanks a lot! I'm happy we finally have this stuff merged. > Changelog: > v2->v3: > * 6/14 > - Replace PciExpressLib with PciSegmentLib > > * 8/14 > - Adjust to new dependecies > > v1->v2: > *All > - s/PcieBaseAddress/PcieDbiAdress/ > > *2/14 > - fix alignment in comment > > * 3/14 > - add CONST** to library callback > > * 4/14 > - add missing reset GPIO to McBin description > > * 5/15 > - add CONST** to protocol callback > > * 6/14 > - cleanup all casting in file > - use MAX_UINTx macros > - add Linaro copyright > - use MmioWrite8 instead of volatile in PciExpressReadBuffer > - correct commient in IgnoreBusDeviceFunction () > - fix typo in commit message > > * 7/10 > - correct line endings > - use temporary variable for memory description in PciHostBridgeResourceConflict > - use MAX_UINTx macros > - add comments around stalls and MemoryFence in GPIO reset > - keep the reset active for 150ms > - assign translation values instead of asserting > > *8/14 > - assign gArmTokenSpaceGuid.PcdPciIoTranslation value in .dsc > > * 9-11/14 > - correct line endings > - remove unused methods > - extend commit messages with 32k shift description > > > Marcin Wojtas (14): > Marvell/Library: MvGpioLib: Extend GPIO pin description > Marvell/Library: ArmadaSoCDescLib: Add PCIE information > Marvell/Library: ArmadaBoardDescLib: Add PCIE information > Marvell/Armada7k8k: Extend board description libraries with PCIE > Marvell/Armada7k8k: MvBoardDesc: Extend protocol with PCIE support > Marvell/Armada7k8k: Add PciSegmentLib implementation > Marvell/Armada7k8k: Implement PciHostBridgeLib > Marvell/Armada7k8k: Enable PCIE support > Marvell/Armada80x0McBin: Enable ACPI PCIE support > Marvell/Armada80x0Db: Enable ACPI PCIE support > Marvell/Armada70x0Db: Enable ACPI PCIE support > Marvell/Armada80x0McBin: DeviceTree: Use pci-host-generic driver > Marvell/Armada7k8k: Remove duplication in .dsc files > Marvell/Armada7k8: Add 'acpiview' shell command to build > > Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 15 + > Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc | 4 +- > Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc | 4 +- > Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc | 4 +- > Silicon/Marvell/Armada7k8k/Armada7k8k.fdf | 5 + > Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db.inf | 1 + > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db.inf | 1 + > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin.inf | 1 + > Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLib.inf | 52 + > Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciSegmentLib/PciSegmentLib.inf | 33 + > Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Pcie.h | 26 + > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Pcie.h | 26 + > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Pcie.h | 26 + > Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLibConstructor.h | 95 ++ > Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h | 6 + > Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 46 + > Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 20 + > Silicon/Marvell/Include/Library/MvGpioLib.h | 1 + > Silicon/Marvell/Include/Protocol/BoardDesc.h | 22 + > Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.c | 48 + > Platform/Marvell/Armada70x0Db/NonDiscoverableInitLib/NonDiscoverableInitLib.c | 4 + > Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c | 48 + > Platform/Marvell/Armada80x0Db/NonDiscoverableInitLib/NonDiscoverableInitLib.c | 6 + > Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c | 54 + > Platform/SolidRun/Armada80x0McBin/NonDiscoverableInitLib/NonDiscoverableInitLib.c | 1 + > Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLib.c | 265 ++++ > Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLibConstructor.c | 345 +++++ > Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciSegmentLib/PciSegmentLib.c | 1390 ++++++++++++++++++++ > Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 44 + > Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 86 ++ > Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl | 108 ++ > Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Mcfg.aslc | 47 + > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl | 108 ++ > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Mcfg.aslc | 47 + > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 108 ++ > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Mcfg.aslc | 47 + > Silicon/Marvell/Armada7k8k/DeviceTree/armada-8040-mcbin.dts | 3 + > 37 files changed, 3138 insertions(+), 9 deletions(-) > create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLib.inf > create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciSegmentLib/PciSegmentLib.inf > create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Pcie.h > create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Pcie.h > create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Pcie.h > create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLibConstructor.h > create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLib.c > create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLibConstructor.c > create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciSegmentLib/PciSegmentLib.c > create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Mcfg.aslc > create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Mcfg.aslc > create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Mcfg.aslc > > -- > 2.7.4 >