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From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: Leif Lindholm <leif.lindholm@linaro.org>
Cc: "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>,
	"Yao, Jiewen" <jiewen.yao@intel.com>,
	 "Tian, Feng" <feng.tian@intel.com>,
	"Kinney, Michael D" <michael.d.kinney@intel.com>,
	 "Fan, Jeff" <jeff.fan@intel.com>,
	"Zeng, Star" <star.zeng@intel.com>
Subject: Re: [PATCH 4/4] ArmPkg/ArmMmuLib: AARCH64: add support for modifying only permissions
Date: Fri, 10 Feb 2017 18:23:23 +0000	[thread overview]
Message-ID: <CAKv+Gu_XJzyoNBNRTGtZ9yzwhSfLW-PF-vtaJUYemNRCL0086w@mail.gmail.com> (raw)
In-Reply-To: <20170210181621.GP16034@bivouac.eciton.net>

On 10 February 2017 at 18:16, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> On Thu, Feb 09, 2017 at 05:38:11PM +0000, Ard Biesheuvel wrote:
>> Since the new DXE page protection for PE/COFF images may invoke
>> EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes() with only permission
>> attributes set, add support for this in the AARCH64 MMU code.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.0
>> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> ---
>>  ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 73 +++++++++++++++-----
>>  1 file changed, 56 insertions(+), 17 deletions(-)
>>
>> diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
>> index 6aa970bc0514..764e54b5d747 100644
>> --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
>> +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
>> @@ -28,6 +28,10 @@
>>  // We use this index definition to define an invalid block entry
>>  #define TT_ATTR_INDX_INVALID    ((UINT32)~0)
>>
>> +#define EFI_MEMORY_CACHETYPE_MASK   (EFI_MEMORY_UC | EFI_MEMORY_WC | \
>> +                                     EFI_MEMORY_WT | EFI_MEMORY_WB | \
>> +                                     EFI_MEMORY_UCE)
>> +
>
> This is already duplicated between
>
> ArmPkg/Drivers/CpuDxe/CpuDxe.h
> and
> UefiCpuPkg/CpuDxe/CpuDxe.h
>
> Can we avoid adding more?
>

Good point. Mind if I move it to ArmMmuLib.h? (and keep the UefiCpuPkg
one alone)

>>  STATIC
>>  UINT64
>>  ArmMemoryAttributeToPageAttribute (
>> @@ -101,25 +105,46 @@ PageAttributeToGcdAttribute (
>>    return GcdAttributes;
>>  }
>>
>> -ARM_MEMORY_REGION_ATTRIBUTES
>> -GcdAttributeToArmAttribute (
>> +STATIC
>> +UINT64
>> +GcdAttributeToPageAttribute (
>>    IN UINT64 GcdAttributes
>>    )
>>  {
>> -  switch (GcdAttributes & 0xFF) {
>> +  UINT64 PageAttributes;
>> +
>> +  switch (GcdAttributes & EFI_MEMORY_CACHETYPE_MASK) {
>>    case EFI_MEMORY_UC:
>> -    return ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
>> +    PageAttributes = TT_ATTR_INDX_DEVICE_MEMORY;
>> +    break;
>>    case EFI_MEMORY_WC:
>> -    return ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED;
>> +    PageAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE;
>> +    break;
>>    case EFI_MEMORY_WT:
>> -    return ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH;
>> +    PageAttributes = TT_ATTR_INDX_MEMORY_WRITE_THROUGH | TT_SH_INNER_SHAREABLE;
>
> These TT_SH additions look like a bugfix - should they be a separate commit?
>

No, it's the diff that is confusing here: GcdAttributeToArmAttribute()
is removed completely, and replaced with
GcdAttributeToPageAttribute(). Due to the case labels, these line up,
but they are completely unrelated.

>> +    break;
>>    case EFI_MEMORY_WB:
>> -    return ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
>> +    PageAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK | TT_SH_INNER_SHAREABLE;
>> +    break;
>>    default:
>> -    DEBUG ((EFI_D_ERROR, "GcdAttributeToArmAttribute: 0x%lX attributes is not supported.\n", GcdAttributes));
>> -    ASSERT (0);
>> -    return ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
>> +    PageAttributes = TT_ATTR_INDX_MASK;
>
> OK, so you're doing the same thing here as in the ARM code.
> This is a substantial change in behaviour (old behaviour: if unknown,
> set to DEVICE; new behaviour: if unknown, set "all types permitted").
> Am I missing something?
>

Again, completely different function

>> +    break;
>>    }
>> +
>> +  if ((GcdAttributes & EFI_MEMORY_XP) != 0 ||
>> +      (GcdAttributes & EFI_MEMORY_CACHETYPE_MASK) == EFI_MEMORY_UC) {
>> +    if (ArmReadCurrentEL () == AARCH64_EL2) {
>> +      PageAttributes |= TT_XN_MASK;
>> +    } else {
>> +      PageAttributes |= TT_UXN_MASK | TT_PXN_MASK;
>> +    }
>> +  }
>> +
>> +  if ((GcdAttributes & EFI_MEMORY_RO) != 0) {
>> +    PageAttributes |= TT_AP_RO_RO;
>> +  }
>> +
>> +  return PageAttributes | TT_AF;
>>  }
>>
>>  #define MIN_T0SZ        16
>> @@ -434,17 +459,31 @@ SetMemoryAttributes (
>>    )
>>  {
>>    RETURN_STATUS                Status;
>> -  ARM_MEMORY_REGION_DESCRIPTOR MemoryRegion;
>>    UINT64                      *TranslationTable;
>> -
>> -  MemoryRegion.PhysicalBase = BaseAddress;
>> -  MemoryRegion.VirtualBase = BaseAddress;
>> -  MemoryRegion.Length = Length;
>> -  MemoryRegion.Attributes = GcdAttributeToArmAttribute (Attributes);
>> +  UINT64                       PageAttributes;
>> +  UINT64                       PageAttributeMask;
>> +
>> +  PageAttributes = GcdAttributeToPageAttribute (Attributes);
>> +  PageAttributeMask = 0;
>> +
>> +  if ((Attributes & EFI_MEMORY_CACHETYPE_MASK) == 0) {
>> +    //
>> +    // No memory type was set in Attributes, so we are going to update the
>> +    // permissions only.
>> +    //
>> +    PageAttributes &= TT_AP_MASK | TT_UXN_MASK | TT_PXN_MASK;
>> +    PageAttributeMask = ~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_AP_MASK |
>> +                          TT_PXN_MASK | TT_XN_MASK);
>> +  }
>>
>>    TranslationTable = ArmGetTTBR0BaseAddress ();
>>
>> -  Status = FillTranslationTable (TranslationTable, &MemoryRegion);
>> +  Status = UpdateRegionMapping (
>> +             TranslationTable,
>> +             BaseAddress,
>> +             Length,
>> +             PageAttributes,
>> +             PageAttributeMask);
>>    if (RETURN_ERROR (Status)) {
>>      return Status;
>>    }
>> --
>> 2.7.4
>>


  reply	other threads:[~2017-02-10 18:23 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-09 17:38 [PATCH 0/4] ArmPkg: add groundwork for DXE image protection Ard Biesheuvel
2017-02-09 17:38 ` [PATCH 1/4] ArmPkg/CpuDxe: Correct EFI_MEMORY_RO usage Ard Biesheuvel
2017-02-10 18:17   ` Leif Lindholm
2017-02-10 18:25     ` Ard Biesheuvel
2017-02-10 19:36       ` Leif Lindholm
2017-02-09 17:38 ` [PATCH 2/4] ArmPkg/CpuDxe: translate invalid memory types in EfiAttributeToArmAttribute Ard Biesheuvel
2017-02-10 17:54   ` Leif Lindholm
2017-02-10 17:56     ` Ard Biesheuvel
2017-02-09 17:38 ` [PATCH 3/4] ArmPkg/CpuDxe: ARM: ignore page table updates that only change permissions Ard Biesheuvel
2017-02-10 17:59   ` Leif Lindholm
2017-02-09 17:38 ` [PATCH 4/4] ArmPkg/ArmMmuLib: AARCH64: add support for modifying only permissions Ard Biesheuvel
2017-02-10 18:16   ` Leif Lindholm
2017-02-10 18:23     ` Ard Biesheuvel [this message]
2017-02-11 14:35       ` Leif Lindholm

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