From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c0b::242; helo=mail-it0-x242.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-it0-x242.google.com (mail-it0-x242.google.com [IPv6:2607:f8b0:4001:c0b::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id DF51C20349DAC for ; Fri, 17 Nov 2017 07:13:52 -0800 (PST) Received: by mail-it0-x242.google.com with SMTP id u132so4428927ita.0 for ; Fri, 17 Nov 2017 07:18:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=eeawfoMvcDJcXG1SbFFSOtJ97Nfs3Udx2qhuIy6b11g=; b=ZbcxiZ3lMKW6MxlAVgtXps7Vmbmtcn6jFDh0NQgViJ8mh9ln/QCKbemruScHB7drD2 pmSi6rk3BxFMCrKP5qejmp4upeyFyKv+O0PmihIuEBrQCizJPMW0TVzgxlKhOlr6RtLn ARAxq1pIEdsUYrZBnRM680rj+Qebd6hAdmdec= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=eeawfoMvcDJcXG1SbFFSOtJ97Nfs3Udx2qhuIy6b11g=; b=PxgxXESjJoRYL2qs8EM6glzH6W9bTnFO/l259XcixMaOjMK1MDJGMB0xEr5uVIVUX4 pIT4Pp9Px24zaF+eM36FhtOPyhw9KOYRXOiE+YgmeUrge4/DXviGOh3Z10oaKHwEBUVX obi/GD92rYc3zhWQu1nBOpQ4fBkjflo8ET4b774/xYAR8e3bTcsV3efrUErLjmQZ2mB9 TkQy07FoAXRpDsUBdpm72WMGDVmIiaOX7uufUDFtoLd0i0xHBgZnbBE0PuLTtA8Bi5H5 K2CaX01Ju+AgS86MrGTCwZ56Q+c5cLv8I4UoFDzDS1BLcPK/Nj3z9zG7iYAYkN5sn47+ yC7g== X-Gm-Message-State: AJaThX6+/3plj2oX51/xTVZvg1OPr7S6fdEmYrK+XTyTTnlWU7Al5ZmG u6kPcH5grtU8a4eM9OMNjafsOOdBqi/r/UQAW5+fXw== X-Google-Smtp-Source: AGs4zMbvq/J4QgoYa8iLzWdeX06HUrIc11dWYjP+MGmgScPc/qukYs4Z6fIq1BabdSU/176dI7m4dcLJZJ5zHSO0wTs= X-Received: by 10.36.210.198 with SMTP id z189mr6816565itf.65.1510931882925; Fri, 17 Nov 2017 07:18:02 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.104.3 with HTTP; Fri, 17 Nov 2017 07:18:02 -0800 (PST) In-Reply-To: <20171117151620.vsfkzsy73cz5z2rf@bivouac.eciton.net> References: <20171110142127.12018-1-ard.biesheuvel@linaro.org> <20171110142127.12018-27-ard.biesheuvel@linaro.org> <20171117151620.vsfkzsy73cz5z2rf@bivouac.eciton.net> From: Ard Biesheuvel Date: Fri, 17 Nov 2017 15:18:02 +0000 Message-ID: To: Leif Lindholm Cc: "edk2-devel@lists.01.org" , Daniel Thompson , Masami Hiramatsu , =?UTF-8?B?UGlwYXQv44Oh44K/44Ov44OL44OD44OI44Od44OzIOODlOODkeODg+ODiA==?= , Masahisa Kojima Subject: Re: [PATCH edk2-platforms v4 26/34] Silicon/SynQuacer: add DT description of the SDHCI controller X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 17 Nov 2017 15:13:53 -0000 Content-Type: text/plain; charset="UTF-8" On 17 November 2017 at 15:16, Leif Lindholm wrote: > On Fri, Nov 10, 2017 at 02:21:19PM +0000, Ard Biesheuvel wrote: >> Describe the SynQuacer SoC's eMMC controller in DT so the OS can >> attach to it. >> >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Ard Biesheuvel > > So, slightly obnoxious, but... > Since this is the .dtsi for the SoC as a whole, is there any > convenient way for us to selectively exclude this bit when building? > Some platforms may not use this, and some may chose not to expose it > to the OS. > If a platform needs to remove or modify the DT description at runtime, it is free to do so. However, in my opinion, the DT source itself should be an exact description of the hardware, without any policy layered on top.