From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=jDFWIRX6; spf=pass (domain: linaro.org, ip: 209.85.166.194, mailfrom: ard.biesheuvel@linaro.org) Received: from mail-it1-f194.google.com (mail-it1-f194.google.com [209.85.166.194]) by groups.io with SMTP; Mon, 15 Apr 2019 12:50:22 -0700 Received: by mail-it1-f194.google.com with SMTP id s3so14421651itk.1 for ; Mon, 15 Apr 2019 12:50:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=OBUwfFByNkIJN369q0YNZdQ6BE1+XopQkN/7N/PNKUQ=; b=jDFWIRX6Oz8s8QGYSGx7moE6BvJxZ2hXTb3DcUWot0Pk1zybOeHr5Bm0g5WlirFE0U 7IffdIa5p1uVlg/tTr8AG9AZJe2RIpzFRedkKmZHTgf1W//nddo7a2mz0rEU9iL1fz+w 91xllKa+9doQJJtoWj8G112hBfXb4GR3iFx3/gI6rBVtVmiK8YMs1g8kUK+4Rin77u72 tOGczYtVN8fdXftIH13dVb0k0/SG+q7x3ohC4NS7Ry3NPY6VZ8GSeNG57Z+kH/ljXA2q ZXcRuN+K66RtEljmC6dHEnv4RYNNBja1b+v1ogOOwZMA4wmUDTQj3HDkk/yFYc3uPmQi FnBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=OBUwfFByNkIJN369q0YNZdQ6BE1+XopQkN/7N/PNKUQ=; b=Yk+Zr0LK/NWUXuFCQ6LpGuzREoOTWT7gR7y2e0XPxRnCVfMSD8iqxR1SJFvxuwhYHq amab6vybKJq1d1VIkRnjk35FGaCEjE1SQqNZZ0ufu6yAcRGuexaWd2RSWhAjiO2xo9z4 kLL4f/GVPFf+5MGaYb0++p9M/dmhNG5r75OUWdPfAFHzmbWo6k3s83FGxIF6And1gH+4 sJRRjQBcB+34ZTzzwc2JNUxpYCtnF7CkXOr34wx8CY6i5lvaSTfuecaO9GgyIClixhbZ oK3v51YoIPNtHuycimHa+uFLYfw6YfQbiVx1eBmzM81BpYPRUvpxO1wnlw+0mgED58RG FBsA== X-Gm-Message-State: APjAAAVHKGP+VtfDoxF7KUeiGK6kcqVJ9X2QKc7n6c+snCJEqpoXLHM2 5htSJDMDKYITYTndEGaK4SVyIuBT6pijdy70nK37vu2GowM4nQ== X-Google-Smtp-Source: APXvYqyZHlYVBQVSsawd0mUMvNBfFCgu6JXbhvk49wMNDBpxf8Z1INu1nUNpZKZpEaxs5Acdf/gos7N9M4AcqFC/0kg= X-Received: by 2002:a02:9042:: with SMTP id y2mr52940659jaf.113.1555357821527; Mon, 15 Apr 2019 12:50:21 -0700 (PDT) MIME-Version: 1.0 References: <20190409003327.3797-1-jeremy.linton@arm.com> In-Reply-To: <20190409003327.3797-1-jeremy.linton@arm.com> From: "Ard Biesheuvel" Date: Mon, 15 Apr 2019 12:50:10 -0700 Message-ID: Subject: Re: [edk2-devel] [PATCH] Marvell/Armada7k8k: Remove SPCR baud rate setting To: edk2-devel-groups-io , Jeremy Linton Cc: Marcin Wojtas , Leif Lindholm , "Kinney, Michael D" Content-Type: text/plain; charset="UTF-8" On Mon, 8 Apr 2019 at 17:33, Jeremy Linton wrote: > > The mcbin (and likely others) have a nonstandard uart clock. > This means that the earlycon programming will incorrectly set > the baud rate if it is specified. The way around this is to tell > the kernel to continue using the preprogrammed baud rate. This > is done by setting the baud to 0. > > Further, the SPCR and DSDT serial port need to match the port > address and port access type for the kernel to conclude they > are the same. > > So while ARM_GAS32 is correct for earlycon (it can be used alone > on the kernel command line) by providing the reg-shift=2 value, > it also sets the io type to MMIO32, which doesn't match the DSDT > defined MMIO. This means that the actual console will never appear. > The obvious fix is to set reg-width=4 in DSDT, but that also changes > the accesssors to 32-bits (similarly to earlycon) and results in > console failure. > Given the breakage on the BSDs and Marcin's followup patch, I'd like to understand why this breaks. To me, it seems we are conflating register bit width with minimum access size. However, as far as I can tell, mmio32 sets both the register width and access size to 32 bits. So is the reason that it works for earlycon that we only use it for output? > So the less obvious fix, is to use the GAS8 specifier. This means > that earlycon needs to be fully specified as > earlycon=uart,mmio32,0xf0512000, but has the extremely useful feature > that the console default works without any user interaction. > > If in the future marvell decides to define their own ACPI id for the > console and upstream a quirk, the ARM_GAS8 portion of this should > be reverted. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Jeremy Linton > --- > Silicon/Marvell/Armada7k8k/AcpiTables/Spcr.aslc | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Spcr.aslc b/Silicon/Marvell/Armada7k8k/AcpiTables/Spcr.aslc > index e78bb9036f..06c7af069c 100644 > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Spcr.aslc > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Spcr.aslc > @@ -30,11 +30,11 @@ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = { > { EFI_ACPI_RESERVED_BYTE, > EFI_ACPI_RESERVED_BYTE, > EFI_ACPI_RESERVED_BYTE }, // Reserved1[3] > - ARM_GAS32 (FixedPcdGet64(PcdSerialRegisterBase)), // BaseAddress > + ARM_GAS8 (FixedPcdGet64(PcdSerialRegisterBase)), // BaseAddress > EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC, // InterruptType > 0, // Irq > 51, // GlobalSystemInterrupt > - EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200, // BaudRate > + 0, // Keep Firmware Baud > EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY, // Parity > EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1, // StopBits > 0, // FlowControl > -- > 2.20.1 > > > ------------ > Groups.io Links: You receive all messages sent to this group. > > View/Reply Online (#38670): https://edk2.groups.io/g/devel/message/38670 > Mute This Topic: https://groups.io/mt/30980002/1761188 > Group Owner: devel+owner@edk2.groups.io > Unsubscribe: https://edk2.groups.io/g/devel/unsub [ard.biesheuvel@linaro.org] > ------------ >