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From: "Ard Biesheuvel" <ard.biesheuvel@linaro.org>
To: Pete Batard <pete@akeo.ie>
Cc: edk2-devel-groups-io <devel@edk2.groups.io>,
	"Leif Lindholm" <leif.lindholm@linaro.org>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>,
	samer.el-haj-mahmoud@arm.com,
	"Andrei E. Warkentin" <andrey.warkentin@gmail.com>
Subject: Re: [edk2-platforms][PATCH 1/5] Silicon/Bcm283x: Clean up Bcm2836.h header
Date: Wed, 27 Nov 2019 13:48:51 +0100	[thread overview]
Message-ID: <CAKv+Gu_gkmChWY0JJwokefgGyA5ftohCaOxU_njdXzed0UWnMw@mail.gmail.com> (raw)
In-Reply-To: <20191127123706.4604-2-pete@akeo.ie>

On Wed, 27 Nov 2019 at 13:37, Pete Batard <pete@akeo.ie> wrote:
>
> Add missing RNG registers, prefer reusing shorter define's
> instead of PCDs and clean up spacing.
>

Is there a source for these register definitions? It seems the Linux
driver deviates from the below (and the warmup count thing uses the
status register as well), so it would be helpful to quote the
authoritative reference here.


> Signed-off-by: Pete Batard <pete@akeo.ie>
> ---
>  Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h | 23 ++++++++++++--------
>  1 file changed, 14 insertions(+), 9 deletions(-)
>
> diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
> index 72c8e9dc4b14..744c7ac3b9f4 100644
> --- a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
> +++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
> @@ -24,8 +24,7 @@
>
>  /* watchdog constants */
>  #define BCM2836_WDOG_OFFSET                                 0x00100000
> -#define BCM2836_WDOG_BASE_ADDRESS                           (FixedPcdGet64 (PcdBcm283xRegistersAddress) \
> -                                                            + BCM2836_WDOG_OFFSET)
> +#define BCM2836_WDOG_BASE_ADDRESS                           (BCM2836_SOC_REGISTERS + BCM2836_WDOG_OFFSET)
>  #define BCM2836_WDOG_PASSWORD                               0x5a000000
>  #define BCM2836_WDOG_RSTC_OFFSET                            0x0000001c
>  #define BCM2836_WDOG_WDOG_OFFSET                            0x00000024
> @@ -34,8 +33,7 @@
>
>  /* mailbox interface constants */
>  #define BCM2836_MBOX_OFFSET                                 0x0000b880
> -#define BCM2836_MBOX_BASE_ADDRESS                           (FixedPcdGet64 (PcdBcm283xRegistersAddress) \
> -                                                            + BCM2836_MBOX_OFFSET)
> +#define BCM2836_MBOX_BASE_ADDRESS                           (BCM2836_SOC_REGISTERS + BCM2836_MBOX_OFFSET)
>  #define BCM2836_MBOX_READ_OFFSET                            0x00000000
>  #define BCM2836_MBOX_STATUS_OFFSET                          0x00000018
>  #define BCM2836_MBOX_CONFIG_OFFSET                          0x0000001c
> @@ -51,12 +49,19 @@
>  #define BCM2836_INTC_TIMER_PENDING_OFFSET                   0x00000060
>
>  /* random number generator */
> -#define RNG_BASE_ADDRESS   (BCM2836_SOC_REGISTERS + 0x00104000)
> +#define BCM2836_RNG_OFFSET                                  0x00104000
> +#define RNG_BASE_ADDRESS                                    (BCM2836_SOC_REGISTERS + BCM2836_RNG_OFFSET)
>
> -#define RNG_CTRL           (RNG_BASE_ADDRESS + 0x0)
> -#define RNG_STATUS         (RNG_BASE_ADDRESS + 0x4)
> -#define RNG_DATA           (RNG_BASE_ADDRESS + 0x8)
> +#define RNG_CTRL                                            (RNG_BASE_ADDRESS + 0x0)
> +#define RNG_STATUS                                          (RNG_BASE_ADDRESS + 0x4)
> +#define RNG_DATA                                            (RNG_BASE_ADDRESS + 0x8)
> +#define RNG_BIT_COUNT                                       (RNG_BASE_ADDRESS + 0xc)
> +#define RNG_BIT_COUNT_THRESHOLD                             (RNG_BASE_ADDRESS + 0x10)
> +#define RNG_INT_STATUS                                      (RNG_BASE_ADDRESS + 0x18)
> +#define RNG_INT_ENABLE                                      (RNG_BASE_ADDRESS + 0x1c)
> +#define RNG_FIFO_DATA                                       (RNG_BASE_ADDRESS + 0x20)
> +#define RNG_FIFO_COUNT                                      (RNG_BASE_ADDRESS + 0x24)
>
> -#define RNG_CTRL_ENABLE    0x1
> +#define RNG_CTRL_ENABLE                                     0x1
>
>  #endif /*__BCM2836_H__ */
> --
> 2.21.0.windows.1
>

  reply	other threads:[~2019-11-27 12:49 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-27 12:37 [edk2-platforms][PATCH 0/5] Further RPi4 support groundwork Pete Batard
2019-11-27 12:37 ` [edk2-platforms][PATCH 1/5] Silicon/Bcm283x: Clean up Bcm2836.h header Pete Batard
2019-11-27 12:48   ` Ard Biesheuvel [this message]
2019-11-27 12:56     ` Pete Batard
2019-11-27 13:00       ` Ard Biesheuvel
2019-11-27 13:09         ` Pete Batard
2019-11-27 13:17           ` Ard Biesheuvel
2019-11-27 13:21             ` Pete Batard
2019-11-27 14:47   ` Philippe Mathieu-Daudé
2019-11-27 14:59     ` [edk2-devel] " Pete Batard
2019-11-27 15:18       ` Philippe Mathieu-Daudé
2019-11-27 12:37 ` [edk2-platforms][PATCH 2/5] Silicon/Bcm283x: Add FIFO mode for RNG Pete Batard
2019-11-27 12:44   ` Ard Biesheuvel
2019-11-27 12:47     ` Pete Batard
2019-11-27 12:37 ` [edk2-platforms][PATCH 3/5] Platform/RPi/MmcDxe: Factorize SCR call and clean up MMC init Pete Batard
2019-11-27 12:37 ` [edk2-platforms][PATCH 4/5] Platform/RPi/MmcDxe: Improve MMC driver stability Pete Batard
2019-11-27 12:37 ` [edk2-platforms][PATCH 5/5] Platform/RPi: Set SD routing according to model Pete Batard
2019-11-27 15:24   ` Philippe Mathieu-Daudé
2019-11-27 16:33     ` Pete Batard
2019-11-27 17:04       ` Leif Lindholm
2019-11-27 17:17         ` Philippe Mathieu-Daudé

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