From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f65.google.com (mail-wm1-f65.google.com [209.85.128.65]) by mx.groups.io with SMTP id smtpd.web12.5612.1574858943698284031 for ; Wed, 27 Nov 2019 04:49:04 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=QBj7/U4S; spf=pass (domain: linaro.org, ip: 209.85.128.65, mailfrom: ard.biesheuvel@linaro.org) Received: by mail-wm1-f65.google.com with SMTP id f129so7342293wmf.2 for ; Wed, 27 Nov 2019 04:49:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=xODzWm/MDVCJKILMNp8X7dwRqp80IWvfERPi7/Jfivk=; b=QBj7/U4SRNw+lFmrq+BkTqCNvb/KjOXkdp95bMdImeKJGug/G7Ikv4YUxpwA7qfOFa i+N3u2PXCWgXMY8un24lQLZXHuCo3n7eSDft87FAoy6x48DAJVZPrrgMyoJrDsSHfGcH 0YePb0h80gXIL2DdGP2ZWt7ph0Ma18f46AIiBXynhN7OmJZVxEQsATjA5KI76ZfsGfaN GbEj9adCq8VFEPnyeQeuKUCA0piFMwpqsSabpQV2qpzMhYrpXBbI/XpZ5GuYOyIUYOlN g3EMcXQdVk8OU1+KbsDcb3R/pnFhgG8f/bvNMp8hEvur6ElM2C9Rf9vqAGj5E8u2oWcI as5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=xODzWm/MDVCJKILMNp8X7dwRqp80IWvfERPi7/Jfivk=; b=Oay5Pti/eRbcJbTesyOFRm06g5pz1GYUa/Tjrw6niQnyfEzi4Gd0F2Pue1f4bCswQ0 /7hs1yuAa6x9XBO5KbCOPYxJOgPhiL3UxYx5uwSzCEfujW1Aa4Vov0frSRU8+H/xuRlm eYjnZY4x8iI0BZ9WUSYVfjIo2D6AZMFfYG4GMwyG6/4xfVwfNWpKC/oXl9R9RzTNXM5o NcPeq2GNBvnV8K2hcPAtFGIqldR9icaZMNJSBgWiUlGwO80iVNQmBCsIsZJCC4Qdxap8 Vo2/d1JU3YLdUHOPOz5/aXkyAOuUjGr5mblhSq8LachhkB77kRpmGdHkEjCEh4Kp5veN UApQ== X-Gm-Message-State: APjAAAVE0zplOXd2RL2g1JBEbicu76DSqcXrK2O2mbnzorKQPEp3AlPs Z7dNN+vg022MNSwcdsgCjga43O5bHLizwjjUhYA2ig== X-Google-Smtp-Source: APXvYqwbWm3nfARDka8lRmJj4QtrrEUoroLRMjcIqm/cfzHikem68BJ/AcXvJKSs/i7Qh+SPIa4ILyocYrX5jDbrqcE= X-Received: by 2002:a1c:3d08:: with SMTP id k8mr4024543wma.119.1574858942243; Wed, 27 Nov 2019 04:49:02 -0800 (PST) MIME-Version: 1.0 References: <20191127123706.4604-1-pete@akeo.ie> <20191127123706.4604-2-pete@akeo.ie> In-Reply-To: <20191127123706.4604-2-pete@akeo.ie> From: "Ard Biesheuvel" Date: Wed, 27 Nov 2019 13:48:51 +0100 Message-ID: Subject: Re: [edk2-platforms][PATCH 1/5] Silicon/Bcm283x: Clean up Bcm2836.h header To: Pete Batard Cc: edk2-devel-groups-io , Leif Lindholm , =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= , samer.el-haj-mahmoud@arm.com, "Andrei E. Warkentin" Content-Type: text/plain; charset="UTF-8" On Wed, 27 Nov 2019 at 13:37, Pete Batard wrote: > > Add missing RNG registers, prefer reusing shorter define's > instead of PCDs and clean up spacing. > Is there a source for these register definitions? It seems the Linux driver deviates from the below (and the warmup count thing uses the status register as well), so it would be helpful to quote the authoritative reference here. > Signed-off-by: Pete Batard > --- > Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h | 23 ++++++++++++-------- > 1 file changed, 14 insertions(+), 9 deletions(-) > > diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h > index 72c8e9dc4b14..744c7ac3b9f4 100644 > --- a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h > +++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h > @@ -24,8 +24,7 @@ > > /* watchdog constants */ > #define BCM2836_WDOG_OFFSET 0x00100000 > -#define BCM2836_WDOG_BASE_ADDRESS (FixedPcdGet64 (PcdBcm283xRegistersAddress) \ > - + BCM2836_WDOG_OFFSET) > +#define BCM2836_WDOG_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_WDOG_OFFSET) > #define BCM2836_WDOG_PASSWORD 0x5a000000 > #define BCM2836_WDOG_RSTC_OFFSET 0x0000001c > #define BCM2836_WDOG_WDOG_OFFSET 0x00000024 > @@ -34,8 +33,7 @@ > > /* mailbox interface constants */ > #define BCM2836_MBOX_OFFSET 0x0000b880 > -#define BCM2836_MBOX_BASE_ADDRESS (FixedPcdGet64 (PcdBcm283xRegistersAddress) \ > - + BCM2836_MBOX_OFFSET) > +#define BCM2836_MBOX_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_MBOX_OFFSET) > #define BCM2836_MBOX_READ_OFFSET 0x00000000 > #define BCM2836_MBOX_STATUS_OFFSET 0x00000018 > #define BCM2836_MBOX_CONFIG_OFFSET 0x0000001c > @@ -51,12 +49,19 @@ > #define BCM2836_INTC_TIMER_PENDING_OFFSET 0x00000060 > > /* random number generator */ > -#define RNG_BASE_ADDRESS (BCM2836_SOC_REGISTERS + 0x00104000) > +#define BCM2836_RNG_OFFSET 0x00104000 > +#define RNG_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_RNG_OFFSET) > > -#define RNG_CTRL (RNG_BASE_ADDRESS + 0x0) > -#define RNG_STATUS (RNG_BASE_ADDRESS + 0x4) > -#define RNG_DATA (RNG_BASE_ADDRESS + 0x8) > +#define RNG_CTRL (RNG_BASE_ADDRESS + 0x0) > +#define RNG_STATUS (RNG_BASE_ADDRESS + 0x4) > +#define RNG_DATA (RNG_BASE_ADDRESS + 0x8) > +#define RNG_BIT_COUNT (RNG_BASE_ADDRESS + 0xc) > +#define RNG_BIT_COUNT_THRESHOLD (RNG_BASE_ADDRESS + 0x10) > +#define RNG_INT_STATUS (RNG_BASE_ADDRESS + 0x18) > +#define RNG_INT_ENABLE (RNG_BASE_ADDRESS + 0x1c) > +#define RNG_FIFO_DATA (RNG_BASE_ADDRESS + 0x20) > +#define RNG_FIFO_COUNT (RNG_BASE_ADDRESS + 0x24) > > -#define RNG_CTRL_ENABLE 0x1 > +#define RNG_CTRL_ENABLE 0x1 > > #endif /*__BCM2836_H__ */ > -- > 2.21.0.windows.1 >