From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c06::241; helo=mail-io0-x241.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-io0-x241.google.com (mail-io0-x241.google.com [IPv6:2607:f8b0:4001:c06::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 09D5A210F4BC4 for ; Thu, 7 Jun 2018 06:03:53 -0700 (PDT) Received: by mail-io0-x241.google.com with SMTP id e15-v6so11719963iog.1 for ; Thu, 07 Jun 2018 06:03:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=w90kF+LDiH/UgCOs537+B5er98cUgEsOLmbxbuQgGhA=; b=OGrkzFhqSfuJ09R9K5r/psTn+PVxGX/14n+cr8c7IrFCzBgaYqA5kAmVPdTqqj3IEV x51n+EePze+lB5L83mMqaw2LtJ/9gx4AXuP6Ht0vUq8XC5dIKxSOC4GNioM0SGNf2hqF 95v2ruzBzX4r4dDiYnMU9zwM6q5u9O8R00rGY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=w90kF+LDiH/UgCOs537+B5er98cUgEsOLmbxbuQgGhA=; b=gU2WO15RrMfqw+xqvJ4KobCpmLJ8vx2q6c3yVaFuoRQaQtZzLl24qjGNjKdYnhn6LN lie8YSExiW7uXhJv2JMaKY9i6zBHb3D6zhaiA0xcTTc+dEuMT9dxaHJSV/P3KnUnHkyp +vYFWchDvsOfRQaUvA/lbnf8oPRd19X/kRDykp2w7v51RiaZKzai+b79AMN2sGPWe98r H+RgooW0UQJD7+yDSBUnB5/28q3IC0kpDXGZKW5EmdiO2IsDnh5VCYUnDApBX8m/UrGR 7fI0duoG2ztOCizxYGkCn05Rq1mODW1XsAGz79Sd0HxgbBablUEzi2LD1BXcQzMmT0Cb e5qg== X-Gm-Message-State: APt69E31C1soMX5eAMbx1SnozacMTTgaNjwqorn9h477mSWPo5BbexZa 62GhJzAFv3uFe/AuQxk0rdVdEO6gei3ddFLQ5UhkJh6m7fo= X-Google-Smtp-Source: ADUXVKKlcCB80D5klzxjKwCwkstZtiKTnrUMDx5L0n5yxeVtI4K+bmfQRaRSGzX0J76k1hqEUOKN/aE8a+/n6wzuLhQ= X-Received: by 2002:a6b:dd0b:: with SMTP id f11-v6mr1391685ioc.173.1528376633060; Thu, 07 Jun 2018 06:03:53 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a6b:bbc7:0:0:0:0:0 with HTTP; Thu, 7 Jun 2018 06:03:52 -0700 (PDT) In-Reply-To: <1528376118-19690-1-git-send-email-mw@semihalf.com> References: <1528376118-19690-1-git-send-email-mw@semihalf.com> From: Ard Biesheuvel Date: Thu, 7 Jun 2018 15:03:52 +0200 Message-ID: To: Marcin Wojtas Cc: "edk2-devel@lists.01.org" , Leif Lindholm , =?UTF-8?B?SmFuIETEhWJyb8Wb?= , Hua Jing , Grzegorz Jaszczyk , Nadav Haklai Subject: Re: [platforms PATCH 1/1] Marvell/Drivers: Pp2Dxe: Fix cleaning of the BM pools X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 Jun 2018 13:03:54 -0000 Content-Type: text/plain; charset="UTF-8" On 7 June 2018 at 14:55, Marcin Wojtas wrote: > Hitherto mechanism of using static flag indicating > Buffer Manager disabled state was wrong and resulted > in cleaning only one controller's pools. This caused > bad page state when OS booted and attempted to > use the buffers. > > This patch implements a fix, ensuring all controllers > will clean the Buffer Manager during ExitBootServices. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Marcin Wojtas Reviewed-by: Ard Biesheuvel Pushed as 1e918658459577c6c6a865b835fa9fb460045b6d > --- > Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c | 7 ++++--- > Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.h | 1 + > 2 files changed, 5 insertions(+), 3 deletions(-) > > diff --git a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c > index b0a38b3..3ed10f6 100644 > --- a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c > +++ b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c > @@ -258,6 +258,8 @@ Pp2DxeBmStart ( > } > } > > + Mvpp2Shared->BmEnabled = TRUE; > + > return EFI_SUCCESS; > } > > @@ -669,15 +671,14 @@ Pp2DxeHalt ( > PP2DXE_CONTEXT *Pp2Context = Context; > PP2DXE_PORT *Port = &Pp2Context->Port; > MVPP2_SHARED *Mvpp2Shared = Pp2Context->Port.Priv; > - STATIC BOOLEAN CommonPartHalted = FALSE; > INTN Index; > > - if (!CommonPartHalted) { > + if (Mvpp2Shared->BmEnabled) { > for (Index = 0; Index < MVPP2_MAX_PORT; Index++) { > Mvpp2BmStop(Mvpp2Shared, Index); > } > > - CommonPartHalted = TRUE; > + Mvpp2Shared->BmEnabled = FALSE; > } > > Mvpp2TxqDrainSet(Port, 0, TRUE); > diff --git a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.h b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.h > index 60f40be..b8a5dae 100644 > --- a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.h > +++ b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.h > @@ -290,6 +290,7 @@ typedef struct { > > /* BM pools */ > MVPP2_BMS_POOL *BmPools[MVPP2_MAX_PORT]; > + BOOLEAN BmEnabled; > > /* PRS shadow table */ > MVPP2_PRS_SHADOW *PrsShadow; > -- > 2.7.4 >