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From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Date: Thu, 9 Feb 2017 16:21:22 +0000
Message-ID: <CAKv+Gu_pHd1HpBzEJjTr73JkL3X9RjOVhVVkD5MKDehSUOcMDA@mail.gmail.com>
To: "Yao, Jiewen" <jiewen.yao@intel.com>
Cc: "Tian, Feng" <feng.tian@intel.com>, 
 "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>,
 Leif Lindholm <leif.lindholm@linaro.org>, 
 "Kinney, Michael D" <michael.d.kinney@intel.com>, "Fan,
 Jeff" <jeff.fan@intel.com>, "Zeng, Star" <star.zeng@intel.com>
Subject: Re: [PATCH V3 0/4] DXE Memory Protection
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On 9 February 2017 at 15:28, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
> On 9 February 2017 at 15:27, Yao, Jiewen <jiewen.yao@intel.com> wrote:
>> 1)       That is great. I appreciate your quick response and help.
>>
>> I will drop my patch for ARM 2/4, and wait for yours.
>>
>
> OK
>
>>
>>
>> 2)       For ImageEnd alignment issue, I agree with you.
>>
>> I plan to round up with:
>>
>> ImageRecord->ImageSize = ALIGN_VALUE(LoadedImage->ImageSize,
>> SectionAlignment);
>>
>> before SetUefiImageProtectionAttributes (ImageRecord, Protect);
>>
>
> Great, that should fix my issue!
>

Actually, does that still work correctly with 64 KB section alignment?
I don't think the PE/COFF loader rounds up the allocation to section
alignment, does it?