From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: Heyi Guo <heyi.guo@linaro.org>
Cc: "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>,
Leif Lindholm <leif.lindholm@linaro.org>,
Michael D Kinney <michael.d.kinney@intel.com>,
Haojian Zhuang <haojian.zhuang@linaro.org>
Subject: Re: [PATCH edk2-platforms 10/12] Hisilicon/D0x: Switch to generic PciHostBridge driver
Date: Fri, 30 Mar 2018 16:34:05 +0100 [thread overview]
Message-ID: <CAKv+Gu_rXn8Aw1AseEwj7FNE1PntOtt2ZBVZD1A2nXcUrtqtBA@mail.gmail.com> (raw)
In-Reply-To: <1521594198-52523-11-git-send-email-heyi.guo@linaro.org>
On 21 March 2018 at 01:03, Heyi Guo <heyi.guo@linaro.org> wrote:
> Address translation support is added to generic PciHostBridge driver
> in edk2 by commit 74d0a33, so we can switch to it for Hisilicon D03
> and D05 which are using address translation between device address and
> host address for resource BAR.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Cc: Leif Lindholm <leif.lindholm@linaro.org>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
> ---
> Silicon/Hisilicon/Hisilicon.dsc.inc | 6 +++++-
> Platform/Hisilicon/D03/D03.dsc | 6 ++++--
> Platform/Hisilicon/D05/D05.dsc | 6 ++++--
> Platform/Hisilicon/D03/D03.fdf | 3 ++-
> Platform/Hisilicon/D05/D05.fdf | 3 ++-
> 5 files changed, 17 insertions(+), 7 deletions(-)
>
> diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisilicon.dsc.inc
> index 77585933179e..8ee74a830e74 100644
> --- a/Silicon/Hisilicon/Hisilicon.dsc.inc
> +++ b/Silicon/Hisilicon/Hisilicon.dsc.inc
> @@ -253,7 +253,11 @@ [PcdsFeatureFlag.common]
>
> [PcdsFixedAtBuild.common]
> gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|44
> - gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0
> + #
> + # IO is mapped to memory space, so we use the same size of
> + # PcdPrePiCpuMemorySize
> + #
> + gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|44
As noted in reply to the previous patches, I think we should avoid 1:1
mapping the I/O space like this.
20 bits of I/O space should be plenty, i.e., up to 16 segments using
64 KB of I/O space each.
> gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000
> gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000
> gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000
> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
> index 0b2bd29cdf83..26081a33a00a 100644
> --- a/Platform/Hisilicon/D03/D03.dsc
> +++ b/Platform/Hisilicon/D03/D03.dsc
> @@ -82,6 +82,8 @@ [LibraryClasses.common]
>
> LpcLib|Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.inf
> SerialPortLib|Silicon/Hisilicon/Hi1610/Library/Uart/LpcSerialPortLib/LpcSerialPortLib.inf
> + PciHostBridgeLib|Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.inf
> + PciSegmentLib|Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/Hi161xPciSegmentLib.inf
>
> ## GIC on D02/D03 is not fully ARM GIC compatible: IRQ cannot be cancelled when
> ## input signal is de-asserted, except for virtual timer interrupt IRQ #27.
> @@ -336,6 +338,7 @@ [Components.common]
> ArmPkg/Drivers/CpuDxe/CpuDxe.inf
> MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
>
> + Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
> Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.inf
>
> Platform/Hisilicon/D03/Drivers/SFC/SfcDxeDriver.inf
> @@ -457,9 +460,8 @@ [Components.common]
> <LibraryClasses>
> NULL|Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.inf
> }
> - Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf {
> + MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
> <LibraryClasses>
> - DmaLib|EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf
> NULL|Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.inf
> }
>
> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
> index 2150a6f4c0e9..d6febf471630 100644
> --- a/Platform/Hisilicon/D05/D05.dsc
> +++ b/Platform/Hisilicon/D05/D05.dsc
> @@ -97,6 +97,8 @@ [LibraryClasses.common]
>
> LpcLib|Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.inf
> SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
> + PciHostBridgeLib|Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.inf
> + PciSegmentLib|Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/Hi161xPciSegmentLib.inf
>
> [LibraryClasses.common.SEC]
> ArmPlatformLib|Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibSec.inf
> @@ -472,6 +474,7 @@ [Components.common]
> ArmPkg/Drivers/CpuDxe/CpuDxe.inf
> MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
>
> + Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
> Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.inf
>
> Platform/Hisilicon/D05/Drivers/SFC/SfcDxeDriver.inf
> @@ -611,9 +614,8 @@ [Components.common]
> <LibraryClasses>
> NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf
> }
> - Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf {
> + MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
> <LibraryClasses>
> - DmaLib|EmbeddedPkg/Library/CoherentDmaLib/CoherentDmaLib.inf
> NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf
> }
>
> diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
> index e430d5c08982..0c843a3ce671 100644
> --- a/Platform/Hisilicon/D03/D03.fdf
> +++ b/Platform/Hisilicon/D03/D03.fdf
> @@ -157,6 +157,7 @@ [FV.FvMain]
> INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
>
> INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
> + INF Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
> INF Platform/Hisilicon/D03/Drivers/SFC/SfcDxeDriver.inf
>
> INF Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.inf
> @@ -263,7 +264,7 @@ [FV.FvMain]
> # PCI Support
> #
> INF Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf
> - INF Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf
> + INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
> INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
>
> INF Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.inf
> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
> index 13a60837a607..b530e8e785a4 100644
> --- a/Platform/Hisilicon/D05/D05.fdf
> +++ b/Platform/Hisilicon/D05/D05.fdf
> @@ -161,6 +161,7 @@ [FV.FvMain]
> INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
>
> INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
> + INF Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
> INF Platform/Hisilicon/D05/Drivers/SFC/SfcDxeDriver.inf
>
> INF Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.inf
> @@ -285,7 +286,7 @@ [FV.FvMain]
> # PCI Support
> #
> INF Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf
> - INF Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf
> + INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
> INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
>
> INF Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.inf
> --
> 2.7.4
>
next prev parent reply other threads:[~2018-03-30 15:34 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-21 1:03 [PATCH edk2-platforms 00/12] Hisilicon/D0x: Switch to generic PciHostBridge Heyi Guo
2018-03-21 1:03 ` [PATCH edk2-platforms 01/12] Hisilicon: Enable WARN and INFO debug message Heyi Guo
2018-03-21 1:03 ` [PATCH edk2-platforms 02/12] Hisilicon/D05/PlatformPciLib: fix misuse of macro Heyi Guo
2018-03-21 1:03 ` [PATCH edk2-platforms 03/12] Hisilicon/Pci: move ATU configuration to PcieInitDxe Heyi Guo
2018-03-30 15:19 ` Ard Biesheuvel
2018-03-21 1:03 ` [PATCH edk2-platforms 04/12] Hisilicon/Pci: Merge PciPlatform into PcieInit Driver Heyi Guo
2018-03-21 1:03 ` [PATCH edk2-platforms 05/12] Hisilicon/Pci: Move EnlargeAtuConfig0() to PcieInitDxe Heyi Guo
2018-03-21 1:03 ` [PATCH edk2-platforms 06/12] Hisilicon/PlatformPciLib: add segment for each root bridge Heyi Guo
2018-03-21 1:03 ` [PATCH edk2-platforms 07/12] Hisilicon: add PciHostBridgeLib Heyi Guo
2018-03-30 15:28 ` Ard Biesheuvel
2018-03-21 1:03 ` [PATCH edk2-platforms 08/12] Hisilicon: add PciCpuIo2Dxe Heyi Guo
2018-03-30 15:30 ` Ard Biesheuvel
2018-03-21 1:03 ` [PATCH edk2-platforms 09/12] Hisilicon: add PciSegmentLib for Hi161x Heyi Guo
2018-03-21 1:03 ` [PATCH edk2-platforms 10/12] Hisilicon/D0x: Switch to generic PciHostBridge driver Heyi Guo
2018-03-30 15:34 ` Ard Biesheuvel [this message]
2018-03-21 1:03 ` [PATCH edk2-platforms 11/12] Hisilicon: remove platform specific PciHostBridge Heyi Guo
2018-03-30 15:37 ` Ard Biesheuvel
2018-03-21 1:03 ` [PATCH edk2-platforms 12/12] Hisilicon/PlatformPciLib: clear redundant felds in RESOURCE_APPETURE Heyi Guo
2018-03-28 1:05 ` [PATCH edk2-platforms 00/12] Hisilicon/D0x: Switch to generic PciHostBridge Guo Heyi
2018-03-28 9:43 ` Ard Biesheuvel
2018-03-29 0:20 ` Guo Heyi
2018-03-30 15:40 ` Ard Biesheuvel
2018-03-31 1:37 ` Guo Heyi
2018-04-13 2:05 ` Guo Heyi
2018-04-13 7:19 ` Ard Biesheuvel
2018-04-16 13:57 ` Guo Heyi
2018-04-17 1:20 ` Guo Heyi
2018-04-17 1:44 ` Guo Heyi
2018-05-31 1:02 ` heyi.guo
2018-06-07 11:11 ` Ard Biesheuvel
2018-06-22 12:58 ` gary guo
2018-06-22 14:08 ` Ard Biesheuvel
2018-06-24 11:22 ` Ard Biesheuvel
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