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From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: Leif Lindholm <leif.lindholm@linaro.org>
Cc: "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>,
	Daniel Thompson <daniel.thompson@linaro.org>,
	 Masami Hiramatsu <masami.hiramatsu@linaro.org>
Subject: Re: [PATCH edk2-platforms 8/8] Silicon/SynQuacer/PlatformDxe: retrain PCIe switch links to Gen2 speed
Date: Tue, 12 Dec 2017 17:51:18 +0000	[thread overview]
Message-ID: <CAKv+Gu_tvXi8kibb=RWqQe4mo9ZSstQECtDgx2S7HBDQgxU_Rg@mail.gmail.com> (raw)
In-Reply-To: <20171212174718.mbbrhh7opjbqmxs6@bivouac.eciton.net>

On 12 December 2017 at 17:47, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> On Tue, Dec 12, 2017 at 10:38:07AM +0000, Ard Biesheuvel wrote:
>> For some reason, the Asmedia 118x PCIe switch needs a little help to
>> make sure that the downstream links train at Gen2 speed. So add a
>> PCI I/O protocol notifier that implements this for each PCIe downstream
>> port that is present on the system.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> ---
>>  Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Pcie.c          | 140 ++++++++++++++++++++
>>  Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c   |  13 +-
>>  Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.h   |  37 ++++++
>>  Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf |   3 +
>>  4 files changed, 184 insertions(+), 9 deletions(-)
>>
>> diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Pcie.c b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Pcie.c
>> new file mode 100644
>> index 000000000000..b069b42d0a42
>> --- /dev/null
>> +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Pcie.c
>
> Bikeshedding time:
> This driver would likely be needed for any other platform including
> this switch as well, right?
>
> While it may be premature to create a standalone driver under
> Silicon/Asmedia ... how about calling this file something to make it
> clear that it is specifically intended to handle Asmedia 118x devices,
> to make it easier* to do so in the future? I.e. Asmedia118x.c?
>
> * by avoiding accruing other random bits of platform-specific PCI
>   hackery in the same file.
>

To be honest, I am not entirely sure. I need this hack for the
standalone card as well as the onboard switch, so it is not related to
a board level defect on developerbox. However, it could be related to
how the Synopsys IP manages the reset and training etc.

But I agree, let's move this to Asmedia118x.c and not create a generic
looking file that invites more PCI quirks to be parked there


  reply	other threads:[~2017-12-12 17:46 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-12 10:37 [PATCH edk2-platforms 0/8] SynQuacer updates Ard Biesheuvel
2017-12-12 10:38 ` [PATCH edk2-platforms 1/8] Silicon/SynQuacer: enable CPU idle states in device tree Ard Biesheuvel
2017-12-12 10:38 ` [PATCH edk2-platforms 2/8] Platform/Socionext/SynQuacer: expose build number as firmware version Ard Biesheuvel
2017-12-12 18:17   ` Leif Lindholm
2017-12-12 18:20     ` Ard Biesheuvel
2017-12-12 18:24       ` Leif Lindholm
2017-12-12 18:28         ` Ard Biesheuvel
2017-12-12 18:33           ` Leif Lindholm
2017-12-12 10:38 ` [PATCH edk2-platforms 3/8] Silicon/SynQuacerPciHostBridgeLib: stall for 150 ms during PERST# Ard Biesheuvel
2017-12-12 17:24   ` Leif Lindholm
2017-12-12 10:38 ` [PATCH edk2-platforms 4/8] Silicon/SynQuacerPciHostBridgeLib: enable RCs based on PCD setting Ard Biesheuvel
2017-12-12 10:38 ` [PATCH edk2-platforms 5/8] Silicon/SynQuacer: disable PCI RC #0 DT node if disabled Ard Biesheuvel
2017-12-12 14:54   ` Ard Biesheuvel
2017-12-12 17:32   ` Leif Lindholm
2017-12-12 17:35     ` Ard Biesheuvel
2017-12-12 17:50       ` Leif Lindholm
2017-12-12 18:09         ` Ard Biesheuvel
2017-12-12 18:15           ` Leif Lindholm
2017-12-12 10:38 ` [PATCH edk2-platforms 6/8] Silicon/SynQuacerEvalBoard: enable PCI #0 only when card is detected Ard Biesheuvel
2017-12-12 10:38 ` [PATCH edk2-platforms 7/8] Silicon/Socionext/SynQuacer/DeviceTree: expose SCP serial port to the OS Ard Biesheuvel
2017-12-12 17:37   ` Leif Lindholm
2017-12-12 10:38 ` [PATCH edk2-platforms 8/8] Silicon/SynQuacer/PlatformDxe: retrain PCIe switch links to Gen2 speed Ard Biesheuvel
2017-12-12 17:47   ` Leif Lindholm
2017-12-12 17:51     ` Ard Biesheuvel [this message]
2017-12-12 18:15       ` Leif Lindholm
2017-12-12 18:20 ` [PATCH edk2-platforms 0/8] SynQuacer updates Leif Lindholm
2017-12-12 18:38   ` Ard Biesheuvel

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