From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=yBrqAQ28; spf=pass (domain: linaro.org, ip: 209.85.166.196, mailfrom: ard.biesheuvel@linaro.org) Received: from mail-it1-f196.google.com (mail-it1-f196.google.com [209.85.166.196]) by groups.io with SMTP; Wed, 17 Apr 2019 09:07:45 -0700 Received: by mail-it1-f196.google.com with SMTP id y134so5480355itc.5 for ; Wed, 17 Apr 2019 09:07:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=op+GKmKkJP/Mdpbg7TdJ1CRKqbcSrWeDrGQFx7itDWE=; b=yBrqAQ28Pv43JkFCAiSfXAfz+AuRwUfOWmhZW2T7W0FSsVIjksqi/399mgPYsrh6+W SL6cH1gzfeVDVBJ3+lsLT7ENUm6M/YN8/y9YnXC/HEGn1hIcFO/GbVowttUqF7+35r/M NXD0XjBY4HVklNxKEbuoWL3ZpfbxRt7rP7UJRplszHexe7YjTIFHDVMBQONXLvn5HOPD h6KEUHH7mhEn3eWxLmg+uQuFpzI/xhg3B7oyWLdCv5P3EDJxtrEvQ+s75Op8yxyOzWz8 v3j7kzUv/O8wVGVdhitpDLN7a10afFWX1nGAiEBeQTHdsvwKjOT174ZiMhJDGkYmedCs KcOQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=op+GKmKkJP/Mdpbg7TdJ1CRKqbcSrWeDrGQFx7itDWE=; b=i9d8EyfSHAWVqIv4WYHIgrPQHxzQa9NL89aVVPHu6rYPcz4TK1j8H7p/3uB5nZw8k8 LbIOr8oAuX2VCBSPWdzBVy3Dg2s6/+68OirzQJtTOeNwesuAmLKq9hyST2FUI2udZfnP iJkL0P1LNBDn6nB/fU1nDbOVH1Caz+SIzZ0H785s1M9n+bJaYLP58Utg5MFYUXgCocJN f7CnUqZycckC2dMsMkfbpLdaJh80Jj0OTuvAg3Q9LrrsHPvx4vGoS88vSs7k4KG/IGga RMlVG+er0krWccQqVN348FfmHX29iA+kcn8xm3lYuSVt8lDQ2AUUX+trS21maF4Ou444 5niQ== X-Gm-Message-State: APjAAAUNZaYFSKiu9vm+3NuqsiXEvwg0Y+c3Cw4OlNGMF/bNOmlXBuvB xZtd15j9rnqeE3AXjRtUtlm1LP80vnelZpTYaBY5fA== X-Google-Smtp-Source: APXvYqw+HqkxWkGcXNExkZuA8nkMgIZDuJ/y8UeUgnhcHpXYWBtHq1UxH18qtAkfEcm6DNNjxe5MVspKXmoE/rva+2s= X-Received: by 2002:a24:1312:: with SMTP id 18mr34735298itz.121.1555517264790; Wed, 17 Apr 2019 09:07:44 -0700 (PDT) MIME-Version: 1.0 References: <1555493498-29178-1-git-send-email-mw@semihalf.com> In-Reply-To: <1555493498-29178-1-git-send-email-mw@semihalf.com> From: "Ard Biesheuvel" Date: Wed, 17 Apr 2019 09:07:35 -0700 Message-ID: Subject: Re: [edk2-platforms: PATCH v3 1/1] Marvell/Armada7k8k: Implement PMU interrupt handling To: Marcin Wojtas Cc: edk2-devel-groups-io , Leif Lindholm , =?UTF-8?B?SmFuIETEhWJyb8Wb?= , Grzegorz Jaszczyk , Kostya Porotchkin , Jeremy Linton , Jici Gao Content-Type: text/plain; charset="UTF-8" On Wed, 17 Apr 2019 at 02:32, Marcin Wojtas wrote: > > Generic handling of the PMU interrupts in UEFI and Linux with > ACPI require enabling a dedicated handler in the EL3. > Extend the PlatInitDxe with enabler code. > > Because for DT world the EL3 service must remain disabled, > switch it off in the ExitBootServicesEvent. Its execution > depends on the gEdkiiPlatformHasAcpiGuid status check in the new > gEfiEventReadyToBootGuid routine. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Marcin Wojtas Reviewed-by: Ard Biesheuvel Pushed as df2ad607e1be..af08f2f4d4a3 > --- > Changelog: > v2->v3: > * Invert and add comments in OnReadyToBoot event > * Use ASSERT_EFI_ERROR > * Close OnReadyToBoot event > > Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf | 6 ++ > Silicon/Marvell/Include/IndustryStandard/MvSmc.h | 2 + > Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.c | 88 ++++++++++++++++++++ > 3 files changed, 96 insertions(+) > > diff --git a/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf b/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf > index e707fe9..df10526 100644 > --- a/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf > +++ b/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf > @@ -25,6 +25,7 @@ > PlatInitDxe.c > > [Packages] > + ArmPkg/ArmPkg.dec > EmbeddedPkg/EmbeddedPkg.dec > MdeModulePkg/MdeModulePkg.dec > MdePkg/MdePkg.dec > @@ -32,6 +33,7 @@ > > [LibraryClasses] > ArmadaIcuLib > + ArmSmcLib > ComPhyLib > DebugLib > MppLib > @@ -40,6 +42,10 @@ > UefiDriverEntryPoint > UtmiPhyLib > > +[Guids] > + gEdkiiPlatformHasAcpiGuid > + gEfiEventReadyToBootGuid > + > [Protocols] > gMarvellPlatformInitCompleteProtocolGuid ## PRODUCES > > diff --git a/Silicon/Marvell/Include/IndustryStandard/MvSmc.h b/Silicon/Marvell/Include/IndustryStandard/MvSmc.h > index 0c90f11..e5c89d9 100644 > --- a/Silicon/Marvell/Include/IndustryStandard/MvSmc.h > +++ b/Silicon/Marvell/Include/IndustryStandard/MvSmc.h > @@ -20,5 +20,7 @@ > #define MV_SMC_ID_COMPHY_POWER_OFF 0x82000002 > #define MV_SMC_ID_COMPHY_PLL_LOCK 0x82000003 > #define MV_SMC_ID_DRAM_SIZE 0x82000010 > +#define MV_SMC_ID_PMU_IRQ_ENABLE 0x82000012 > +#define MV_SMC_ID_PMU_IRQ_DISABLE 0x82000013 > > #endif //__MV_SMC_H__ > diff --git a/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.c b/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.c > index 18b6783..30336fe 100644 > --- a/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.c > +++ b/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.c > @@ -12,7 +12,12 @@ > > **/ > > +#include > + > +#include > + > #include > +#include > #include > #include > #include > @@ -21,6 +26,72 @@ > #include > #include > > +STATIC EFI_EVENT mArmada7k8kExitBootServicesEvent; > + > +/** > + Disable extra EL3 handling of the PMU interrupts for DT world. > + > + @param[in] Event Event structure > + @param[in] Context Notification context > + > +**/ > +STATIC > +VOID > +EFIAPI > +Armada7k8kExitBootServicesHandler ( > + IN EFI_EVENT Event, > + IN VOID *Context > + ) > +{ > + ARM_SMC_ARGS SmcRegs = {0}; > + > + SmcRegs.Arg0 = MV_SMC_ID_PMU_IRQ_DISABLE; > + ArmCallSmc (&SmcRegs); > + > + return; > +} > + > +/** > + Check if we boot with DT and trigger EBS event in such case. > + > + @param[in] Event Event structure > + @param[in] Context Notification context > + > +**/ > +STATIC > +VOID > +EFIAPI > +Armada7k8kOnReadyToBootHandler ( > + IN EFI_EVENT Event, > + IN VOID *Context > + ) > +{ > + EFI_STATUS Status; > + VOID *Interface; > + > + /* Ensure the event will be triggered only once. */ > + gBS->CloseEvent (Event); > + > + Status = gBS->LocateProtocol (&gEdkiiPlatformHasAcpiGuid, > + NULL, > + (VOID **)&Interface); > + if (!EFI_ERROR (Status)) { > + /* ACPI is enabled, so leave the current settings intact. */ > + return; > + } > + > + /* > + * In case DT is selected, create EBS event for disabling > + * extra EL3 handling of the PMU interrupts in EL3. > + */ > + Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, > + TPL_NOTIFY, > + Armada7k8kExitBootServicesHandler, > + NULL, > + &mArmada7k8kExitBootServicesEvent); > + ASSERT_EFI_ERROR (Status); > +} > + > EFI_STATUS > EFIAPI > ArmadaPlatInitDxeEntryPoint ( > @@ -28,7 +99,9 @@ ArmadaPlatInitDxeEntryPoint ( > IN EFI_SYSTEM_TABLE *SystemTable > ) > { > + ARM_SMC_ARGS SmcRegs = {0}; > EFI_STATUS Status; > + EFI_EVENT Event; > > DEBUG ((DEBUG_ERROR, "\nArmada Platform Init\n\n")); > > @@ -43,5 +116,20 @@ ArmadaPlatInitDxeEntryPoint ( > MppInitialize (); > ArmadaIcuInitialize (); > > + /* > + * Enable EL3 PMU interrupt handler and > + * register the ReadyToBoot event. > + */ > + SmcRegs.Arg0 = MV_SMC_ID_PMU_IRQ_ENABLE; > + ArmCallSmc (&SmcRegs); > + > + Status = gBS->CreateEventEx (EVT_NOTIFY_SIGNAL, > + TPL_CALLBACK, > + Armada7k8kOnReadyToBootHandler, > + NULL, > + &gEfiEventReadyToBootGuid, > + &Event); > + ASSERT_EFI_ERROR (Status); > + > return EFI_SUCCESS; > } > -- > 2.7.4 >