From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c0b::243; helo=mail-it0-x243.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-it0-x243.google.com (mail-it0-x243.google.com [IPv6:2607:f8b0:4001:c0b::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 24EF422637DCE for ; Thu, 19 Apr 2018 01:16:24 -0700 (PDT) Received: by mail-it0-x243.google.com with SMTP id x144-v6so19875372itc.0 for ; Thu, 19 Apr 2018 01:16:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=97llqLU/tvRL4miIEOHiDcT9YLucMMC9iW8Ki4vPwmw=; b=FSPpO2vjl9G8KVw0kcE0fUKtcBDhFk9O31Bzof9Fo83MT5hurLBT1DQ2xHEInCrkm8 0ffZx8yA9yvD+pziwxZ9qdUTqcaBy1jbzvYalJLoghrbcOXpmfxJI57MRsF7a8MrSEEO i0teTB9/oRrEiZQo9Wdupy8ibJF6B3nG5In/o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=97llqLU/tvRL4miIEOHiDcT9YLucMMC9iW8Ki4vPwmw=; b=WCpB/qfigAJed68A7Q36GrDsZs6fJhXtMRyJ4DCCzkXqOjqGz1/KMqC97gLQsgG5Nk vQnUa9iRXSmBNiMG1VwSq1QzBwqDUq458PM/wpPDF0CzRmNgIgZwebMkiAt66CGi6ytj GwgRH8PlAiipxbjuk3ARmXp2kyZzduVqPRt4P7y75lw/ipRtsV0sPgdBSs4SWWHx0i4D cYNgf9StbfSxNt32iiHUy2UpD//XpGMTgLN75IOGc66UfnKDH+Ds9+Q7FpCwm83lk432 nqIX2D2qBO0YF0EF8tVu4UTVjxpKYyVRZjdSKXm7AlTHUrsFslk5UApoYSSibPp6EiNf GEng== X-Gm-Message-State: ALQs6tB2M3OC5Nz0rsTKeF6wd79vKYhf4d4y9hrQ3qFpmsG6pN7+3SbE v0RTYnMhGOMP0wZwA9dQrNp4brkauUE48LDVn57Cqf1QZYQ= X-Google-Smtp-Source: AIpwx49pDdSZN3RpGDNGvo/EUwWBcYfJ2cOA2qW+vkgje6Voi7id1nvFFRP3K3wo+kpWyTYet4XxPoJ5WYtBlLW4Jmk= X-Received: by 2002:a24:2b0b:: with SMTP id h11-v6mr5649237ita.68.1524125783605; Thu, 19 Apr 2018 01:16:23 -0700 (PDT) MIME-Version: 1.0 Received: by 10.107.187.67 with HTTP; Thu, 19 Apr 2018 01:16:23 -0700 (PDT) In-Reply-To: <20180417060320.29090-1-ard.biesheuvel@linaro.org> References: <20180417060320.29090-1-ard.biesheuvel@linaro.org> From: Ard Biesheuvel Date: Thu, 19 Apr 2018 10:16:23 +0200 Message-ID: To: "edk2-devel@lists.01.org" Cc: Leif Lindholm , Marc Zyngier , Laszlo Ersek , Ard Biesheuvel , cross-distro@lists.linaro.org Subject: Re: [PATCH v2] ArmPkg/TimerDxe: remove workaround for KVM timer handling X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 19 Apr 2018 08:16:25 -0000 Content-Type: text/plain; charset="UTF-8" On 17 April 2018 at 08:03, Ard Biesheuvel wrote: > When we first ported EDK2 to KVM/arm, we implemented a workaround for > the quirky timer handling on the KVM side. This has been fixed in > Linux commit f120cd6533d2 ("KVM: arm/arm64: timer: Allow the timer to > control the active state") dated 23 June 2014, which was incorporated > into Linux release 4.3. > > So almost 4 years later, it should be safe to drop this workaround on > the EDK2 side. > > This reverts commit b1a633434ddc. > > Cc: cross-distro@lists.linaro.org > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel > Acked-by: Marc Zyngier > Reviewed-by: Leif Lindholm > Acked-by: Laszlo Ersek Pushed as 411a373ed6426fb1bff253905b6a59ada44e18ad Thanks all > --- > v2: add acks > > Note to cross-distro readers: this means guest firmware built with this patch > will not work on KVM/ARM hosts using kernel v4.2 or earlier. > > ArmPkg/Drivers/TimerDxe/TimerDxe.c | 1 - > ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.c | 10 ---------- > 2 files changed, 11 deletions(-) > > diff --git a/ArmPkg/Drivers/TimerDxe/TimerDxe.c b/ArmPkg/Drivers/TimerDxe/TimerDxe.c > index a3202fa056f3..bd616d2efc73 100644 > --- a/ArmPkg/Drivers/TimerDxe/TimerDxe.c > +++ b/ArmPkg/Drivers/TimerDxe/TimerDxe.c > @@ -337,7 +337,6 @@ TimerInterruptHandler ( > > // Set next compare value > ArmGenericTimerSetCompareVal (CompareValue); > - ArmGenericTimerEnableTimer (); > ArmInstructionSynchronizationBarrier (); > } > > diff --git a/ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.c b/ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.c > index 69a4ceb62db6..c941895a3574 100644 > --- a/ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.c > +++ b/ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.c > @@ -26,16 +26,6 @@ ArmGenericTimerEnableTimer ( > > TimerCtrlReg = ArmReadCntvCtl (); > TimerCtrlReg |= ARM_ARCH_TIMER_ENABLE; > - > - // > - // When running under KVM, we need to unmask the interrupt on the timer side > - // as KVM will mask it when servicing the interrupt at the hypervisor level > - // and delivering the virtual timer interrupt to the guest. Otherwise, the > - // interrupt will fire again, trapping into the hypervisor again, etc. etc. > - // This is scheduled to be fixed on the KVM side, but there is no harm in > - // leaving this in once KVM gets fixed. > - // > - TimerCtrlReg &= ~ARM_ARCH_TIMER_IMASK; > ArmWriteCntvCtl (TimerCtrlReg); > } > > -- > 2.17.0 >