From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-yb1-f179.google.com (mail-yb1-f179.google.com [209.85.219.179]) by mx.groups.io with SMTP id smtpd.web10.1357.1613675267024587548 for ; Thu, 18 Feb 2021 11:07:47 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=u6NqJ8kT; spf=pass (domain: nuviainc.com, ip: 209.85.219.179, mailfrom: leif@nuviainc.com) Received: by mail-yb1-f179.google.com with SMTP id x19so3236659ybe.0 for ; Thu, 18 Feb 2021 11:07:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=tboMwfiZ1PAIRDuY4Dmt1cC18xTSAH294ifU7OGzpyg=; b=u6NqJ8kTDL8WTOzsFJ+UTHqPbTwctuZb6mlI6nobR0wVscOJsCdWbIwxjIgHUxCSLI cHwaXfiayQyMWUX9b+ghuzR5xAOQ65aq9I5lUqnyMeuA3mDgLyr9Eex21CJ6y868Ec06 qPmGlptq36++F2sXynYCNh5y02eEMWHM1a/7W8iWrO8RCWzLss/QYOadjF8+t2Ueh0/0 G64aVqSKdwHPLkbTUb2/WL94m9Cs/9miwi03hG5zPlz8dNqUmTc80Kp8zSs+MM/HynZh dSeIyvvVI6Ib44eJCESOGlt2dMboTW07g8ThXBmg8vqKcQJbvfpMglujjrsCam4yuEbb T0jg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=tboMwfiZ1PAIRDuY4Dmt1cC18xTSAH294ifU7OGzpyg=; b=PX3+GsF3N2nI37+A/b9MgQjGXi5aT4i/ibl185TNthQgNIC6uqXBDxN6vTUVXoENuq iKZoeHjh6LemkaFupC80nvfZ5FWBe0/CpvfQxUmw9NwL+GzSTfddhrj6PzxrKBQgFuAH 7wq3JAWgPuBhtqvuxMUfL9Z8UTT7UwysBuz0ixINWSwhbESkDajNoSCoaKg8/PKfufrm SuwwWgN6swqIxfi8VoyXoymiXFkZZe3LVuNL7MStgffps/+oqekVugo52iqNil23hyDf uBJfQ1T5ziWIwp0f8FmOQ5s0UoGcPzFVfSgZhjGCySP6120CvBnLtXD9BXGc74I/sLp+ AVYw== X-Gm-Message-State: AOAM533dHI65NljG1vB9OTKPim72uxfk5e4JnmB7CLj0zu2EISOBTR+h BsoYkNPygfWCPYCjPc2fnKTL+ypyDPKJ0Ea5cwKRS9FcIp62ug== X-Google-Smtp-Source: ABdhPJwfT3tUf5Hee9sS7PFSTdsIoRHJv/EzYmhr4a3Hci9fhqMbLC5vgHkzGGH+g5cSey1r7xwRMaZkAPyIoojJWsE= X-Received: by 2002:a25:374a:: with SMTP id e71mr8364918yba.1.1613675265867; Thu, 18 Feb 2021 11:07:45 -0800 (PST) MIME-Version: 1.0 References: <20210205100630.46848-1-jialing@phytium.com.cn> <20210205100630.46848-13-jialing@phytium.com.cn> <20210210152445.GM1664@vanye> <72049081.46d8.177b3090560.Coremail.jialing@phytium.com.cn> In-Reply-To: <72049081.46d8.177b3090560.Coremail.jialing@phytium.com.cn> From: "Leif Lindholm" Date: Thu, 18 Feb 2021 19:07:33 +0000 Message-ID: Subject: Re: [PATCH v1 01/10] Silicon/Phytium: Added PlatformLib to FT2000/4 To: =?UTF-8?B?6LS+546y?= Cc: edk2-devel-groups-io , =?UTF-8?B?6IiS5aWV5qOL?= , =?UTF-8?B?6LCi6bmP?= Content-Type: multipart/alternative; boundary="00000000000001578505bba10d04" --00000000000001578505bba10d04 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Ling, My comments are included inline in the replies, please scroll down to find them. I had some minor further comments on some of the early patches, and some more detailed comments on things like the flash driver that I did not review for v1. For any patches where I added Reviewed-by: Leif Lindholm please include this in the commit message of that patch for v3, just below your Signed-off-by. That patch is now considered done. When there are no further comments below, I end with: / Leif Just like here :) On Thu, Feb 18, 2021 at 2:47 AM =E8=B4=BE=E7=8E=B2 = wrote: > Hi Leif, > > Thank you for your reply. I'm glad to hear from you! > > I received a total of ten replies, and the contents of the reply seems to > be quoted from the original. Is there any problems with our code > submission? Please advise us what to do next. Thank you very much! > > Best Regards, > > Ling > > > > -----=E5=8E=9F=E5=A7=8B=E9=82=AE=E4=BB=B6----- > > =E5=8F=91=E4=BB=B6=E4=BA=BA: "Leif Lindholm" > > =E5=8F=91=E9=80=81=E6=97=B6=E9=97=B4: 2021-02-10 23:24:45 (=E6=98=9F=E6= =9C=9F=E4=B8=89) > > =E6=94=B6=E4=BB=B6=E4=BA=BA: "Ling Jia" > > =E6=8A=84=E9=80=81: devel@edk2.groups.io > > =E4=B8=BB=E9=A2=98: Re: [PATCH v1 01/10] Silicon/Phytium: Added Platfor= mLib to FT2000/4 > > > > On Fri, Feb 05, 2021 at 18:06:21 +0800, Ling Jia wrote: > > > The PlatformLib supported the system > > > library for FT2000/4 chip. > > > Platform/Phytium: Added the dsc and fdf files of DurianPkg. > > > > > > Signed-off-by: Ling Jia > > > --- > > > Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec > | 41 +++ > > > Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dsc.inc > | 345 ++++++++++++++++++++ > > > Platform/Phytium/DurianPkg/DurianPkg.dsc > | 278 ++++++++++++++++ > > > Platform/Phytium/DurianPkg/DurianPkg.fdf > | 199 +++++++++++ > > > Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib.inf > | 55 ++++ > > > Silicon/Phytium/PhytiumCommonPkg/Include/SystemServiceInterface.h > | 112 +++++++ > > > Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib.c > | 137 ++++++++ > > > Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLibMem.c > | 156 +++++++++ > > > > Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/AArch64/PhytiumPlatformHe= lper.S > | 76 +++++ > > > Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.fdf.inc > | 119 +++++++ > > > 10 files changed, 1518 insertions(+) > > > > > > diff --git a/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec > b/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec > > > new file mode 100644 > > > index 000000000000..48f430c88de6 > > > --- /dev/null > > > +++ b/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec > > > @@ -0,0 +1,41 @@ > > > +## @file > > > +# This package provides common Phytium silicon modules. > > > +# > > > +# Copyright (C) 2020, Phytium Technology Co,Ltd. All rights reserved= . > > > +# > > > +# SPDX-License-Identifier:BSD-2-Clause-Patent > > > +# > > > +## > > > + > > > +[Defines] > > > + DEC_SPECIFICATION =3D 0x0001001b > > > + PACKAGE_NAME =3D PhytiumCommnonPkg > > > + PACKAGE_GUID =3D > b34af0b4-3e7c-11eb-a9d0-0738806d2dec > > > + PACKAGE_VERSION =3D 0.1 > > > + > > > > +########################################################################= ######## > > > +# > > > +# Include Section - list of Include Paths that are provided by this > package. > > > +# Comments are used for Keywords and Module Types. > > > +# > > > +# Supported Module Types: > > > +# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER > DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION > > > +# > > > > +########################################################################= ######## > > > +[Includes] > > > + Include # Root include for the package > > > + > > > +[Guids.common] > > > + gPhytiumPlatformTokenSpaceGuid =3D { 0x8c3abed4, 0x1fc8, 0x46d3, { > 0xb4, 0x17, 0xa3, 0x22, 0x38, 0x14, 0xde, 0x76 } } > > > + > > > +[PcdsFixedAtBuild.common] > > > + gPhytiumPlatformTokenSpaceGuid.PcdSystemIoBase|0x0|UINT64|0x000000= 00 > > > + gPhytiumPlatformTokenSpaceGuid.PcdSystemIoSize|0x0|UINT64|0x000000= 01 > > > + > > > + # > > > + # PCI configuration address space > > > + # > > > + > gPhytiumPlatformTokenSpaceGuid.PcdPciConfigBase|0x0|UINT64|0x00000002 > > > + > gPhytiumPlatformTokenSpaceGuid.PcdPciConfigSize|0x0|UINT64|0x00000003 > > > + > > > +[Protocols] > > > diff --git a/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dsc.in= c > b/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dsc.inc > > > new file mode 100644 > > > index 000000000000..121fe0e7c549 > > > --- /dev/null > > > +++ b/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dsc.inc > > > @@ -0,0 +1,345 @@ > > > +## @file > > > +# This package provides common open source Phytium silicon modules. > > > +# > > > +# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights reserve= d. > > > +# > > > +# SPDX-License-Identifier:BSD-2-Clause-Patent > > > +# > > > +## > > > + > > > + > > > +[LibraryClasses.common] > > > + # > > > + # ARM Architectural Libraries > > > + # > > > + > ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.i= nf > > > + ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf > > > + ArmGicArchLib|ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf > > > + > ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatfor= mStackLib.inf > > > + ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf > > > + > ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/Arm= GenericTimerPhyCounterLib.inf > > > + ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf > > > + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf > > > + > > > + AcpiLib|EmbeddedPkg/Library/AcpiLib/AcpiLib.inf > > > + > AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLibN= ull.inf > > > + > > > + BaseLib|MdePkg/Library/BaseLib/BaseLib.inf > > > + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf > > > + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf > > > + BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf > > > + > BmpSupportLib|MdeModulePkg/Library/BaseBmpSupportLib/BaseBmpSupportLib.in= f > > > + > > > + > CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf > > > + CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > > > + > CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf > > > + > CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMainten= anceLib.inf > > > + > CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/Customized= DisplayLib.inf > > > + !if $(TARGET) =3D=3D RELEASE > > > + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf > > > + !else > > > + > DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf > > > + !endif > > > + > > > + DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.i= nf > > > + > DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLi= b.inf > > > + > DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDe= bugPrintErrorLevelLib.inf > > > + > DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/Defa= ultExceptionHandlerLib.inf > > > + > DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.in= f > > > + > DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/DebugAgentT= imerLibNull.inf > > > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > > > + > > > + FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf > > > + > FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf > > > + FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.i= nf > > > + > > > + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf > > > + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf > > > + > HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingL= ib.inf > > > + > > > + IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf > > > + IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf > > > + > > > + OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf > > > + > > > + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf > > > + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > > > + > PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCo= ffGetEntryPointLib.inf > > > + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > > > + > PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCo= ffExtraActionLibNull.inf > > > + PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf > > > + > PlatformSecureLib|SecurityPkg/Library/PlatformSecureLibNull/PlatformSecur= eLibNull.inf > > > + > PlatformBootManagerLib|ArmPkg/Library/PlatformBootManagerLib/PlatformBoot= ManagerLib.inf > > > + > PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNu= ll.inf > > > + > > > + RngLib|MdePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf > > > + > ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReport= StatusCodeLibNull.inf > > > + > > > + > SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizat= ionLib.inf > > > + ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf > > > + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf > > > + > ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.= inf > > > + SafeIntLib|MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf > > > + > > > + TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf > > > + > TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasureme= ntLibNull.inf > > > + > > > + UefiLib|MdePkg/Library/UefiLib/UefiLib.inf > > > + UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf > > > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompress= Lib.inf > > > + > UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/Ue= fiRuntimeServicesTableLib.inf > > > + > UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBoot= ServicesTableLib.inf > > > + > UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryP= oint.inf > > > + > UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiAp= plicationEntryPoint.inf > > > + > UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiService= sLib.inf > > > + > UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManage= rLib.inf > > > + > > > + VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf > > > + > VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/Vari= ablePolicyHelperLib.inf > > > + > > > + # > > > + # Scsi Requirements > > > + # > > > + UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf > > > + > > > + # > > > + # USB Requirements > > > + # > > > + UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf > > > + > > > + # > > > + # Networking Requirements > > > + # > > > + DpcLib|NetworkPkg/Library/DxeDpcLib/DxeDpcLib.inf > > > + IpIoLib|NetworkPkg/Library/DxeIpIoLib/DxeIpIoLib.inf > > > + NetLib|NetworkPkg/Library/DxeNetLib/DxeNetLib.inf > > > + UdpIoLib|NetworkPkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf > > > + HttpLib|NetworkPkg/Library/DxeHttpLib/DxeHttpLib.inf > > > + > > > +[LibraryClasses.common.SEC] > > > + ArmGicArchLib|ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf > > > + > DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBa= seLib.inf > > > + > ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/= PrePiExtractGuidedSectionLib.inf > > > + > LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustom= DecompressLib.inf > > > + > MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMem= oryAllocationLib.inf > > > + HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf > > > + PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf > > > + > PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PreP= iHobListPointerLib.inf > > > + > PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.i= nf > > > + > > > +[LibraryClasses.common.SEC, LibraryClasses.common.PEIM] > > > + MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf > > > + > > > +[LibraryClasses.common.DXE_CORE] > > > + > DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf > > > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > > > + > ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtr= actGuidedSectionLib.inf > > > + HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf > > > + > MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCo= reMemoryAllocationLib.inf > > > + > PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerforma= nceLib.inf > > > + > > > +[LibraryClasses.common.DXE_DRIVER] > > > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > > > + > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllo= cationLib.inf > > > + > SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSe= curityManagementLib.inf > > > + > PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.i= nf > > > + > VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLi= b.inf > > > + > > > +[LibraryClasses.common.UEFI_APPLICATION] > > > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > > > + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf > > > + > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllo= cationLib.inf > > > + > > > + # > > > + # UiApp dependencies > > > + # > > > + > FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf > > > + > PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.i= nf > > > + > > > +[LibraryClasses.common.UEFI_DRIVER] > > > + > ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtr= actGuidedSectionLib.inf > > > + > PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.i= nf > > > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > > > + > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllo= cationLib.inf > > > + > > > +[LibraryClasses.common.DXE_RUNTIME_DRIVER] > > > + !if $(SECURE_BOOT_ENABLE) =3D=3D TRUE > > > + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf > > > + !endif > > > + > > > + > CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf > > > + > > > + !if $(TARGET) !=3D RELEASE > > > + > DebugLib|MdePkg/Library/DxeRuntimeDebugLibSerialPort/DxeRuntimeDebugLibSe= rialPort.inf > > > + !endif > > > + > > > + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf > > > + > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllo= cationLib.inf > > > + > ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib/Ru= ntimeDxeReportStatusCodeLib.inf > > > + > VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLi= bRuntimeDxe.inf > > > + > > > +[LibraryClasses.AARCH64.DXE_RUNTIME_DRIVER] > > > + > EfiResetSystemLib|ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystem= Lib.inf > > > + > > > +[LibraryClasses.ARM, LibraryClasses.AARCH64] > > > + NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.in= f > > > + > > > + # > > > + # Add support for GCC stack protector > > > + # > > > + NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf > > > + > > > +[LibraryClasses.common.UEFI_DRIVER, > LibraryClasses.common.UEFI_APPLICATION, > LibraryClasses.common.DXE_RUNTIME_DRIVER, LibraryClasses.common.DXE_DRIVE= R] > > > + PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf > > > + > > > +[BuildOptions] > > > + RVCT:RELEASE_*_*_CC_FLAGS =3D -DMDEPKG_NDEBUG > > > + GCC:RELEASE_*_*_CC_FLAGS =3D -DMDEPKG_NDEBUG > > > + > > > +[BuildOptions.AARCH64.EDKII.DXE_RUNTIME_DRIVER] > > > + GCC:*_*_AARCH64_DLINK_FLAGS =3D -z common-page-size=3D0x10000 > > > + > > > > +########################################################################= ######## > > > +# > > > +# Pcd Section - list of all EDK II PCD Entries defined by this > Platform > > > +# > > > > +########################################################################= ######## > > > + > > > +[PcdsFeatureFlag.common] > > > + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE > > > + gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE > > > + gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|FALSE > > > + gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE > > > + gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE > > > + gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE > > > + > > > + gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob|TR= UE > > > + > > > + gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE > > > + > > > + # Use the Vector Table location in CpuDxe. We will not copy the > Vector Table at PcdCpuVectorBaseAddress > > > + gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE > > > + > > > + gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultLangDeprecate|TRUE > > > + gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE > > > + gEfiMdeModulePkgTokenSpaceGuid.PcdPciBusHotplugDeviceSupport|FALSE > > > + > > > +[PcdsFixedAtBuild.common] > > > + gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000 > > > + gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000 > > > + gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000 > > > + gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000 > > > + gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF > > > + gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0 > > > + gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0 > > > + gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320 > > > + gEfiNetworkPkgTokenSpaceGuid.PcdAllowHttpConnections|TRUE > > > + > > > +!if $(TARGET) =3D=3D RELEASE > > > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x21 > > > +!else > > > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f > > > +!endif > > > + > > > + # DEBUG_INIT 0x00000001 // Initialization > > > + # DEBUG_WARN 0x00000002 // Warnings > > > + # DEBUG_LOAD 0x00000004 // Load events > > > + # DEBUG_FS 0x00000008 // EFI File system > > > + # DEBUG_POOL 0x00000010 // Alloc & Free's > > > + # DEBUG_PAGE 0x00000020 // Alloc & Free's > > > + # DEBUG_INFO 0x00000040 // Verbose > > > + # DEBUG_DISPATCH 0x00000080 // PEI/DXE Dispatchers > > > + # DEBUG_VARIABLE 0x00000100 // Variable > > > + # DEBUG_BM 0x00000400 // Boot Manager > > > + # DEBUG_BLKIO 0x00001000 // BlkIo Driver > > > + # DEBUG_NET 0x00004000 // SNI Driver > > > + # DEBUG_UNDI 0x00010000 // UNDI Driver > > > + # DEBUG_LOADFILE 0x00020000 // UNDI Driver > > > + # DEBUG_EVENT 0x00080000 // Event messages > > > + # DEBUG_GCD 0x00100000 // Global Coherency Database change= s > > > + # DEBUG_CACHE 0x00200000 // Memory range cachability changes > > > + # DEBUG_ERROR 0x80000000 // Error > > > + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000046 > > > + > > > + gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07 > > > + > > > + gEmbeddedTokenSpaceGuid.PcdTimerPeriod|200000 > > > + > > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0 > > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0 > > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|0 > > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|80 > > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|65 > > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|400 > > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|20000 > > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20 > > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0 > > > + > > > + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE > > > + > > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALS= E > > > + > > > +!if $(SECURE_BOOT_ENABLE) =3D=3D TRUE > > > + > gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x04 > > > + > gEfiSecurityPkgTokenSpaceGuid.PcdFixedMediaImageVerificationPolicy|0x04 > > > + > gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy|0x= 04 > > > +!endif > > > + > > > +!if $(SECURE_BOOT_ENABLE) =3D=3D TRUE > > > + gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x10000 > > > +!else > > > + gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x4000 > > > +!endif > > > + > > > + # Default platform supported RFC 4646 languages: English & French = & > Chinese Simplified. > > > + # Default Value of PlatformLangCodes Variable. > > > + > gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultPlatformLangCodes|"en-US;z= h-Hans" > > > + > > > + # Default current RFC 4646 language: Chinese Simplified. > > > + # Default Value of PlatformLang Variable. > > > + gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultPlatformLang|"en-US= " > > > + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4 > > > + > > > + # > > > + # ACPI Table Version > > > + # > > > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20 > > > + > > > + gArmPlatformTokenSpaceGuid.PL011UartInterrupt|67 > > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE > > > + > > > +[PcdsDynamicDefault.common.DEFAULT] > > > + ## This PCD defines the video horizontal resolution. > > > + # This PCD could be set to 0 then video resolution could be at > highest resolution. > > > + gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|640 > > > + ## This PCD defines the video vertical resolution. > > > + # This PCD could be set to 0 then video resolution could be at > highest resolution. > > > + gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|480 > > > + > > > + ## This PCD defines the Console output row and the default value i= s > 80 according to UEFI spec. > > > + # This PCD could be set to 0 then console output could be at max > column and max row. > > > + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|128 > > > + ## This PCD defines the Console output column and the default valu= e > is 25 according to UEFI spec. > > > + # This PCD could be set to 0 then console output could be at max > column and max row. > > > + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|40 > > > + > > > + ## Specify the video horizontal resolution of text setup. > > > + # @Prompt Video Horizontal Resolution of Text Setup > > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution|6= 40 > > > + > > > + ## Specify the video vertical resolution of text setup. > > > + # @Prompt Video Vertical Resolution of Text Setup > > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution|480 > > > + > > > + ## Specify the console output column of text setup. > > > + # @Prompt Console Output Column of Text Setup > > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutColumn|128 > > > + ## Specify the console output row of text setup. > > > + # @Prompt Console Output Row of Text Setup > > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutRow|40 > > > + > > > + ## The number of seconds that the firmware will wait before > initiating the original default boot selection. > > > + # A value of 0 indicates that the default boot selection is to be > initiated immediately on boot. > > > + # The value of 0xFFFF then firmware will wait for user input > before booting. > > > + # @Prompt Boot Timeout (s) > > > + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|5 > > > diff --git a/Platform/Phytium/DurianPkg/DurianPkg.dsc > b/Platform/Phytium/DurianPkg/DurianPkg.dsc > > > new file mode 100644 > > > index 000000000000..55eafa2e3a83 > > > --- /dev/null > > > +++ b/Platform/Phytium/DurianPkg/DurianPkg.dsc > > > @@ -0,0 +1,278 @@ > > > +## @file > > > +# This package provides common open source Phytium Platform modules. > > > +# > > > +# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights reserve= d. > > > +# > > > +# SPDX-License-Identifier:BSD-2-Clause-Patent > > > +# > > > +## > > > + > > > > +########################################################################= ######## > > > +# > > > +# Defines Section - statements that will be processed to create a > Makefile. > > > +# > > > > +########################################################################= ######## > > > +[Defines] > > > + PLATFORM_NAME =3D DurianPkg > > > + PLATFORM_GUID =3D > 8f7ac876-3e7c-11eb-86cb-33f68535d613 > > > + PLATFORM_VERSION =3D 0.1 > > > + DSC_SPECIFICATION =3D 0x0001001c > > > + OUTPUT_DIRECTORY =3D Build/$(PLATFORM_NAME) > > > + SUPPORTED_ARCHITECTURES =3D AARCH64 > > > + BUILD_TARGETS =3D DEBUG|RELEASE|NOOPT > > > + SKUID_IDENTIFIER =3D DEFAULT > > > + FLASH_DEFINITION =3D > Platform/Phytium/DurianPkg/DurianPkg.fdf > > > + > > > +!include Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dsc.inc > > > + > > > +[LibraryClasses.common] > > > + # Phytium Platform library > > > + > ArmPlatformLib|Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLi= b.inf > > > + > > > + # PL011 UART Driver and Dependency Libraries > > > + > SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLi= b.inf > > > + > PL011UartClockLib|ArmPlatformPkg/Library/PL011UartClockLib/PL011UartClock= Lib.inf > > > + PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf > > > + > > > +[LibraryClasses.common.DXE_DRIVER] > > > + > > > + > > > > +########################################################################= ######## > > > +# > > > +# Pcd Section - list of all EDK II PCD Entries defined by this > Platform > > > +# > > > > +########################################################################= ######## > > > +[PcdsFixedAtBuild.common] > > > + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor|L"Durian Platform= " > > > + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"V1.0" > > > + > > > + gArmTokenSpaceGuid.PcdVFPEnabled|1 > > > + gArmTokenSpaceGuid.PcdArmPrimaryCoreMask|0x101 > > > + gArmTokenSpaceGuid.PcdArmPrimaryCore|0x0 > > > + gArmPlatformTokenSpaceGuid.PcdCoreCount|4 > > > + > > > + # > > > + # NV Storage PCDs. > > > + # > > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0xe00000 > > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00010000 > > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0xe10000 > > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00010000 > > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0xe20000 > > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000 > > > + > > > + # Size of the region used by UEFI in permanent memory (Reserved > 64MB) > > > + gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x0400000= 0 > > > + > > > + # > > > + # PL011 - Serial Terminal > > > + # > > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x28001000 > > > + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0 > > > + gArmPlatformTokenSpaceGuid.PL011UartClkInHz|48000000 > > > + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 > > > + > > > + # > > > + # ARM General Interrupt Controller > > > + # > > > + gArmTokenSpaceGuid.PcdGicDistributorBase|0x29900000 > > > + gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x29980000 > > > + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x29c00000 > > > + > > > + # System IO space > > > + gPhytiumPlatformTokenSpaceGuid.PcdSystemIoBase|0x0 > > > + gPhytiumPlatformTokenSpaceGuid.PcdSystemIoSize|0x40000000 > > > + > > > + # > > > + # System Memory (2GB ~ 4GB - 64MB), the top 64MB is reserved for > > > + # PBF(the processor basic firmware, Mainly deals the initializatio= n > > > + # of the chip). > > > + # > > > + gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000 > > > + gArmTokenSpaceGuid.PcdSystemMemorySize|0x7B000000 > > > + > > > + # Stack Size > > > + gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000 > > > + > > > > +########################################################################= ######## > > > +# > > > +# Components Section - list of all EDK II Modules needed by this > Platform > > > +# > > > > +########################################################################= ######## > > > +[Components.common] > > > + # > > > + # PCD database > > > + # > > > + MdeModulePkg/Universal/PCD/Dxe/Pcd.inf > > > + > > > + ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf > > > + ShellPkg/Application/Shell/Shell.inf { > > > + > > > + > ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.= inf > > > + > NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsL= ib.inf > > > + > NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsL= ib.inf > > > + > NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsL= ib.inf > > > + > NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1Command= sLib.inf > > > + > NULL|ShellPkg/Library/UefiShellAcpiViewCommandLib/UefiShellAcpiViewComman= dLib.inf > > > + > NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsL= ib.inf > > > + > NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1Comma= ndsLib.inf > > > + > NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1Comma= ndsLib.inf > > > + > HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingL= ib.inf > > > + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf > > > + > BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgComm= andLib.inf > > > > Due to upstream changes in edk2, you now also need to add > > > OrderedCollectionLib|MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/= BaseOrderedCollectionRedBlackTreeLib.inf > > in this location. > > > > With this: > > Reviewed-by: Leif Lindholm > > > > / > > Leif > > > > > + } > > > + > > > + ArmPlatformPkg/PrePi/PeiMPCore.inf { > > > + > > > + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf > > > + } > > > + > > > + # > > > + # Dxe core entry > > > + # > > > + MdeModulePkg/Core/Dxe/DxeMain.inf { > > > + > > > + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > > > + > NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedS= ectionExtractLib.inf > > > + } > > > + > > > + # > > > + # DXE driver > > > + # > > > + MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf > > > + MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > > > + MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf = { > > > + > > > + NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf > > > + } > > > + > MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf > > > + > > > + # > > > + # Common Arm Timer and Gic Components > > > + # > > > + ArmPkg/Drivers/CpuDxe/CpuDxe.inf > > > + ArmPkg/Drivers/ArmGic/ArmGicDxe.inf > > > + EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf > > > + ArmPkg/Drivers/TimerDxe/TimerDxe.inf > > > + > > > + # > > > + # security system > > > + # > > > + MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf { > > > + > > > + > NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.= inf > > > + } > > > + > > > + # > > > + # network, mod for https boot. > > > + # > > > + NetworkPkg/SnpDxe/SnpDxe.inf > > > + NetworkPkg/DpcDxe/DpcDxe.inf > > > + NetworkPkg/MnpDxe/MnpDxe.inf > > > + NetworkPkg/ArpDxe/ArpDxe.inf > > > + NetworkPkg/Dhcp4Dxe/Dhcp4Dxe.inf > > > + NetworkPkg/Ip4Dxe/Ip4Dxe.inf > > > + NetworkPkg/Mtftp4Dxe/Mtftp4Dxe.inf > > > + NetworkPkg/Udp4Dxe/Udp4Dxe.inf > > > + NetworkPkg/VlanConfigDxe/VlanConfigDxe.inf > > > + > > > + NetworkPkg/Ip6Dxe/Ip6Dxe.inf > > > + NetworkPkg/Udp6Dxe/Udp6Dxe.inf > > > + NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf > > > + NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf > > > + NetworkPkg/TcpDxe/TcpDxe.inf > > > + > > > + NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf > > > + > > > + NetworkPkg/DnsDxe/DnsDxe.inf > > > + NetworkPkg/HttpUtilitiesDxe/HttpUtilitiesDxe.inf > > > + NetworkPkg/HttpDxe/HttpDxe.inf > > > + > > > + # > > > + # FV Filesystem > > > + # > > > + > MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf > > > + > > > + # > > > + # Common Console Components > > > + # ConIn,ConOut,StdErr > > > + MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf > > > + MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf > > > + > MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf > > > + MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf > > > + MdeModulePkg/Universal/SerialDxe/SerialDxe.inf > > > + > > > + > SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe= .inf > > > + > > > + # > > > + # Hii database init > > > + # > > > + MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf > > > + > > > + # > > > + # FAT filesystem + GPT/MBR partitioning > > > + # > > > + MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf > > > + MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf > > > + > MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf > > > + FatPkg/EnhancedFatDxe/Fat.inf > > > + > > > + # > > > + # Generic Watchdog Timer > > > + # > > > + ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf > > > + > > > + # > > > + # Usb Support > > > + # > > > + MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf > > > + MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf > > > + MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf > > > + MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf > > > + MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf > > > + MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf > > > + MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf > > > + > > > + # > > > + # IDE/AHCI Support > > > + # > > > + MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf > > > + MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf > > > + MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf > > > + MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf > > > + MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf > > > + > > > + # > > > + # PCI Support > > > + # > > > + ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf > > > + > MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDevice= Dxe.inf > > > + > > > + # > > > + # The following 2 module perform the same work except one operate > variable. > > > + # Only one of both should be put into fdf. > > > + # > > > + > MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntime= Dxe.inf > > > + > > > + # > > > + # NVME Support > > > + # > > > + MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf > > > + > > > + > > > + # > > > + # Bds > > > + # > > > + MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf > > > + MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf > > > + MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf > > > + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf > > > + MdeModulePkg/Universal/DriverSampleDxe/DriverSampleDxe.inf > > > + MdeModulePkg/Application/UiApp/UiApp.inf { > > > + > > > + > NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf > > > + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.in= f > > > + > NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceMana= gerUiLib.inf > > > + } > > > + MdeModulePkg/Application/BootManagerMenuApp/BootManagerMenuApp.inf > > > + > > > diff --git a/Platform/Phytium/DurianPkg/DurianPkg.fdf > b/Platform/Phytium/DurianPkg/DurianPkg.fdf > > > new file mode 100644 > > > index 000000000000..6470d53532df > > > --- /dev/null > > > +++ b/Platform/Phytium/DurianPkg/DurianPkg.fdf > > > @@ -0,0 +1,199 @@ > > > +## @file > > > +# This package provides common open source Phytium Platform modules. > > > +# > > > +# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights reserve= d. > > > +# > > > +# SPDX-License-Identifier:BSD-2-Clause-Patent > > > +# > > > +## > > > + > > > > +########################################################################= ######## > > > +# > > > +# FD Section > > > +# The [FD] Section is made up of the definition statements and a > > > +# description of what goes into the Flash Device Image. Each FD > section > > > +# defines one flash "device" image. A flash device image may be one > of > > > +# the following: Removable media bootable image (like a boot floppy > > > +# image,) an Option ROM image (that would be "flashed" into an add-i= n > > > +# card,) a System "Flash" image (that would be burned into a system= 's > > > +# flash) or an Update ("Capsule") image that will be used to update > and > > > +# existing system flash. > > > +# > > > > +########################################################################= ######## > > > + > > > +[FD.PHYTIUM] > > > +BaseAddress =3D 0x88000000|gArmTokenSpaceGuid.PcdFdBaseAddress > > > +Size =3D 0x01000000|gArmTokenSpaceGuid.PcdFdSize > > > +ErasePolarity =3D 1 > > > + > > > +# This one is tricky, it must be: BlockSize * NumBlocks =3D Size > > > +BlockSize =3D 0x10000 > > > +NumBlocks =3D 0x100 > > > + > > > > +########################################################################= ######## > > > +# > > > +# Following are lists of FD Region layout which correspond to the > locations of different > > > +# images within the flash device. > > > +# > > > +# Regions must be defined in ascending order and may not overlap. > > > +# > > > +# A Layout Region start with a eight digit hex offset (leading "0x" > required) followed by > > > +# the pipe "|" character, followed by the size of the region, also i= n > hex with the leading > > > +# "0x" characters. Like: > > > +# Offset|Size > > > +# PcdOffsetCName|PcdSizeCName > > > +# RegionType > > > +# > > > > +########################################################################= ######## > > > + > > > +0x00000000|0x200000 > > > +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize > > > +FV =3D FVMAIN_COMPACT > > > + > > > > +########################################################################= ######## > > > +# > > > +# FV Section > > > +# > > > +# [FV] section is used to define what components or modules are > placed within a flash > > > +# device file. This section also defines order the components and > modules are positioned > > > +# within the image. The [FV] section consists of define statements, > set statements and > > > +# module statements. > > > +# > > > > +########################################################################= ######## > > > + > > > +[FV.FvMain] > > > +BlockSize =3D 0x40 > > > +NumBlocks =3D 0 # This FV gets compressed so make i= t > just big enough > > > +FvAlignment =3D 16 # FV alignment and FV attributes > setting. > > > +ERASE_POLARITY =3D 1 > > > +MEMORY_MAPPED =3D TRUE > > > +STICKY_WRITE =3D TRUE > > > +LOCK_CAP =3D TRUE > > > +LOCK_STATUS =3D TRUE > > > +WRITE_DISABLED_CAP =3D TRUE > > > +WRITE_ENABLED_CAP =3D TRUE > > > +WRITE_STATUS =3D TRUE > > > +WRITE_LOCK_CAP =3D TRUE > > > +WRITE_LOCK_STATUS =3D TRUE > > > +READ_DISABLED_CAP =3D TRUE > > > +READ_ENABLED_CAP =3D TRUE > > > +READ_STATUS =3D TRUE > > > +READ_LOCK_CAP =3D TRUE > > > +READ_LOCK_STATUS =3D TRUE > > > + > > > + APRIORI DXE { > > > + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf > > > + } > > > + > > > + INF MdeModulePkg/Core/Dxe/DxeMain.inf > > > + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf > > > + > > > + # > > > + # PI DXE Drivers producing Architectural Protocols (EFI Services) > > > + # > > > + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf > > > + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf > > > + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf > > > + > > > + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > > > + INF > MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntime= Dxe.inf > > > + > > > + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf > > > + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf > > > + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf > > > + INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf > > > + > > > + # > > > + # Variable services > > > + # > > > + INF > MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf > > > + INF > MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf > > > + > > > + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf > > > + > > > + # > > > + # Multiple Console IO support > > > + # > > > + INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.i= nf > > > + INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.i= nf > > > + INF > MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf > > > + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf > > > + INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf > > > + > > > + # > > > + # FAT filesystem + GPT/MBR partitioning > > > + # > > > + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf > > > + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf > > > + INF FatPkg/EnhancedFatDxe/Fat.inf > > > + INF > MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf > > > + > > > + # > > > + # SATA Controller > > > + # > > > + INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf > > > + INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf > > > + INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf > > > + INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf > > > + INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf > > > + > > > + # > > > + # NVMe boot devices > > > + # > > > + INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf > > > + > > > + # > > > + # NetWork > > > + # > > > + INF NetworkPkg/SnpDxe/SnpDxe.inf > > > + INF NetworkPkg/DpcDxe/DpcDxe.inf > > > + INF NetworkPkg/MnpDxe/MnpDxe.inf > > > + INF NetworkPkg/ArpDxe/ArpDxe.inf > > > + INF NetworkPkg/Dhcp4Dxe/Dhcp4Dxe.inf > > > + INF NetworkPkg/Ip4Dxe/Ip4Dxe.inf > > > + INF NetworkPkg/Mtftp4Dxe/Mtftp4Dxe.inf > > > + INF NetworkPkg/Udp4Dxe/Udp4Dxe.inf > > > + INF NetworkPkg/VlanConfigDxe/VlanConfigDxe.inf > > > + > > > + # > > > + # UEFI applications > > > + # > > > + INF ShellPkg/Application/Shell/Shell.inf > > > + > > > + # > > > + # Bds > > > + # > > > + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf > > > + INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf > > > + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf > > > + INF MdeModulePkg/Universal/DriverSampleDxe/DriverSampleDxe.inf > > > + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf > > > + INF MdeModulePkg/Application/UiApp/UiApp.inf > > > + > > > +[FV.FVMAIN_COMPACT] > > > +FvAlignment =3D 16 > > > +ERASE_POLARITY =3D 1 > > > +MEMORY_MAPPED =3D TRUE > > > +STICKY_WRITE =3D TRUE > > > +LOCK_CAP =3D TRUE > > > +LOCK_STATUS =3D TRUE > > > +WRITE_DISABLED_CAP =3D TRUE > > > +WRITE_ENABLED_CAP =3D TRUE > > > +WRITE_STATUS =3D TRUE > > > +WRITE_LOCK_CAP =3D TRUE > > > +WRITE_LOCK_STATUS =3D TRUE > > > +READ_DISABLED_CAP =3D TRUE > > > +READ_ENABLED_CAP =3D TRUE > > > +READ_STATUS =3D TRUE > > > +READ_LOCK_CAP =3D TRUE > > > +READ_LOCK_STATUS =3D TRUE > > > + > > > + INF ArmPlatformPkg/PrePi/PeiMPCore.inf > > > + > > > + FILE FV_IMAGE =3D 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { > > > + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF > PROCESSING_REQUIRED =3D TRUE { > > > + SECTION FV_IMAGE =3D FVMAIN > > > + } > > > + } > > > + > > > +!include Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.fdf.inc > > > diff --git > a/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib.inf > b/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib.inf > > > new file mode 100644 > > > index 000000000000..40c070767a96 > > > --- /dev/null > > > +++ b/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib.inf > > > @@ -0,0 +1,55 @@ > > > +#/** @file > > > +# Library for Phytium Platform. > > > +# > > > +# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights > reserved.
> > > +# > > > +# SPDX-License-Identifier: BSD-2-Clause-Patent > > > +# > > > +#**/ > > > + > > > +[Defines] > > > + INF_VERSION =3D 0x0001001b > > > + BASE_NAME =3D PlatformLib > > > + FILE_GUID =3D > fac08f56-40fe-11eb-a2a3-27b46864b1f3 > > > + MODULE_TYPE =3D BASE > > > + VERSION_STRING =3D 1.0 > > > + LIBRARY_CLASS =3D ArmPlatformLib > > > + > > > +[Packages] > > > + ArmPkg/ArmPkg.dec > > > + ArmPlatformPkg/ArmPlatformPkg.dec > > > + MdePkg/MdePkg.dec > > > + MdeModulePkg/MdeModulePkg.dec > > > + Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec > > > + > > > +[LibraryClasses] > > > + ArmSmcLib > > > + HobLib > > > + > > > +[Sources.common] > > > + PlatformLib.c > > > + PlatformLibMem.c > > > + > > > +[Sources.AARCH64] > > > + AArch64/PhytiumPlatformHelper.S > > > + > > > +[Guids] > > > + > > > +[FixedPcd] > > > + gPhytiumPlatformTokenSpaceGuid.PcdSystemIoBase > > > + gPhytiumPlatformTokenSpaceGuid.PcdSystemIoSize > > > + gPhytiumPlatformTokenSpaceGuid.PcdPciConfigBase > > > + gPhytiumPlatformTokenSpaceGuid.PcdPciConfigSize > > > + gArmTokenSpaceGuid.PcdPciBusMin > > > + gArmTokenSpaceGuid.PcdPciBusMax > > > + gArmTokenSpaceGuid.PcdPciIoBase > > > + gArmTokenSpaceGuid.PcdPciIoSize > > > + gArmTokenSpaceGuid.PcdPciIoTranslation > > > + gArmTokenSpaceGuid.PcdPciMmio32Base > > > + gArmTokenSpaceGuid.PcdPciMmio32Size > > > + gArmTokenSpaceGuid.PcdPciMmio32Translation > > > + gArmTokenSpaceGuid.PcdPciMmio64Base > > > + gArmTokenSpaceGuid.PcdPciMmio64Size > > > + > > > +[Pcd] > > > + gArmPlatformTokenSpaceGuid.PcdCoreCount > > > diff --git > a/Silicon/Phytium/PhytiumCommonPkg/Include/SystemServiceInterface.h > b/Silicon/Phytium/PhytiumCommonPkg/Include/SystemServiceInterface.h > > > new file mode 100644 > > > index 000000000000..c4395153a3de > > > --- /dev/null > > > +++ b/Silicon/Phytium/PhytiumCommonPkg/Include/SystemServiceInterface= .h > > > @@ -0,0 +1,112 @@ > > > +/** @file > > > + > > > + Copyright (C) 2020, Phytium Technology Co Ltd. All rights > reserved.
> > > + > > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > > + > > > +**/ > > > + > > > +#ifndef SYSTEM_SERVICE_INTERFACE_H_ > > > +#define SYSTEM_SERVICE_INTERFACE_H_ > > > + > > > +/* SMC function IDs for OEM Service queries */ > > > +#define PHYTIUM_OEM_SVC_PSSI_VERSION 0x8200ff03 > > > +#define PHYTIUM_OEM_SVC_PBF_VERSION 0x82000001 > > > +#define PHYTIUM_OEM_SVC_CPU_VERSION 0xc2000002 > > > +#define PHYTIUM_OEM_SVC_CPU_MAPS 0xc2000003 > > > +#define PHYTIUM_OEM_SVC_CPU_CONF 0xc2000004 > > > +#define PHYTIUM_OEM_SVC_MEM_REGIONS 0xc2000005 > > > +#define PHYTIUM_OEM_SVC_MCU_DIMMS 0xc2000006 > > > +#define PHYTIUM_OEM_SVC_PCI_CONTROLLER 0xc2000007 > > > +#define PHYTIUM_OEM_SVC_HOST_BRIDGE 0xc2000008 > > > +#define PHYTIUM_OEM_SVC_GET_FLASH_CMD 0xC200000C > > > + > > > +#define PHYTIUM_IOBASE_MASK 0xfffffff > > > +#define PHYTIUM_MEMIO32_MASK 0xffffffff > > > +#define PHYTIUM_MEMIO64_MASK 0xffffffffff > > > + > > > +#pragma pack(1) > > > + > > > +typedef struct { > > > + UINT64 CpuMapCount; > > > + UINT64 CpuMap[1]; > > > +} PHYTIUM_CPU_MAP_INFO; > > > + > > > + > > > +typedef struct { > > > + UINT64 CpuFreq; // Hz > > > + UINT64 CpuL3CacheSize; // Byte > > > + UINT64 CpuL3CacheLineSize; // Byte > > > +} PHYTIUM_CPU_COURE_INFO; > > > + > > > +typedef struct { > > > + UINT64 CupVersion; //cpu version > > > + PHYTIUM_CPU_COURE_INFO CpuCoreInfo; //cpu core info > > > + PHYTIUM_CPU_MAP_INFO CpuMapInfo; //cpu map info > > > +}PHYTIUM_CPU_INFO; > > > + > > > +typedef struct { > > > + UINT64 MemSize; // MB > > > + UINT64 MemDramId; > > > + UINT64 MemModuleId; > > > + UINT64 MemSerial; > > > + UINT64 MemSlotNumber; > > > + UINT64 MemFeatures; > > > +} MCU_DIMM; > > > + > > > +#define MCU_DIMM_MAXCOUNT 2 > > > + > > > +typedef struct { > > > + UINT64 MemFreq; // MHz > > > + UINT64 MemDimmCount; > > > + MCU_DIMM McuDimm[1]; > > > +} MCU_DIMMS; > > > + > > > +typedef struct { > > > + UINT64 MemStart; > > > + UINT64 MemSize; > > > + UINT64 MemNodeId; > > > +} MEMORY_BLOCK; > > > + > > > +typedef struct { > > > + UINT64 MemBlockCount; > > > + MEMORY_BLOCK MemBlock[1]; > > > +} MEMORY_INFO; > > > + > > > +typedef struct { > > > + UINT8 PciLane; > > > + UINT8 PciSpeed; > > > + UINT8 Reserved[6]; > > > +} PCI_BLOCK; > > > + > > > +typedef struct { > > > + UINT64 PciCount; > > > + PCI_BLOCK PciBlock[1]; > > > +} PHYTIUM_PCI_CONTROLLER; > > > + > > > +typedef struct { > > > + UINT8 BusStart; > > > + UINT8 BusEnd; > > > + UINT8 Reserved[6]; > > > + UINT64 PciConfigBase; > > > + UINT64 IoBase; > > > + UINT64 IoSize; > > > + UINT64 Mem32Base; > > > + UINT64 Mem32Size; > > > + UINT64 Mem64Base; > > > + UINT64 Mem64Size; > > > + UINT16 IntA; > > > + UINT16 IntB; > > > + UINT16 IntC; > > > + UINT16 IntD; > > > +} PCI_HOST_BLOCK; > > > + > > > +typedef struct { > > > + UINT64 PciHostCount; > > > + PCI_HOST_BLOCK PciHostBlock[1]; > > > +} PHYTIUM_PCI_HOST_BRIDGE; > > > + > > > +#pragma pack () > > > + > > > + > > > +#endif // SYSTEM_SERVICE_INTERFACE_H_ > > > diff --git > a/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib.c > b/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib.c > > > new file mode 100644 > > > index 000000000000..6a8d22657489 > > > --- /dev/null > > > +++ b/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib.c > > > @@ -0,0 +1,137 @@ > > > +/** @file > > > + Library for Phytium platform. > > > + > > > + Copyright (C) 2020, Phytium Technology Co Ltd. All rights > reserved.
> > > + > > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > > + > > > +**/ > > > + > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > + > > > +ARM_CORE_INFO mPhytiumMpCoreInfoTable[] =3D { > > > + { > > > + 0x0, 0x0, // Cluster 0, Core 0 > > > + > > > + // MP Core MailBox Set/Get/Clear Addresses and Clear Value > > > + (EFI_PHYSICAL_ADDRESS)0, > > > + (EFI_PHYSICAL_ADDRESS)0, > > > + (EFI_PHYSICAL_ADDRESS)0, > > > + (UINT64)0xFFFFFFFF > > > + } > > > +}; > > > + > > > +/* > > > + This function geted the current Boot Mode. > > > + > > > + This function returns the boot reason on the platform. > > > + > > > + @return Return the current Boot Mode of the platform. > > > + > > > +*/ > > > +EFI_BOOT_MODE > > > +ArmPlatformGetBootMode ( > > > + VOID > > > + ) > > > +{ > > > + return BOOT_WITH_FULL_CONFIGURATION; > > > +} > > > + > > > + > > > +/** > > > + Initialize controllers that must setup in the normal world. > > > + > > > + This function is called by the ArmPlatformPkg/Pei or > ArmPlatformPkg/Pei/PlatformPeim > > > + in the PEI phase. > > > + > > > + @retval EFI_SUCCESS ArmPlatformInitialize() is executed > successfully. > > > + > > > +**/ > > > +RETURN_STATUS > > > +ArmPlatformInitialize ( > > > + IN UINTN MpId > > > + ) > > > +{ > > > + return RETURN_SUCCESS; > > > +} > > > + > > > + > > > +/** > > > + This function Inited the system (or sometimes called permanent) > memory. > > > + > > > + This memory is generally represented by the DRAM. > > > + > > > + @param[in] None. > > > + > > > + @retval None. > > > + > > > +**/ > > > +VOID > > > +ArmPlatformInitializeSystemMemory ( > > > + VOID > > > + ) > > > +{ > > > + // Nothing to do here > > > +} > > > + > > > + > > > +/** > > > + This function geted the information of core. > > > + > > > + @param[out] CoreCount The count of CoreInfoTable. > > > + @param[out] ArmCoreTable The pointer of CoreInfoTable. > > > + > > > + @retval EFI_SUCCESS PrePeiCoreGetMpCoreInfo() is executed > successfully. > > > + > > > +**/ > > > +EFI_STATUS > > > +PrePeiCoreGetMpCoreInfo ( > > > + OUT UINTN *CoreCount, > > > + OUT ARM_CORE_INFO **ArmCoreTable > > > + ) > > > +{ > > > + *CoreCount =3D PcdGet32 (PcdCoreCount); > > > + *ArmCoreTable =3D mPhytiumMpCoreInfoTable; > > > + > > > + return EFI_SUCCESS; > > > +} > > > + > > > +// > > > +// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid > is > > > +// undefined in the contect of PrePeiCore > > > +// > > > +EFI_GUID mArmMpCoreInfoPpiGuid =3D ARM_MP_CORE_INFO_PPI_GUID; > > > +ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi =3D { PrePeiCoreGetMpCoreInfo }; > > > + > > > +EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] =3D > > > +{ > > > + { > > > + EFI_PEI_PPI_DESCRIPTOR_PPI, > > > + &mArmMpCoreInfoPpiGuid, > > > + &mMpCoreInfoPpi > > > + } > > > +}; > > > + > > > + > > > +/** > > > + This function geted the information of Ppitable. > > > + > > > + @param[out] PpiListSize The size of Ppitable. > > > + @param[out] PpiList The pointer of Ppitable. > > > + > > > + @retval None. > > > + > > > +**/ > > > +VOID > > > +ArmPlatformGetPlatformPpiList ( > > > + OUT UINTN *PpiListSize, > > > + OUT EFI_PEI_PPI_DESCRIPTOR **PpiList > > > + ) > > > +{ > > > + *PpiListSize =3D sizeof (gPlatformPpiTable); > > > + *PpiList =3D gPlatformPpiTable; > > > +} > > > diff --git > a/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLibMem.c > b/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLibMem.c > > > new file mode 100644 > > > index 000000000000..7e54cb6e744f > > > --- /dev/null > > > +++ b/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLibMem.= c > > > @@ -0,0 +1,156 @@ > > > +/** @file > > > + Library of memory map for Phytium platform. > > > + > > > + Copyright (C) 2020, Phytium Technology Co Ltd. All rights > reserved.
> > > + > > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > > + > > > +**/ > > > + > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > + > > > +// Number of Virtual Memory Map Descriptors > > > +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 32 > > > + > > > +// DDR attributes > > > +#define DDR_ATTRIBUTES_CACHED > ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK > > > +#define DDR_ATTRIBUTES_UNCACHED > ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED > > > + > > > +/** > > > + Return the Virtual Memory Map of your platform > > > + > > > + This Virtual Memory Map is used by MemoryInitPei Module to > initialize the MMU on your platform. > > > + > > > + @param[out] VirtualMemoryMap Array of > ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to- > > > + Virtual Memory mapping. This array > must be ended by a zero-filled > > > + entry > > > +**/ > > > +VOID > > > +ArmPlatformGetVirtualMemoryMap ( > > > + IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap > > > + ) > > > +{ > > > + ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes; > > > + ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; > > > + EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes; > > > + MEMORY_BLOCK *MemBlock; > > > + MEMORY_INFO *MemInfo; > > > + ARM_SMC_ARGS ArmSmcArgs; > > > + UINT32 MemBlockCnt; > > > + UINT32 Index1; > > > + UINT32 Index2; > > > + > > > + MemBlock =3D NULL; > > > + MemInfo =3D NULL; > > > + MemBlockCnt =3D 0; > > > + Index1 =3D 0; > > > + Index2 =3D 0; > > > + CacheAttributes =3D ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; > > > + > > > + ASSERT (VirtualMemoryMap !=3D NULL); > > > + VirtualMemoryTable =3D (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePage= s \ > > > + (EFI_SIZE_TO_PAGES (sizeof > (ARM_MEMORY_REGION_DESCRIPTOR) * \ > > > + MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS)); > > > + if (VirtualMemoryTable =3D=3D NULL) { > > > + return; > > > + } > > > + > > > + ResourceAttributes =3D > > > + EFI_RESOURCE_ATTRIBUTE_PRESENT | > > > + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | > > > + EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE | > > > + EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | > > > + EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | > > > + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE | > > > + EFI_RESOURCE_ATTRIBUTE_TESTED; > > > + > > > + MemInfo =3D AllocatePages (1); > > > + ASSERT (MemInfo !=3D NULL); > > > + > > > + ArmSmcArgs.Arg0 =3D PHYTIUM_OEM_SVC_MEM_REGIONS; > > > + ArmSmcArgs.Arg1 =3D (UINTN) MemInfo; > > > + ArmSmcArgs.Arg2 =3D EFI_PAGE_SIZE; > > > + ArmCallSmc (&ArmSmcArgs); > > > + if (ArmSmcArgs.Arg0 =3D=3D 0) { > > > + MemBlockCnt =3D MemInfo->MemBlockCount; > > > + MemBlock =3D MemInfo->MemBlock; > > > + } else { > > > + ASSERT (FALSE); > > > + } > > > + > > > + //Soc Io Space > > > + VirtualMemoryTable[Index1].PhysicalBase =3D PcdGet64 > (PcdSystemIoBase); > > > + VirtualMemoryTable[Index1].VirtualBase =3D PcdGet64 > (PcdSystemIoBase); > > > + VirtualMemoryTable[Index1].Length =3D PcdGet64 > (PcdSystemIoSize); > > > + VirtualMemoryTable[Index1].Attributes =3D > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > > + > > > + // > > > + // PCI Configuration Space > > > + // > > > + VirtualMemoryTable[++Index1].PhysicalBase =3D PcdGet64 > (PcdPciConfigBase); > > > + VirtualMemoryTable[Index1].VirtualBase =3D PcdGet64 > (PcdPciConfigBase); > > > + VirtualMemoryTable[Index1].Length =3D PcdGet64 > (PcdPciConfigSize); > > > + VirtualMemoryTable[Index1].Attributes =3D > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > > + > > > + // > > > + // PCI Memory Space > > > + // > > > + VirtualMemoryTable[++Index1].PhysicalBase =3D PcdGet64 > (PcdPciIoBase) + PcdGet64 (PcdPciIoTranslation); > > > + VirtualMemoryTable[Index1].VirtualBase =3D PcdGet64 > (PcdPciIoBase) + PcdGet64 (PcdPciIoTranslation); > > > + VirtualMemoryTable[Index1].Length =3D PcdGet64 > (PcdPciIoSize); > > > + VirtualMemoryTable[Index1].Attributes =3D > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > > + > > > + // > > > + // PCI Memory Space > > > + // > > > + VirtualMemoryTable[++Index1].PhysicalBase =3D PcdGet32 > (PcdPciMmio32Base); > > > + VirtualMemoryTable[Index1].VirtualBase =3D PcdGet32 > (PcdPciMmio32Base); > > > + VirtualMemoryTable[Index1].Length =3D PcdGet32 > (PcdPciMmio32Size); > > > + VirtualMemoryTable[Index1].Attributes =3D > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > > + > > > + // > > > + // 64-bit PCI Memory Space > > > + // > > > + VirtualMemoryTable[++Index1].PhysicalBase =3D PcdGet64 > (PcdPciMmio64Base); > > > + VirtualMemoryTable[Index1].VirtualBase =3D PcdGet64 > (PcdPciMmio64Base); > > > + VirtualMemoryTable[Index1].Length =3D PcdGet64 > (PcdPciMmio64Size); > > > + VirtualMemoryTable[Index1].Attributes =3D > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > > + > > > + //DDR > > > + for (Index2 =3D 0; Index2 < MemBlockCnt; Index2++) { > > > + VirtualMemoryTable[++Index1].PhysicalBase =3D MemBlock->MemStart= ; > > > + VirtualMemoryTable[Index1].VirtualBase =3D MemBlock->MemStart= ; > > > + VirtualMemoryTable[Index1].Length =3D MemBlock->MemSize; > > > + VirtualMemoryTable[Index1].Attributes =3D CacheAttributes; > > > + > > > + BuildResourceDescriptorHob ( > > > + EFI_RESOURCE_SYSTEM_MEMORY, > > > + ResourceAttributes, > > > + MemBlock->MemStart, > > > + MemBlock->MemSize > > > + ); > > > + > > > + MemBlock++; > > > + } > > > + > > > + // End of Table > > > + VirtualMemoryTable[++Index1].PhysicalBase =3D 0; > > > + VirtualMemoryTable[Index1].VirtualBase =3D 0; > > > + VirtualMemoryTable[Index1].Length =3D 0; > > > + VirtualMemoryTable[Index1].Attributes =3D > (ARM_MEMORY_REGION_ATTRIBUTES)0; > > > + > > > + > > > + for (Index2 =3D 0; Index2 < Index1; Index2++) { > > > + DEBUG ((DEBUG_ERROR, "PhysicalBase %12lx VirtualBase %12lx Lengt= h > %12lx Attributes %12lx\n",\ > > > + VirtualMemoryTable[Index2].PhysicalBase, > VirtualMemoryTable[Index2].VirtualBase, \ > > > + VirtualMemoryTable[Index2].Length, > VirtualMemoryTable[Index2].Attributes)); > > > + } > > > + > > > + *VirtualMemoryMap =3D VirtualMemoryTable; > > > +} > > > diff --git > a/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/AArch64/PhytiumPlatform= Helper.S > b/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/AArch64/PhytiumPlatform= Helper.S > > > new file mode 100644 > > > index 000000000000..cce23b786197 > > > --- /dev/null > > > +++ > b/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/AArch64/PhytiumPlatform= Helper.S > > > @@ -0,0 +1,76 @@ > > > +# > > > +# Copyright (c) 2011-2013, ARM Limited. All rights reserved. > > > +# > > > +# This program and the accompanying materials > > > +# are licensed and made available under the terms and conditions of > the BSD License > > > +# which accompanies this distribution. The full text of the licens= e > may be found at > > > +# http://opensource.org/licenses/bsd-license.php > > > +# > > > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS > OR IMPLIED. > > > +# > > > +# > > > + > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > + > > > +.text > > > +.align 2 > > > + > > > +GCC_ASM_EXPORT(ArmPlatformPeiBootAction) > > > +GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore) > > > +GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId) > > > +GCC_ASM_EXPORT(ArmPlatformGetCorePosition) > > > + > > > +PrimaryCoreMpid: .word 0x0 > > > + > > > + > > > +ASM_PFX(ArmPlatformPeiBootAction): > > > + // Save MPIDR_EL1[23:0] in a variable. > > > + mov x20, x30 > > > + bl ASM_PFX(ArmReadMpidr) > > > + lsl w0, w0, #8 > > > + lsr w0, w0, #8 > > > + ldr x1, =3DPrimaryCoreMpid > > > + str w0, [x1] > > > + ret x20 > > > + > > > +//UINTN > > > +//ArmPlatformGetPrimaryCoreMpId ( > > > +// VOID > > > +// ); > > > +ASM_PFX(ArmPlatformGetPrimaryCoreMpId): > > > + ldr x0, =3DPrimaryCoreMpid > > > + ldr w0, [x0] > > > + ret > > > + > > > +//UINTN > > > +//ArmPlatformIsPrimaryCore ( > > > +// IN UINTN MpId > > > +// ); > > > +ASM_PFX(ArmPlatformIsPrimaryCore): > > > + mov x20, x30 > > > + bl ASM_PFX(ArmReadMpidr) > > > + lsl w0, w0, #8 > > > + lsr w0, w0, #8 > > > + ldr x1, =3DPrimaryCoreMpid > > > + ldr w1, [x1] > > > + cmp w0, w1 > > > + cset x0, eq > > > + ret x20 > > > + > > > +//UINTN > > > +//ArmPlatformGetCorePosition ( > > > +// IN UINTN MpId > > > +// ); > > > +// With this function: CorePos =3D (ClusterId * 4) + CoreId > > > +ASM_PFX(ArmPlatformGetCorePosition): > > > + and x1, x0, #ARM_CORE_MASK > > > + and x0, x0, #ARM_CLUSTER_MASK > > > + add x0, x1, x0, LSR #6 > > > + ret > > > + > > > +ASM_FUNCTION_REMOVE_IF_UNREFERENCED > > > diff --git a/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.fdf.in= c > b/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.fdf.inc > > > new file mode 100644 > > > index 000000000000..641266c6012f > > > --- /dev/null > > > +++ b/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.fdf.inc > > > @@ -0,0 +1,119 @@ > > > +## @file > > > +# This package provides common open source Phytium silicon modules. > > > +# > > > +# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights reserve= d. > > > +# > > > +# SPDX-License-Identifier:BSD-2-Clause-Patent > > > +# > > > +## > > > + > > > > +########################################################################= #### > > > +# Example of a DXE_DRIVER FFS file with a Checksum encapsulation > section # > > > > +########################################################################= #### > > > +# > > > +#[Rule.Common.DXE_DRIVER] > > > +# FILE DRIVER =3D $(NAMED_GUID) { > > > +# DXE_DEPEX DXE_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > > +# COMPRESS PI_STD { > > > +# GUIDED { > > > +# PE32 PE32 > $(INF_OUTPUT)/$(MODULE_NAME).efi > > > +# UI STRING=3D"$(MODULE_NAME)" Optional > > > +# VERSION STRING=3D"$(INF_VERSION)" Optional > BUILD_NUM=3D$(BUILD_NUMBER) > > > +# } > > > +# } > > > +# } > > > +# > > > > +########################################################################= #### > > > + > > > +[Rule.Common.SEC] > > > + FILE SEC =3D $(NAMED_GUID) RELOCS_STRIPPED FIXED { > > > + TE TE Align =3D Auto > $(INF_OUTPUT)/$(MODULE_NAME).efi > > > + } > > > + > > > +[Rule.Common.PEI_CORE] > > > + FILE PEI_CORE =3D $(NAMED_GUID) FIXED { > > > + TE TE Align =3D Auto > $(INF_OUTPUT)/$(MODULE_NAME).efi > > > + UI STRING =3D"$(MODULE_NAME)" Optional > > > + } > > > + > > > +[Rule.Common.PEIM] > > > + FILE PEIM =3D $(NAMED_GUID) FIXED { > > > + PEI_DEPEX PEI_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > > + TE TE Align =3D Auto > $(INF_OUTPUT)/$(MODULE_NAME).efi > > > + UI STRING=3D"$(MODULE_NAME)" Optional > > > + } > > > + > > > +[Rule.Common.PEIM.TIANOCOMPRESSED] > > > + FILE PEIM =3D $(NAMED_GUID) DEBUG_MYTOOLS_IA32 { > > > + PEI_DEPEX PEI_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > > + GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = =3D > TRUE { > > > + PE32 PE32 > $(INF_OUTPUT)/$(MODULE_NAME).efi > > > + UI STRING=3D"$(MODULE_NAME)" Optional > > > + } > > > + } > > > + > > > +[Rule.Common.DXE_CORE] > > > + FILE DXE_CORE =3D $(NAMED_GUID) { > > > + PE32 PE32 > $(INF_OUTPUT)/$(MODULE_NAME).efi > > > + UI STRING=3D"$(MODULE_NAME)" Optional > > > + } > > > + > > > +[Rule.Common.UEFI_DRIVER] > > > + FILE DRIVER =3D $(NAMED_GUID) { > > > + DXE_DEPEX DXE_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > > + PE32 PE32 > $(INF_OUTPUT)/$(MODULE_NAME).efi > > > + UI STRING=3D"$(MODULE_NAME)" Optional > > > + } > > > + > > > +[Rule.Common.DXE_DRIVER] > > > + FILE DRIVER =3D $(NAMED_GUID) { > > > + DXE_DEPEX DXE_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > > + PE32 PE32 > $(INF_OUTPUT)/$(MODULE_NAME).efi > > > + UI STRING=3D"$(MODULE_NAME)" Optional > > > + } > > > + > > > +[Rule.Common.DXE_RUNTIME_DRIVER] > > > + FILE DRIVER =3D $(NAMED_GUID) { > > > + DXE_DEPEX DXE_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > > + PE32 PE32 > $(INF_OUTPUT)/$(MODULE_NAME).efi > > > + UI STRING=3D"$(MODULE_NAME)" Optional > > > + } > > > + > > > +[Rule.Common.UEFI_APPLICATION] > > > + FILE APPLICATION =3D $(NAMED_GUID) { > > > + UI STRING =3D"$(MODULE_NAME)" Optional > > > + PE32 PE32 > $(INF_OUTPUT)/$(MODULE_NAME).efi > > > + } > > > + > > > +[Rule.Common.UEFI_DRIVER.BINARY] > > > + FILE DRIVER =3D $(NAMED_GUID) { > > > + DXE_DEPEX DXE_DEPEX Optional |.depex > > > + PE32 PE32 |.efi > > > + UI STRING=3D"$(MODULE_NAME)" Optional > > > + VERSION STRING=3D"$(INF_VERSION)" Optional > BUILD_NUM=3D$(BUILD_NUMBER) > > > + } > > > + > > > +[Rule.Common.UEFI_APPLICATION.BINARY] > > > + FILE APPLICATION =3D $(NAMED_GUID) { > > > + PE32 PE32 |.efi > > > + UI STRING=3D"$(MODULE_NAME)" Optional > > > + VERSION STRING=3D"$(INF_VERSION)" Optional > BUILD_NUM=3D$(BUILD_NUMBER) > > > + } > > > + > > > +[Rule.Common.USER_DEFINED.BIOSINFO] > > > + FILE FREEFORM =3D $(NAMED_GUID) { > > > + RAW BIN Align =3D 16 $(INF_OUTPUT)/$(MODULE_NAME).acpi > > > + } > > > + > > > +[Rule.Common.UEFI_APPLICATION.UI] > > > + FILE APPLICATION =3D $(NAMED_GUID) { > > > + PE32 PE32 > $(INF_OUTPUT)/$(MODULE_NAME).efi > > > + UI STRING=3D"Enter Setup" > > > + VERSION STRING=3D"$(INF_VERSION)" Optional > BUILD_NUM=3D$(BUILD_NUMBER) > > > + } > > > + > > > +[Rule.Common.USER_DEFINED.ACPITABLE] > > > + FILE FREEFORM =3D $(NAMED_GUID) { > > > + RAW ACPI |.acpi > > > + RAW ASL |.aml > > > + } > > > -- > > > 2.25.1 > > > > > > > > > --00000000000001578505bba10d04 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi Ling,

My comme= nts are included inline in the replies, please scroll down to find them.

I had some minor further comments on some of the ear= ly patches, and some more detailed comments on things like the flash driver= that I did not review for v1.
For any patches where I added
Reviewed-by: Leif Lindholm <l= eif@nuviainc.com>
please include this in the commit messag= e of that patch for v3, just below your Signed-off-by. That patch is now co= nsidered done.

When there are no further comme= nts below, I end with:

/
=C2=A0=C2=A0=C2= =A0 Leif

Just like here :)



On Thu, Feb 18, 2021 at 2:47 AM =E8=B4=BE=E7=8E=B2 <jialing@phytium.com.cn> wrote:
Hi Leif,

Thank you for your reply.=C2=A0 I'm glad to hear from you!

I received a total of ten replies, and the contents of the reply seems to b= e quoted from the original. Is there any problems with our code submission?= Please advise us what to do next. Thank you very much!

Best Regards,

Ling


> -----=E5=8E=9F=E5=A7=8B=E9=82=AE=E4=BB=B6-----
> =E5=8F=91=E4=BB=B6=E4=BA=BA: "Leif Lindholm" <leif@nuviainc.com>
> =E5=8F=91=E9=80=81=E6=97=B6=E9=97=B4: 2021-02-10 23:24:45 (=E6=98=9F= =E6=9C=9F=E4=B8=89)
> =E6=94=B6=E4=BB=B6=E4=BA=BA: "Ling Jia" <jialing@phytium.com.cn><= br> > =E6=8A=84=E9=80=81: devel@edk2.groups.io
> =E4=B8=BB=E9=A2=98: Re: [PATCH v1 01/10] Silicon/Phytium: Added Platfo= rmLib to FT2000/4
>
> On Fri, Feb 05, 2021 at 18:06:21 +0800, Ling Jia wrote:
> > The PlatformLib supported the system
> > library for FT2000/4 chip.
> > Platform/Phytium: Added the dsc and fdf files of DurianPkg.
> >
> > Signed-off-by: Ling Jia <jialing@phytium.com.cn>
> > ---
> >=C2=A0 Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec=C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0|=C2=A0 41 +++
> >=C2=A0 Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dsc.inc= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0| 345 ++++++++++++++++++++
> >=C2=A0 Platform/Phytium/DurianPkg/DurianPkg.dsc=C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 | 278 ++++++++++++++++
> >=C2=A0 Platform/Phytium/DurianPkg/DurianPkg.fdf=C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 | 199 +++++++++++
> >=C2=A0 Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib= .inf=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0|=C2=A0 5= 5 ++++
> >=C2=A0 Silicon/Phytium/PhytiumCommonPkg/Include/SystemServiceInter= face.h=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0| 112 +++++++<= br> > >=C2=A0 Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib= .c=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0| 13= 7 ++++++++
> >=C2=A0 Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib= Mem.c=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 | 156 ++++++++= +
> >=C2=A0 Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/AArch64/Phy= tiumPlatformHelper.S |=C2=A0 76 +++++
> >=C2=A0 Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.fdf.inc= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0| 119 +++++++
> >=C2=A0 10 files changed, 1518 insertions(+)
> >
> > diff --git a/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.de= c b/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec
> > new file mode 100644
> > index 000000000000..48f430c88de6
> > --- /dev/null
> > +++ b/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec
> > @@ -0,0 +1,41 @@
> > +## @file
> > +# This package provides common Phytium silicon modules.
> > +#
> > +# Copyright (C) 2020, Phytium Technology Co,Ltd. All rights rese= rved.
> > +#
> > +# SPDX-License-Identifier:BSD-2-Clause-Patent
> > +#
> > +##
> > +
> > +[Defines]
> > +=C2=A0 DEC_SPECIFICATION=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =3D 0x0001001b
> > +=C2=A0 PACKAGE_NAME=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0=3D PhytiumCommnonPkg
> > +=C2=A0 PACKAGE_GUID=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0=3D b34af0b4-3e7c-11eb-a9d0-0738806d2dec
> > +=C2=A0 PACKAGE_VERSION=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =3D 0.1
> > +
> > +################################################################= ################
> > +#
> > +# Include Section - list of Include Paths that are provided by t= his package.
> > +#=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0Comments are used for Keywords and Module Types.
> > +#
> > +# Supported Module Types:
> > +#=C2=A0 BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_D= RIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
> > +#
> > +################################################################= ################
> > +[Includes]
> > +=C2=A0 Include=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0# = Root include for the package
> > +
> > +[Guids.common]
> > +=C2=A0 gPhytiumPlatformTokenSpaceGuid =3D { 0x8c3abed4, 0x1fc8, = 0x46d3, { 0xb4, 0x17, 0xa3, 0x22, 0x38, 0x14, 0xde, 0x76 } }
> > +
> > +[PcdsFixedAtBuild.common]
> > +=C2=A0 gPhytiumPlatformTokenSpaceGuid.PcdSystemIoBase|0x0|UINT64= |0x00000000
> > +=C2=A0 gPhytiumPlatformTokenSpaceGuid.PcdSystemIoSize|0x0|UINT64= |0x00000001
> > +
> > +=C2=A0 #
> > +=C2=A0 # PCI configuration address space
> > +=C2=A0 #
> > +=C2=A0 gPhytiumPlatformTokenSpaceGuid.PcdPciConfigBase|0x0|UINT6= 4|0x00000002
> > +=C2=A0 gPhytiumPlatformTokenSpaceGuid.PcdPciConfigSize|0x0|UINT6= 4|0x00000003
> > +
> > +[Protocols]
> > diff --git a/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.ds= c.inc b/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dsc.inc
> > new file mode 100644
> > index 000000000000..121fe0e7c549
> > --- /dev/null
> > +++ b/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dsc.inc > > @@ -0,0 +1,345 @@
> > +## @file
> > +# This package provides common open source Phytium silicon modul= es.
> > +#
> > +# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights res= erved.
> > +#
> > +# SPDX-License-Identifier:BSD-2-Clause-Patent
> > +#
> > +##
> > +
> > +
> > +[LibraryClasses.common]
> > +=C2=A0 #
> > +=C2=A0 # ARM Architectural Libraries
> > +=C2=A0 #
> > +=C2=A0 ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmD= isassemblerLib.inf
> > +=C2=A0 ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf
> > +=C2=A0 ArmGicArchLib|ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.= inf
> > +=C2=A0 ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformSta= ckLib/ArmPlatformStackLib.inf
> > +=C2=A0 ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
> > +=C2=A0 ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerP= hyCounterLib/ArmGenericTimerPhyCounterLib.inf
> > +=C2=A0 ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
> > +=C2=A0 ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
> > +
> > +=C2=A0 AcpiLib|EmbeddedPkg/Library/AcpiLib/AcpiLib.inf
> > +=C2=A0 AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/= AuthVariableLibNull.inf
> > +
> > +=C2=A0 BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
> > +=C2=A0 BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.= inf
> > +=C2=A0 BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.= inf
> > +=C2=A0 BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.= inf
> > +=C2=A0 BmpSupportLib|MdeModulePkg/Library/BaseBmpSupportLib/Base= BmpSupportLib.inf
> > +
> > +=C2=A0 CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCaps= uleLibNull.inf
> > +=C2=A0 CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> > +=C2=A0 CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/Arm= ExceptionLib.inf
> > +=C2=A0 CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib= /ArmCacheMaintenanceLib.inf
> > +=C2=A0 CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDispl= ayLib/CustomizedDisplayLib.inf
> > +=C2=A0 !if $(TARGET) =3D=3D RELEASE
> > +=C2=A0 =C2=A0 DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebug= LibNull.inf
> > +=C2=A0 !else
> > +=C2=A0 =C2=A0 DebugLib|MdePkg/Library/BaseDebugLibSerialPort/Bas= eDebugLibSerialPort.inf
> > +=C2=A0 !endif
> > +
> > +=C2=A0 DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevice= PathLib.inf
> > +=C2=A0 DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/Dx= eServicesTableLib.inf
> > +=C2=A0 DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErro= rLevelLib/BaseDebugPrintErrorLevelLib.inf
> > +=C2=A0 DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptio= nHandlerLib/DefaultExceptionHandlerLib.inf
> > +=C2=A0 DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/Debu= gAgentLibNull.inf
> > +=C2=A0 DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLib= Null/DebugAgentTimerLibNull.inf
> > +=C2=A0 DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesL= ib.inf
> > +
> > +=C2=A0 FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
> > +=C2=A0 FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/File= ExplorerLib.inf
> > +=C2=A0 FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHa= ndleLib.inf
> > +
> > +=C2=A0 HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
> > +=C2=A0 HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
> > +=C2=A0 HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/Ue= fiHandleParsingLib.inf
> > +
> > +=C2=A0 IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsi= c.inf
> > +=C2=A0 IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.= inf
> > +
> > +=C2=A0 OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf > > +
> > +=C2=A0 PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
> > +=C2=A0 PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > > +=C2=A0 PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryP= ointLib/BasePeCoffGetEntryPointLib.inf
> > +=C2=A0 PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf<= br> > > +=C2=A0 PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraAction= LibNull/BasePeCoffExtraActionLibNull.inf
> > +=C2=A0 PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.= inf
> > +=C2=A0 PlatformSecureLib|SecurityPkg/Library/PlatformSecureLibNu= ll/PlatformSecureLibNull.inf
> > +=C2=A0 PlatformBootManagerLib|ArmPkg/Library/PlatformBootManager= Lib/PlatformBootManagerLib.inf
> > +=C2=A0 PerformanceLib|MdePkg/Library/BasePerformanceLibNull/Base= PerformanceLibNull.inf
> > +
> > +=C2=A0 RngLib|MdePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerL= ib.inf
> > +=C2=A0 ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLi= bNull/BaseReportStatusCodeLibNull.inf
> > +
> > +=C2=A0 SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/= BaseSynchronizationLib.inf
> > +=C2=A0 ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf > > +=C2=A0 SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf<= br> > > +=C2=A0 ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/Uefi= ShellCommandLib.inf
> > +=C2=A0 SafeIntLib|MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.i= nf
> > +
> > +=C2=A0 TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.i= nf
> > +=C2=A0 TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibN= ull/TpmMeasurementLibNull.inf
> > +
> > +=C2=A0 UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
> > +=C2=A0 UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeL= ib.inf
> > +=C2=A0 UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/Ba= seUefiDecompressLib.inf
> > +=C2=A0 UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeSer= vicesTableLib/UefiRuntimeServicesTableLib.inf
> > +=C2=A0 UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesT= ableLib/UefiBootServicesTableLib.inf
> > +=C2=A0 UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/= UefiDriverEntryPoint.inf
> > +=C2=A0 UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationE= ntryPoint/UefiApplicationEntryPoint.inf
> > +=C2=A0 UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLi= b/UefiHiiServicesLib.inf
> > +=C2=A0 UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLi= b/UefiBootManagerLib.inf
> > +
> > +=C2=A0 VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.= inf
> > +=C2=A0 VariablePolicyHelperLib|MdeModulePkg/Library/VariablePoli= cyHelperLib/VariablePolicyHelperLib.inf
> > +
> > +=C2=A0 #
> > +=C2=A0 # Scsi Requirements
> > +=C2=A0 #
> > +=C2=A0 UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf > > +
> > +=C2=A0 #
> > +=C2=A0 # USB Requirements
> > +=C2=A0 #
> > +=C2=A0 UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf
> > +
> > +=C2=A0 #
> > +=C2=A0 # Networking Requirements
> > +=C2=A0 #
> > +=C2=A0 DpcLib|NetworkPkg/Library/DxeDpcLib/DxeDpcLib.inf
> > +=C2=A0 IpIoLib|NetworkPkg/Library/DxeIpIoLib/DxeIpIoLib.inf
> > +=C2=A0 NetLib|NetworkPkg/Library/DxeNetLib/DxeNetLib.inf
> > +=C2=A0 UdpIoLib|NetworkPkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf > > +=C2=A0 HttpLib|NetworkPkg/Library/DxeHttpLib/DxeHttpLib.inf
> > +
> > +[LibraryClasses.common.SEC]
> > +=C2=A0 ArmGicArchLib|ArmPkg/Library/ArmGicArchSecLib/ArmGicArchS= ecLib.inf
> > +=C2=A0 DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsBaseLib/Deb= ugAgentSymbolsBaseLib.inf
> > +=C2=A0 ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractG= uidedSectionLib/PrePiExtractGuidedSectionLib.inf
> > +=C2=A0 LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompre= ssLib/LzmaCustomDecompressLib.inf
> > +=C2=A0 MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAlloca= tionLib/PrePiMemoryAllocationLib.inf
> > +=C2=A0 HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf > > +=C2=A0 PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
> > +=C2=A0 PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobLis= tPointerLib/PrePiHobListPointerLib.inf
> > +=C2=A0 PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/Pei= PerformanceLib.inf
> > +
> > +[LibraryClasses.common.SEC, LibraryClasses.common.PEIM]
> > +=C2=A0 MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitP= eiLib.inf
> > +
> > +[LibraryClasses.common.DXE_CORE]
> > +=C2=A0 DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCor= eEntryPoint.inf
> > +=C2=A0 DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesL= ib.inf
> > +=C2=A0 ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSe= ctionLib/DxeExtractGuidedSectionLib.inf
> > +=C2=A0 HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
> > +=C2=A0 MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAll= ocationLib/DxeCoreMemoryAllocationLib.inf
> > +=C2=A0 PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib= /DxeCorePerformanceLib.inf
> > +
> > +[LibraryClasses.common.DXE_DRIVER]
> > +=C2=A0 DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesL= ib.inf
> > +=C2=A0 MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLi= b/UefiMemoryAllocationLib.inf
> > +=C2=A0 SecurityManagementLib|MdeModulePkg/Library/DxeSecurityMan= agementLib/DxeSecurityManagementLib.inf
> > +=C2=A0 PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/Dxe= PerformanceLib.inf
> > +=C2=A0 VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/= VariablePolicyLib.inf
> > +
> > +[LibraryClasses.common.UEFI_APPLICATION]
> > +=C2=A0 DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesL= ib.inf
> > +=C2=A0 HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
> > +=C2=A0 MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLi= b/UefiMemoryAllocationLib.inf
> > +
> > +=C2=A0 #
> > +=C2=A0 # UiApp dependencies
> > +=C2=A0 #
> > +=C2=A0 FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/File= ExplorerLib.inf
> > +=C2=A0 PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/Dxe= PerformanceLib.inf
> > +
> > +[LibraryClasses.common.UEFI_DRIVER]
> > +=C2=A0 ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSe= ctionLib/DxeExtractGuidedSectionLib.inf
> > +=C2=A0 PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/Dxe= PerformanceLib.inf
> > +=C2=A0 DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesL= ib.inf
> > +=C2=A0 MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLi= b/UefiMemoryAllocationLib.inf
> > +
> > +[LibraryClasses.common.DXE_RUNTIME_DRIVER]
> > +=C2=A0 !if $(SECURE_BOOT_ENABLE) =3D=3D TRUE
> > +=C2=A0 =C2=A0 BaseCryptLib|CryptoPkg/Library/BaseCryptLib/Runtim= eCryptLib.inf
> > +=C2=A0 !endif
> > +
> > +=C2=A0 CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCaps= uleLibNull.inf
> > +
> > +=C2=A0 !if $(TARGET) !=3D RELEASE
> > +=C2=A0 =C2=A0 DebugLib|MdePkg/Library/DxeRuntimeDebugLibSerialPo= rt/DxeRuntimeDebugLibSerialPort.inf
> > +=C2=A0 !endif
> > +
> > +=C2=A0 HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
> > +=C2=A0 MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLi= b/UefiMemoryAllocationLib.inf
> > +=C2=A0 ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReport= StatusCodeLib/RuntimeDxeReportStatusCodeLib.inf
> > +=C2=A0 VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/= VariablePolicyLibRuntimeDxe.inf
> > +
> > +[LibraryClasses.AARCH64.DXE_RUNTIME_DRIVER]
> > +=C2=A0 EfiResetSystemLib|ArmPkg/Library/ArmPsciResetSystemLib/Ar= mPsciResetSystemLib.inf
> > +
> > +[LibraryClasses.ARM, LibraryClasses.AARCH64]
> > +=C2=A0 NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrins= icsLib.inf
> > +
> > +=C2=A0 #
> > +=C2=A0 # Add support for GCC stack protector
> > +=C2=A0 #
> > +=C2=A0 NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.i= nf
> > +
> > +[LibraryClasses.common.UEFI_DRIVER, LibraryClasses.common.UEFI_A= PPLICATION, LibraryClasses.common.DXE_RUNTIME_DRIVER, LibraryClasses.common= .DXE_DRIVER]
> > +=C2=A0 PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
> > +
> > +[BuildOptions]
> > +=C2=A0 RVCT:RELEASE_*_*_CC_FLAGS=C2=A0 =3D -DMDEPKG_NDEBUG
> > +=C2=A0 GCC:RELEASE_*_*_CC_FLAGS=C2=A0 =3D -DMDEPKG_NDEBUG
> > +
> > +[BuildOptions.AARCH64.EDKII.DXE_RUNTIME_DRIVER]
> > +=C2=A0 GCC:*_*_AARCH64_DLINK_FLAGS =3D -z common-page-size=3D0x1= 0000
> > +
> > +################################################################= ################
> > +#
> > +# Pcd Section - list of all EDK II PCD Entries defined by this P= latform
> > +#
> > +################################################################= ################
> > +
> > +[PcdsFeatureFlag.common]
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE > > +=C2=A0 gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE
> > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|FALSE > > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE=
> > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE > > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRU= E
> > +
> > +=C2=A0 gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformat= ionHob|TRUE
> > +
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport= |TRUE
> > +
> > +=C2=A0 # Use the Vector Table location in CpuDxe. We will not co= py the Vector Table at PcdCpuVectorBaseAddress
> > +=C2=A0 gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE
> > +
> > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultLangDeprec= ate|TRUE
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|= TRUE
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdPciBusHotplugDeviceSupp= ort|FALSE
> > +
> > +[PcdsFixedAtBuild.common]
> > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|10= 00000
> > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000= 000
> > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|10000= 00
> > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000
> > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF > > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMas= k|0
> > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0
> > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320=
> > +=C2=A0 gEfiNetworkPkgTokenSpaceGuid.PcdAllowHttpConnections|TRUE=
> > +
> > +!if $(TARGET) =3D=3D RELEASE
> > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x21
> > +!else
> > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f
> > +!endif
> > +
> > +=C2=A0 #=C2=A0 DEBUG_INIT=C2=A0 =C2=A0 =C2=A0 0x00000001=C2=A0 /= / Initialization
> > +=C2=A0 #=C2=A0 DEBUG_WARN=C2=A0 =C2=A0 =C2=A0 0x00000002=C2=A0 /= / Warnings
> > +=C2=A0 #=C2=A0 DEBUG_LOAD=C2=A0 =C2=A0 =C2=A0 0x00000004=C2=A0 /= / Load events
> > +=C2=A0 #=C2=A0 DEBUG_FS=C2=A0 =C2=A0 =C2=A0 =C2=A0 0x00000008=C2= =A0 // EFI File system
> > +=C2=A0 #=C2=A0 DEBUG_POOL=C2=A0 =C2=A0 =C2=A0 0x00000010=C2=A0 /= / Alloc & Free's
> > +=C2=A0 #=C2=A0 DEBUG_PAGE=C2=A0 =C2=A0 =C2=A0 0x00000020=C2=A0 /= / Alloc & Free's
> > +=C2=A0 #=C2=A0 DEBUG_INFO=C2=A0 =C2=A0 =C2=A0 0x00000040=C2=A0 /= / Verbose
> > +=C2=A0 #=C2=A0 DEBUG_DISPATCH=C2=A0 0x00000080=C2=A0 // PEI/DXE = Dispatchers
> > +=C2=A0 #=C2=A0 DEBUG_VARIABLE=C2=A0 0x00000100=C2=A0 // Variable=
> > +=C2=A0 #=C2=A0 DEBUG_BM=C2=A0 =C2=A0 =C2=A0 =C2=A0 0x00000400=C2= =A0 // Boot Manager
> > +=C2=A0 #=C2=A0 DEBUG_BLKIO=C2=A0 =C2=A0 =C2=A00x00001000=C2=A0 /= / BlkIo Driver
> > +=C2=A0 #=C2=A0 DEBUG_NET=C2=A0 =C2=A0 =C2=A0 =C2=A00x00004000=C2= =A0 // SNI Driver
> > +=C2=A0 #=C2=A0 DEBUG_UNDI=C2=A0 =C2=A0 =C2=A0 0x00010000=C2=A0 /= / UNDI Driver
> > +=C2=A0 #=C2=A0 DEBUG_LOADFILE=C2=A0 0x00020000=C2=A0 // UNDI Dri= ver
> > +=C2=A0 #=C2=A0 DEBUG_EVENT=C2=A0 =C2=A0 =C2=A00x00080000=C2=A0 /= / Event messages
> > +=C2=A0 #=C2=A0 DEBUG_GCD=C2=A0 =C2=A0 =C2=A0 =C2=A00x00100000=C2= =A0 // Global Coherency Database changes
> > +=C2=A0 #=C2=A0 DEBUG_CACHE=C2=A0 =C2=A0 =C2=A00x00200000=C2=A0 /= / Memory range cachability changes
> > +=C2=A0 #=C2=A0 DEBUG_ERROR=C2=A0 =C2=A0 =C2=A00x80000000=C2=A0 /= / Error
> > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x800000= 46
> > +
> > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|= 0x07
> > +
> > +=C2=A0 gEmbeddedTokenSpaceGuid.PcdTimerPeriod|200000
> > +
> > +=C2=A0 gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory= |0
> > +=C2=A0 gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0 > > +=C2=A0 gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryTyp= e|0
> > +=C2=A0 gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesDa= ta|80
> > +=C2=A0 gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCo= de|65
> > +=C2=A0 gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|= 400
> > +=C2=A0 gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|= 20000
> > +=C2=A0 gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20
> > +=C2=A0 gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0
> > +
> > +=C2=A0 gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALS= E
> > +
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInform= ationChange|FALSE
> > +
> > +!if $(SECURE_BOOT_ENABLE) =3D=3D TRUE
> > +=C2=A0 gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificati= onPolicy|0x04
> > +=C2=A0 gEfiSecurityPkgTokenSpaceGuid.PcdFixedMediaImageVerificat= ionPolicy|0x04
> > +=C2=A0 gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerif= icationPolicy|0x04
> > +!endif
> > +
> > +!if $(SECURE_BOOT_ENABLE) =3D=3D TRUE
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x10000=
> > +!else
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x4000<= br> > > +!endif
> > +
> > +=C2=A0 # Default platform supported RFC 4646 languages: English = & French & Chinese Simplified.
> > +=C2=A0 # Default Value of PlatformLangCodes Variable.
> > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultPlatformLa= ngCodes|"en-US;zh-Hans"
> > +
> > +=C2=A0 # Default current RFC 4646 language: Chinese Simplified.<= br> > > +=C2=A0 # Default Value of PlatformLang Variable.
> > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultPlatformLa= ng|"en-US"
> > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4
> > +
> > +=C2=A0 #
> > +=C2=A0 # ACPI Table Version
> > +=C2=A0 #
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersion= s|0x20
> > +
> > +=C2=A0 gArmPlatformTokenSpaceGuid.PL011UartInterrupt|67
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE
> > +
> > +[PcdsDynamicDefault.common.DEFAULT]
> > +=C2=A0 ## This PCD defines the video horizontal resolution.
> > +=C2=A0 #=C2=A0 This PCD could be set to 0 then video resolution = could be at highest resolution.
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResoluti= on|640
> > +=C2=A0 ## This PCD defines the video vertical resolution.
> > +=C2=A0 #=C2=A0 This PCD could be set to 0 then video resolution = could be at highest resolution.
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution= |480
> > +
> > +=C2=A0 ## This PCD defines the Console output row and the defaul= t value is 80 according to UEFI spec.
> > +=C2=A0 #=C2=A0 This PCD could be set to 0 then console output co= uld be at max column and max row.
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|128
> > +=C2=A0 ## This PCD defines the Console output column and the def= ault value is 25 according to UEFI spec.
> > +=C2=A0 #=C2=A0 This PCD could be set to 0 then console output co= uld be at max column and max row.
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|40
> > +
> > +=C2=A0 ## Specify the video horizontal resolution of text setup.=
> > +=C2=A0 # @Prompt Video Horizontal Resolution of Text Setup
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalRes= olution|640
> > +
> > +=C2=A0 ## Specify the video vertical resolution of text setup. > > +=C2=A0 # @Prompt Video Vertical Resolution of Text Setup
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResol= ution|480
> > +
> > +=C2=A0 ## Specify the console output column of text setup.
> > +=C2=A0 # @Prompt Console Output Column of Text Setup
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutColumn|128 > > +=C2=A0 ## Specify the console output row of text setup.
> > +=C2=A0 # @Prompt Console Output Row of Text Setup
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutRow|40
> > +
> > +=C2=A0 ## The number of seconds that the firmware will wait befo= re initiating the original default boot selection.
> > +=C2=A0 #=C2=A0 A value of 0 indicates that the default boot sele= ction is to be initiated immediately on boot.
> > +=C2=A0 #=C2=A0 The value of 0xFFFF then firmware will wait for u= ser input before booting.
> > +=C2=A0 # @Prompt Boot Timeout (s)
> > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|5
> > diff --git a/Platform/Phytium/DurianPkg/DurianPkg.dsc b/Platform/= Phytium/DurianPkg/DurianPkg.dsc
> > new file mode 100644
> > index 000000000000..55eafa2e3a83
> > --- /dev/null
> > +++ b/Platform/Phytium/DurianPkg/DurianPkg.dsc
> > @@ -0,0 +1,278 @@
> > +## @file
> > +# This package provides common open source Phytium Platform modu= les.
> > +#
> > +# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights res= erved.
> > +#
> > +# SPDX-License-Identifier:BSD-2-Clause-Patent
> > +#
> > +##
> > +
> > +################################################################= ################
> > +#
> > +# Defines Section - statements that will be processed to create = a Makefile.
> > +#
> > +################################################################= ################
> > +[Defines]
> > +=C2=A0 PLATFORM_NAME=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =3D DurianPkg
> > +=C2=A0 PLATFORM_GUID=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =3D 8f7ac876-3e7c-11eb-86cb-33f68535d613
> > +=C2=A0 PLATFORM_VERSION=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0=3D 0.1
> > +=C2=A0 DSC_SPECIFICATION=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =3D 0x0001001c
> > +=C2=A0 OUTPUT_DIRECTORY=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0=3D Build/$(PLATFORM_NAME)
> > +=C2=A0 SUPPORTED_ARCHITECTURES=C2=A0 =C2=A0 =C2=A0 =C2=A0 =3D AA= RCH64
> > +=C2=A0 BUILD_TARGETS=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =3D DEBUG|RELEASE|NOOPT
> > +=C2=A0 SKUID_IDENTIFIER=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0=3D DEFAULT
> > +=C2=A0 FLASH_DEFINITION=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0=3D Platform/Phytium/DurianPkg/DurianPkg.fdf
> > +
> > +!include Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dsc.i= nc
> > +
> > +[LibraryClasses.common]
> > +=C2=A0 # Phytium Platform library
> > +=C2=A0 ArmPlatformLib|Silicon/Phytium/FT2000-4Pkg/Library/Platfo= rmLib/PlatformLib.inf
> > +
> > +=C2=A0 # PL011 UART Driver and Dependency Libraries
> > +=C2=A0 SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/P= L011SerialPortLib.inf
> > +=C2=A0 PL011UartClockLib|ArmPlatformPkg/Library/PL011UartClockLi= b/PL011UartClockLib.inf
> > +=C2=A0 PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011Uar= tLib.inf
> > +
> > +[LibraryClasses.common.DXE_DRIVER]
> > +
> > +
> > +################################################################= ################
> > +#
> > +# Pcd Section - list of all EDK II PCD Entries defined by this P= latform
> > +#
> > +################################################################= ################
> > +[PcdsFixedAtBuild.common]
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor|L"D= urian Platform"
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L= "V1.0"
> > +
> > +=C2=A0 gArmTokenSpaceGuid.PcdVFPEnabled|1
> > +=C2=A0 gArmTokenSpaceGuid.PcdArmPrimaryCoreMask|0x101
> > +=C2=A0 gArmTokenSpaceGuid.PcdArmPrimaryCore|0x0
> > +=C2=A0 gArmPlatformTokenSpaceGuid.PcdCoreCount|4
> > +
> > +=C2=A0 #
> > +=C2=A0 # NV Storage PCDs.
> > +=C2=A0 #
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableB= ase64|0xe00000
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableS= ize|0x00010000
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkin= gBase64|0xe10000
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkin= gSize|0x00010000
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareB= ase64|0xe20000
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareS= ize|0x00010000
> > +
> > +=C2=A0 # Size of the region used by UEFI in permanent memory (Re= served 64MB)
> > +=C2=A0 gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|= 0x04000000
> > +
> > +=C2=A0 #
> > +=C2=A0 # PL011 - Serial Terminal
> > +=C2=A0 #
> > +=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x28= 001000
> > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0=
> > +=C2=A0 gArmPlatformTokenSpaceGuid.PL011UartClkInHz|48000000
> > +=C2=A0 gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 > > +
> > +=C2=A0 #
> > +=C2=A0 # ARM General Interrupt Controller
> > +=C2=A0 #
> > +=C2=A0 gArmTokenSpaceGuid.PcdGicDistributorBase|0x29900000
> > +=C2=A0 gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x29980000 > > +=C2=A0 gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x29c0000= 0
> > +
> > +=C2=A0 # System IO space
> > +=C2=A0 gPhytiumPlatformTokenSpaceGuid.PcdSystemIoBase|0x0
> > +=C2=A0 gPhytiumPlatformTokenSpaceGuid.PcdSystemIoSize|0x40000000=
> > +
> > +=C2=A0 #
> > +=C2=A0 # System Memory (2GB ~ 4GB - 64MB), the top 64MB is reser= ved for
> > +=C2=A0 # PBF(the processor basic firmware, Mainly deals the init= ialization
> > +=C2=A0 # of the chip).
> > +=C2=A0 #
> > +=C2=A0 gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
> > +=C2=A0 gArmTokenSpaceGuid.PcdSystemMemorySize|0x7B000000
> > +
> > +=C2=A0 # Stack Size
> > +=C2=A0 gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4= 000
> > +
> > +################################################################= ################
> > +#
> > +# Components Section - list of all EDK II Modules needed by this= Platform
> > +#
> > +################################################################= ################
> > +[Components.common]
> > +=C2=A0 #
> > +=C2=A0 # PCD database
> > +=C2=A0 #
> > +=C2=A0 MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
> > +
> > +=C2=A0 ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCom= mand.inf
> > +=C2=A0 ShellPkg/Application/Shell/Shell.inf {
> > +=C2=A0 =C2=A0 <LibraryClasses>
> > +=C2=A0 =C2=A0 =C2=A0 ShellCommandLib|ShellPkg/Library/UefiShellC= ommandLib/UefiShellCommandLib.inf
> > +=C2=A0 =C2=A0 =C2=A0 NULL|ShellPkg/Library/UefiShellLevel2Comman= dsLib/UefiShellLevel2CommandsLib.inf
> > +=C2=A0 =C2=A0 =C2=A0 NULL|ShellPkg/Library/UefiShellLevel1Comman= dsLib/UefiShellLevel1CommandsLib.inf
> > +=C2=A0 =C2=A0 =C2=A0 NULL|ShellPkg/Library/UefiShellLevel3Comman= dsLib/UefiShellLevel3CommandsLib.inf
> > +=C2=A0 =C2=A0 =C2=A0 NULL|ShellPkg/Library/UefiShellDriver1Comma= ndsLib/UefiShellDriver1CommandsLib.inf
> > +=C2=A0 =C2=A0 =C2=A0 NULL|ShellPkg/Library/UefiShellAcpiViewComm= andLib/UefiShellAcpiViewCommandLib.inf
> > +=C2=A0 =C2=A0 =C2=A0 NULL|ShellPkg/Library/UefiShellDebug1Comman= dsLib/UefiShellDebug1CommandsLib.inf
> > +=C2=A0 =C2=A0 =C2=A0 NULL|ShellPkg/Library/UefiShellInstall1Comm= andsLib/UefiShellInstall1CommandsLib.inf
> > +=C2=A0 =C2=A0 =C2=A0 NULL|ShellPkg/Library/UefiShellNetwork1Comm= andsLib/UefiShellNetwork1CommandsLib.inf
> > +=C2=A0 =C2=A0 =C2=A0 HandleParsingLib|ShellPkg/Library/UefiHandl= eParsingLib/UefiHandleParsingLib.inf
> > +=C2=A0 =C2=A0 =C2=A0 PrintLib|MdePkg/Library/BasePrintLib/BasePr= intLib.inf
> > +=C2=A0 =C2=A0 =C2=A0 BcfgCommandLib|ShellPkg/Library/UefiShellBc= fgCommandLib/UefiShellBcfgCommandLib.inf
>
> Due to upstream changes in edk2, you now also need to add
>=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 OrderedCollectionLib|MdePkg/Library/= BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.i= nf
> in this location.
>
> With this:
> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
>
> /
>=C2=A0 =C2=A0 =C2=A0Leif
>
> > +=C2=A0 }
> > +
> > +=C2=A0 ArmPlatformPkg/PrePi/PeiMPCore.inf {
> > +=C2=A0 =C2=A0 <LibraryClasses>
> > +=C2=A0 =C2=A0 =C2=A0 ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf=
> > +=C2=A0 }
> > +
> > +=C2=A0 #
> > +=C2=A0 # Dxe core entry
> > +=C2=A0 #
> > +=C2=A0 MdeModulePkg/Core/Dxe/DxeMain.inf {
> > +=C2=A0 =C2=A0 <LibraryClasses>
> > +=C2=A0 =C2=A0 =C2=A0 PcdLib|MdePkg/Library/BasePcdLibNull/BasePc= dLibNull.inf
> > +=C2=A0 =C2=A0 =C2=A0 NULL|MdeModulePkg/Library/DxeCrc32GuidedSec= tionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
> > +=C2=A0 }
> > +
> > +=C2=A0 #
> > +=C2=A0 # DXE driver
> > +=C2=A0 #
> > +=C2=A0 MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
> > +=C2=A0 MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDx= e.inf
> > +=C2=A0 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntim= eDxe.inf {
> > +=C2=A0 =C2=A0 <LibraryClasses>
> > +=C2=A0 =C2=A0 =C2=A0 NULL|MdeModulePkg/Library/VarCheckUefiLib/V= arCheckUefiLib.inf
> > +=C2=A0 }
> > +=C2=A0 MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultToleran= tWriteDxe.inf
> > +
> > +=C2=A0 #
> > +=C2=A0 # Common Arm Timer and Gic Components
> > +=C2=A0 #
> > +=C2=A0 ArmPkg/Drivers/CpuDxe/CpuDxe.inf
> > +=C2=A0 ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
> > +=C2=A0 EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
> > +=C2=A0 ArmPkg/Drivers/TimerDxe/TimerDxe.inf
> > +
> > +=C2=A0 #
> > +=C2=A0 # security system
> > +=C2=A0 #
> > +=C2=A0 MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.in= f {
> > +=C2=A0 =C2=A0 <LibraryClasses>
> > +=C2=A0 =C2=A0 =C2=A0 NULL|SecurityPkg/Library/DxeImageVerificati= onLib/DxeImageVerificationLib.inf
> > +=C2=A0 }
> > +
> > +=C2=A0 #
> > +=C2=A0 # network,=C2=A0 mod for https boot.
> > +=C2=A0 #
> > +=C2=A0 NetworkPkg/SnpDxe/SnpDxe.inf
> > +=C2=A0 NetworkPkg/DpcDxe/DpcDxe.inf
> > +=C2=A0 NetworkPkg/MnpDxe/MnpDxe.inf
> > +=C2=A0 NetworkPkg/ArpDxe/ArpDxe.inf
> > +=C2=A0 NetworkPkg/Dhcp4Dxe/Dhcp4Dxe.inf
> > +=C2=A0 NetworkPkg/Ip4Dxe/Ip4Dxe.inf
> > +=C2=A0 NetworkPkg/Mtftp4Dxe/Mtftp4Dxe.inf
> > +=C2=A0 NetworkPkg/Udp4Dxe/Udp4Dxe.inf
> > +=C2=A0 NetworkPkg/VlanConfigDxe/VlanConfigDxe.inf
> > +
> > +=C2=A0 NetworkPkg/Ip6Dxe/Ip6Dxe.inf
> > +=C2=A0 NetworkPkg/Udp6Dxe/Udp6Dxe.inf
> > +=C2=A0 NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
> > +=C2=A0 NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
> > +=C2=A0 NetworkPkg/TcpDxe/TcpDxe.inf
> > +
> > +=C2=A0 NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
> > +
> > +=C2=A0 NetworkPkg/DnsDxe/DnsDxe.inf
> > +=C2=A0 NetworkPkg/HttpUtilitiesDxe/HttpUtilitiesDxe.inf
> > +=C2=A0 NetworkPkg/HttpDxe/HttpDxe.inf
> > +
> > +=C2=A0 #
> > +=C2=A0 # FV Filesystem
> > +=C2=A0 #
> > +=C2=A0 MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFile= SystemDxe.inf
> > +
> > +=C2=A0 #
> > +=C2=A0 # Common Console Components
> > +=C2=A0 # ConIn,ConOut,StdErr
> > +=C2=A0 MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatform= Dxe.inf
> > +=C2=A0 MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitter= Dxe.inf
> > +=C2=A0 MdeModulePkg/Universal/Console/GraphicsConsoleDxe/Graphic= sConsoleDxe.inf
> > +=C2=A0 MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.in= f
> > +=C2=A0 MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
> > +
> > +=C2=A0 SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/Sec= ureBootConfigDxe.inf
> > +
> > +=C2=A0 #
> > +=C2=A0 # Hii database init
> > +=C2=A0 #
> > +=C2=A0 MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf<= br> > > +
> > +=C2=A0 #
> > +=C2=A0 # FAT filesystem + GPT/MBR partitioning
> > +=C2=A0 #
> > +=C2=A0 MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
> > +=C2=A0 MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf=
> > +=C2=A0 MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/E= nglishDxe.inf
> > +=C2=A0 FatPkg/EnhancedFatDxe/Fat.inf
> > +
> > +=C2=A0 #
> > +=C2=A0 # Generic Watchdog Timer
> > +=C2=A0 #
> > +=C2=A0 ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf<= br> > > +
> > +=C2=A0 #
> > +=C2=A0 # Usb Support
> > +=C2=A0 #
> > +=C2=A0 MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
> > +=C2=A0 MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
> > +=C2=A0 MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
> > +=C2=A0 MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
> > +=C2=A0 MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
> > +=C2=A0 MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
> > +=C2=A0 MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.= inf
> > +
> > +=C2=A0 #
> > +=C2=A0 # IDE/AHCI Support
> > +=C2=A0 #
> > +=C2=A0 MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.= inf
> > +=C2=A0 MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
> > +=C2=A0 MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
> > +=C2=A0 MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
> > +=C2=A0 MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.in= f
> > +
> > +=C2=A0 #
> > +=C2=A0 # PCI Support
> > +=C2=A0 #
> > +=C2=A0 ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
> > +=C2=A0 MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDisco= verablePciDeviceDxe.inf
> > +
> > +=C2=A0 #
> > +=C2=A0 # The following 2 module perform the same work except one= operate variable.
> > +=C2=A0 # Only one of both should be put into fdf.
> > +=C2=A0 #
> > +=C2=A0 MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/Monoton= icCounterRuntimeDxe.inf
> > +
> > +=C2=A0 #
> > +=C2=A0 # NVME Support
> > +=C2=A0 #
> > +=C2=A0 MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
> > +
> > +
> > +=C2=A0 #
> > +=C2=A0 # Bds
> > +=C2=A0 #
> > +=C2=A0 MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf > > +=C2=A0 MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.= inf
> > +=C2=A0 MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.in= f
> > +=C2=A0 MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
> > +=C2=A0 MdeModulePkg/Universal/DriverSampleDxe/DriverSampleDxe.in= f
> > +=C2=A0 MdeModulePkg/Application/UiApp/UiApp.inf {
> > +=C2=A0 =C2=A0 <LibraryClasses>
> > +=C2=A0 =C2=A0 =C2=A0 NULL|MdeModulePkg/Library/DeviceManagerUiLi= b/DeviceManagerUiLib.inf
> > +=C2=A0 =C2=A0 =C2=A0 NULL|MdeModulePkg/Library/BootManagerUiLib/= BootManagerUiLib.inf
> > +=C2=A0 =C2=A0 =C2=A0 NULL|MdeModulePkg/Library/BootMaintenanceMa= nagerUiLib/BootMaintenanceManagerUiLib.inf
> > +=C2=A0 }
> > +=C2=A0 MdeModulePkg/Application/BootManagerMenuApp/BootManagerMe= nuApp.inf
> > +
> > diff --git a/Platform/Phytium/DurianPkg/DurianPkg.fdf b/Platform/= Phytium/DurianPkg/DurianPkg.fdf
> > new file mode 100644
> > index 000000000000..6470d53532df
> > --- /dev/null
> > +++ b/Platform/Phytium/DurianPkg/DurianPkg.fdf
> > @@ -0,0 +1,199 @@
> > +## @file
> > +# This package provides common open source Phytium Platform modu= les.
> > +#
> > +# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights res= erved.
> > +#
> > +# SPDX-License-Identifier:BSD-2-Clause-Patent
> > +#
> > +##
> > +
> > +################################################################= ################
> > +#
> > +# FD Section
> > +# The [FD] Section is made up of the definition statements and a=
> > +# description of what goes into=C2=A0 the Flash Device Image.=C2= =A0 Each FD section
> > +# defines one flash "device" image.=C2=A0 A flash devi= ce image may be one of
> > +# the following: Removable media bootable image (like a boot flo= ppy
> > +# image,) an Option ROM image (that would be "flashed"= into an add-in
> > +# card,) a System "Flash"=C2=A0 image (that would be b= urned into a system's
> > +# flash) or an Update ("Capsule") image that will be u= sed to update and
> > +# existing system flash.
> > +#
> > +################################################################= ################
> > +
> > +[FD.PHYTIUM]
> > +BaseAddress=C2=A0 =C2=A0=3D 0x88000000|gArmTokenSpaceGuid.PcdFdB= aseAddress
> > +Size=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =3D 0x01000000|gArmTokenS= paceGuid.PcdFdSize
> > +ErasePolarity =3D 1
> > +
> > +# This one is tricky, it must be: BlockSize * NumBlocks =3D Size=
> > +BlockSize=C2=A0 =C2=A0 =C2=A0=3D 0x10000
> > +NumBlocks=C2=A0 =C2=A0 =C2=A0=3D 0x100
> > +
> > +################################################################= ################
> > +#
> > +# Following are lists of FD Region layout which correspond to th= e locations of different
> > +# images within the flash device.
> > +#
> > +# Regions must be defined in ascending order and may not overlap= .
> > +#
> > +# A Layout Region start with a eight digit hex offset (leading &= quot;0x" required) followed by
> > +# the pipe "|" character, followed by the size of the = region, also in hex with the leading
> > +# "0x" characters. Like:
> > +# Offset|Size
> > +# PcdOffsetCName|PcdSizeCName
> > +# RegionType <FV, DATA, or FILE>
> > +#
> > +################################################################= ################
> > +
> > +0x00000000|0x200000
> > +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize=
> > +FV =3D FVMAIN_COMPACT
> > +
> > +################################################################= ################
> > +#
> > +# FV Section
> > +#
> > +# [FV] section is used to define what components or modules are = placed within a flash
> > +# device file.=C2=A0 This section also defines order the compone= nts and modules are positioned
> > +# within the image.=C2=A0 The [FV] section consists of define st= atements, set statements and
> > +# module statements.
> > +#
> > +################################################################= ################
> > +
> > +[FV.FvMain]
> > +BlockSize=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =3D 0x40
> > +NumBlocks=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =3D 0=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0# This FV gets compressed so make it just big enough > > +FvAlignment=C2=A0 =C2=A0 =C2=A0 =C2=A0 =3D 16=C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0# FV alignment and FV attributes setting.
> > +ERASE_POLARITY=C2=A0 =C2=A0 =C2=A0=3D 1
> > +MEMORY_MAPPED=C2=A0 =C2=A0 =C2=A0 =3D TRUE
> > +STICKY_WRITE=C2=A0 =C2=A0 =C2=A0 =C2=A0=3D TRUE
> > +LOCK_CAP=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0=3D TRUE
> > +LOCK_STATUS=C2=A0 =C2=A0 =C2=A0 =C2=A0 =3D TRUE
> > +WRITE_DISABLED_CAP =3D TRUE
> > +WRITE_ENABLED_CAP=C2=A0 =3D TRUE
> > +WRITE_STATUS=C2=A0 =C2=A0 =C2=A0 =C2=A0=3D TRUE
> > +WRITE_LOCK_CAP=C2=A0 =C2=A0 =C2=A0=3D TRUE
> > +WRITE_LOCK_STATUS=C2=A0 =3D TRUE
> > +READ_DISABLED_CAP=C2=A0 =3D TRUE
> > +READ_ENABLED_CAP=C2=A0 =C2=A0=3D TRUE
> > +READ_STATUS=C2=A0 =C2=A0 =C2=A0 =C2=A0 =3D TRUE
> > +READ_LOCK_CAP=C2=A0 =C2=A0 =C2=A0 =3D TRUE
> > +READ_LOCK_STATUS=C2=A0 =C2=A0=3D TRUE
> > +
> > +=C2=A0 APRIORI DXE {
> > +=C2=A0 =C2=A0 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
> > +=C2=A0 }
> > +
> > +=C2=A0 INF MdeModulePkg/Core/Dxe/DxeMain.inf
> > +=C2=A0 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
> > +
> > +=C2=A0 #
> > +=C2=A0 # PI DXE Drivers producing Architectural Protocols (EFI S= ervices)
> > +=C2=A0 #
> > +=C2=A0 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
> > +=C2=A0 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDx= e.inf
> > +=C2=A0 INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
> > +
> > +=C2=A0 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRunti= meDxe.inf
> > +=C2=A0 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/Mon= otonicCounterRuntimeDxe.inf
> > +
> > +=C2=A0 INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
> > +=C2=A0 INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
> > +=C2=A0 INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
> > +=C2=A0 INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.= inf
> > +
> > +=C2=A0 #
> > +=C2=A0 # Variable services
> > +=C2=A0 #
> > +=C2=A0 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRu= ntimeDxe.inf
> > +=C2=A0 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTol= erantWriteDxe.inf
> > +
> > +=C2=A0 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.= inf
> > +
> > +=C2=A0 #
> > +=C2=A0 # Multiple Console IO support
> > +=C2=A0 #
> > +=C2=A0 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlat= formDxe.inf
> > +=C2=A0 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSpli= tterDxe.inf
> > +=C2=A0 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/Gra= phicsConsoleDxe.inf
> > +=C2=A0 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDx= e.inf
> > +=C2=A0 INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
> > +
> > +=C2=A0 #
> > +=C2=A0 # FAT filesystem + GPT/MBR partitioning
> > +=C2=A0 #
> > +=C2=A0 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf > > +=C2=A0 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe= .inf
> > +=C2=A0 INF FatPkg/EnhancedFatDxe/Fat.inf
> > +=C2=A0 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishD= xe/EnglishDxe.inf
> > +
> > +=C2=A0 #
> > +=C2=A0 # SATA Controller
> > +=C2=A0 #
> > +=C2=A0 INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataController= Dxe.inf
> > +=C2=A0 INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
> > +=C2=A0 INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
> > +=C2=A0 INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
> > +=C2=A0 INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThr= u.inf
> > +
> > +=C2=A0 #
> > +=C2=A0 # NVMe boot devices
> > +=C2=A0 #
> > +=C2=A0 INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf<= br> > > +
> > +=C2=A0 #
> > +=C2=A0 # NetWork
> > +=C2=A0 #
> > +=C2=A0 INF NetworkPkg/SnpDxe/SnpDxe.inf
> > +=C2=A0 INF NetworkPkg/DpcDxe/DpcDxe.inf
> > +=C2=A0 INF NetworkPkg/MnpDxe/MnpDxe.inf
> > +=C2=A0 INF NetworkPkg/ArpDxe/ArpDxe.inf
> > +=C2=A0 INF NetworkPkg/Dhcp4Dxe/Dhcp4Dxe.inf
> > +=C2=A0 INF NetworkPkg/Ip4Dxe/Ip4Dxe.inf
> > +=C2=A0 INF NetworkPkg/Mtftp4Dxe/Mtftp4Dxe.inf
> > +=C2=A0 INF NetworkPkg/Udp4Dxe/Udp4Dxe.inf
> > +=C2=A0 INF NetworkPkg/VlanConfigDxe/VlanConfigDxe.inf
> > +
> > +=C2=A0 #
> > +=C2=A0 # UEFI applications
> > +=C2=A0 #
> > +=C2=A0 INF ShellPkg/Application/Shell/Shell.inf
> > +
> > +=C2=A0 #
> > +=C2=A0 # Bds
> > +=C2=A0 #
> > +=C2=A0 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.in= f
> > +=C2=A0 INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngine= Dxe.inf
> > +=C2=A0 INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDx= e.inf
> > +=C2=A0 INF MdeModulePkg/Universal/DriverSampleDxe/DriverSampleDx= e.inf
> > +=C2=A0 INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
> > +=C2=A0 INF MdeModulePkg/Application/UiApp/UiApp.inf
> > +
> > +[FV.FVMAIN_COMPACT]
> > +FvAlignment=C2=A0 =C2=A0 =C2=A0 =C2=A0 =3D 16
> > +ERASE_POLARITY=C2=A0 =C2=A0 =C2=A0=3D 1
> > +MEMORY_MAPPED=C2=A0 =C2=A0 =C2=A0 =3D TRUE
> > +STICKY_WRITE=C2=A0 =C2=A0 =C2=A0 =C2=A0=3D TRUE
> > +LOCK_CAP=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0=3D TRUE
> > +LOCK_STATUS=C2=A0 =C2=A0 =C2=A0 =C2=A0 =3D TRUE
> > +WRITE_DISABLED_CAP =3D TRUE
> > +WRITE_ENABLED_CAP=C2=A0 =3D TRUE
> > +WRITE_STATUS=C2=A0 =C2=A0 =C2=A0 =C2=A0=3D TRUE
> > +WRITE_LOCK_CAP=C2=A0 =C2=A0 =C2=A0=3D TRUE
> > +WRITE_LOCK_STATUS=C2=A0 =3D TRUE
> > +READ_DISABLED_CAP=C2=A0 =3D TRUE
> > +READ_ENABLED_CAP=C2=A0 =C2=A0=3D TRUE
> > +READ_STATUS=C2=A0 =C2=A0 =C2=A0 =C2=A0 =3D TRUE
> > +READ_LOCK_CAP=C2=A0 =C2=A0 =C2=A0 =3D TRUE
> > +READ_LOCK_STATUS=C2=A0 =C2=A0=3D TRUE
> > +
> > +=C2=A0 INF ArmPlatformPkg/PrePi/PeiMPCore.inf
> > +
> > +=C2=A0 FILE FV_IMAGE =3D 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {<= br> > > +=C2=A0 =C2=A0 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403C= F PROCESSING_REQUIRED =3D TRUE {
> > +=C2=A0 =C2=A0 =C2=A0 SECTION FV_IMAGE =3D FVMAIN
> > +=C2=A0 =C2=A0 }
> > +=C2=A0 }
> > +
> > +!include Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.fdf.i= nc
> > diff --git a/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/Plat= formLib.inf b/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib.i= nf
> > new file mode 100644
> > index 000000000000..40c070767a96
> > --- /dev/null
> > +++ b/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib= .inf
> > @@ -0,0 +1,55 @@
> > +#/** @file
> > +#=C2=A0 Library for Phytium Platform.
> > +#
> > +#=C2=A0 Copyright (C) 2020, Phytium Technology Co, Ltd. All righ= ts reserved.<BR>
> > +#
> > +#=C2=A0 SPDX-License-Identifier: BSD-2-Clause-Patent
> > +#
> > +#**/
> > +
> > +[Defines]
> > +=C2=A0 INF_VERSION=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =3D 0x0001001b
> > +=C2=A0 BASE_NAME=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =3D PlatformLib
> > +=C2=A0 FILE_GUID=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =3D fac08f56-40fe-11eb-a2a3-27b46864b1f3
> > +=C2=A0 MODULE_TYPE=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =3D BASE
> > +=C2=A0 VERSION_STRING=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0=3D 1.0
> > +=C2=A0 LIBRARY_CLASS=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =3D ArmPlatformLib
> > +
> > +[Packages]
> > +=C2=A0 ArmPkg/ArmPkg.dec
> > +=C2=A0 ArmPlatformPkg/ArmPlatformPkg.dec
> > +=C2=A0 MdePkg/MdePkg.dec
> > +=C2=A0 MdeModulePkg/MdeModulePkg.dec
> > +=C2=A0 Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec
> > +
> > +[LibraryClasses]
> > +=C2=A0 ArmSmcLib
> > +=C2=A0 HobLib
> > +
> > +[Sources.common]
> > +=C2=A0 PlatformLib.c
> > +=C2=A0 PlatformLibMem.c
> > +
> > +[Sources.AARCH64]
> > +=C2=A0 AArch64/PhytiumPlatformHelper.S
> > +
> > +[Guids]
> > +
> > +[FixedPcd]
> > +=C2=A0 gPhytiumPlatformTokenSpaceGuid.PcdSystemIoBase
> > +=C2=A0 gPhytiumPlatformTokenSpaceGuid.PcdSystemIoSize
> > +=C2=A0 gPhytiumPlatformTokenSpaceGuid.PcdPciConfigBase
> > +=C2=A0 gPhytiumPlatformTokenSpaceGuid.PcdPciConfigSize
> > +=C2=A0 gArmTokenSpaceGuid.PcdPciBusMin
> > +=C2=A0 gArmTokenSpaceGuid.PcdPciBusMax
> > +=C2=A0 gArmTokenSpaceGuid.PcdPciIoBase
> > +=C2=A0 gArmTokenSpaceGuid.PcdPciIoSize
> > +=C2=A0 gArmTokenSpaceGuid.PcdPciIoTranslation
> > +=C2=A0 gArmTokenSpaceGuid.PcdPciMmio32Base
> > +=C2=A0 gArmTokenSpaceGuid.PcdPciMmio32Size
> > +=C2=A0 gArmTokenSpaceGuid.PcdPciMmio32Translation
> > +=C2=A0 gArmTokenSpaceGuid.PcdPciMmio64Base
> > +=C2=A0 gArmTokenSpaceGuid.PcdPciMmio64Size
> > +
> > +[Pcd]
> > +=C2=A0 gArmPlatformTokenSpaceGuid.PcdCoreCount
> > diff --git a/Silicon/Phytium/PhytiumCommonPkg/Include/SystemServi= ceInterface.h b/Silicon/Phytium/PhytiumCommonPkg/Include/SystemServiceInter= face.h
> > new file mode 100644
> > index 000000000000..c4395153a3de
> > --- /dev/null
> > +++ b/Silicon/Phytium/PhytiumCommonPkg/Include/SystemServiceInter= face.h
> > @@ -0,0 +1,112 @@
> > +/** @file
> > +
> > +=C2=A0 Copyright (C) 2020, Phytium Technology Co Ltd. All rights= reserved.<BR>
> > +
> > +=C2=A0 SPDX-License-Identifier: BSD-2-Clause-Patent
> > +
> > +**/
> > +
> > +#ifndef SYSTEM_SERVICE_INTERFACE_H_
> > +#define SYSTEM_SERVICE_INTERFACE_H_
> > +
> > +/* SMC function IDs for OEM Service queries */
> > +#define PHYTIUM_OEM_SVC_PSSI_VERSION=C2=A0 =C2=A00x8200ff03
> > +#define PHYTIUM_OEM_SVC_PBF_VERSION=C2=A0 =C2=A0 0x82000001
> > +#define PHYTIUM_OEM_SVC_CPU_VERSION=C2=A0 =C2=A0 0xc2000002
> > +#define PHYTIUM_OEM_SVC_CPU_MAPS=C2=A0 =C2=A0 =C2=A0 =C2=A00xc20= 00003
> > +#define PHYTIUM_OEM_SVC_CPU_CONF=C2=A0 =C2=A0 =C2=A0 =C2=A00xc20= 00004
> > +#define PHYTIUM_OEM_SVC_MEM_REGIONS=C2=A0 =C2=A0 0xc2000005
> > +#define PHYTIUM_OEM_SVC_MCU_DIMMS=C2=A0 =C2=A0 =C2=A0 0xc2000006=
> > +#define PHYTIUM_OEM_SVC_PCI_CONTROLLER 0xc2000007
> > +#define PHYTIUM_OEM_SVC_HOST_BRIDGE=C2=A0 =C2=A0 0xc2000008
> > +#define PHYTIUM_OEM_SVC_GET_FLASH_CMD=C2=A0 0xC200000C
> > +
> > +#define PHYTIUM_IOBASE_MASK=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A00xfffffff
> > +#define PHYTIUM_MEMIO32_MASK=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 0= xffffffff
> > +#define PHYTIUM_MEMIO64_MASK=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 0= xffffffffff
> > +
> > +#pragma pack(1)
> > +
> > +typedef struct {
> > +=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0CpuMapCount;
> > +=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0CpuMap[1];
> > +} PHYTIUM_CPU_MAP_INFO;
> > +
> > +
> > +typedef struct {
> > +=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0CpuFreq;=C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0// Hz
> > +=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0CpuL3CacheSize;=C2=A0 =C2=A0 = =C2=A0 // Byte
> > +=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0CpuL3CacheLineSize;=C2=A0 // By= te
> > +} PHYTIUM_CPU_COURE_INFO;
> > +
> > +typedef struct {
> > +=C2=A0 UINT64=C2=A0 =C2=A0 CupVersion;=C2=A0 =C2=A0 =C2=A0 =C2= =A0//cpu version
> > +=C2=A0 PHYTIUM_CPU_COURE_INFO CpuCoreInfo;=C2=A0 =C2=A0 //cpu co= re info
> > +=C2=A0 PHYTIUM_CPU_MAP_INFO=C2=A0 =C2=A0CpuMapInfo;=C2=A0 =C2=A0= =C2=A0//cpu map info
> > +}PHYTIUM_CPU_INFO;
> > +
> > +typedef struct {
> > +=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0MemSize;=C2=A0 =C2=A0 // MB
> > +=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0MemDramId;
> > +=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0MemModuleId;
> > +=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0MemSerial;
> > +=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0MemSlotNumber;
> > +=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0MemFeatures;
> > +} MCU_DIMM;
> > +
> > +#define MCU_DIMM_MAXCOUNT 2
> > +
> > +typedef struct {
> > +=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0MemFreq;=C2=A0 =C2=A0 // MHz > > +=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0MemDimmCount;
> > +=C2=A0 MCU_DIMM=C2=A0 =C2=A0McuDimm[1];
> > +} MCU_DIMMS;
> > +
> > +typedef struct {
> > +=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0MemStart;
> > +=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0MemSize;
> > +=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0MemNodeId;
> > +} MEMORY_BLOCK;
> > +
> > +typedef struct {
> > +=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0 =C2=A0MemBlockCount;
> > +=C2=A0 MEMORY_BLOCK MemBlock[1];
> > +} MEMORY_INFO;
> > +
> > +typedef struct {
> > +=C2=A0 UINT8=C2=A0 =C2=A0 PciLane;
> > +=C2=A0 UINT8=C2=A0 =C2=A0 PciSpeed;
> > +=C2=A0 UINT8=C2=A0 =C2=A0 Reserved[6];
> > +} PCI_BLOCK;
> > +
> > +typedef struct {
> > +=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0 =C2=A0PciCount;
> > +=C2=A0 PCI_BLOCK=C2=A0 =C2=A0 PciBlock[1];
> > +} PHYTIUM_PCI_CONTROLLER;
> > +
> > +typedef struct {
> > +=C2=A0 UINT8=C2=A0 =C2=A0 BusStart;
> > +=C2=A0 UINT8=C2=A0 =C2=A0 BusEnd;
> > +=C2=A0 UINT8=C2=A0 =C2=A0 Reserved[6];
> > +=C2=A0 UINT64=C2=A0 =C2=A0PciConfigBase;
> > +=C2=A0 UINT64=C2=A0 =C2=A0IoBase;
> > +=C2=A0 UINT64=C2=A0 =C2=A0IoSize;
> > +=C2=A0 UINT64=C2=A0 =C2=A0Mem32Base;
> > +=C2=A0 UINT64=C2=A0 =C2=A0Mem32Size;
> > +=C2=A0 UINT64=C2=A0 =C2=A0Mem64Base;
> > +=C2=A0 UINT64=C2=A0 =C2=A0Mem64Size;
> > +=C2=A0 UINT16=C2=A0 =C2=A0IntA;
> > +=C2=A0 UINT16=C2=A0 =C2=A0IntB;
> > +=C2=A0 UINT16=C2=A0 =C2=A0IntC;
> > +=C2=A0 UINT16=C2=A0 =C2=A0IntD;
> > +} PCI_HOST_BLOCK;
> > +
> > +typedef struct {
> > +=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 PciHostCount; > > +=C2=A0 PCI_HOST_BLOCK=C2=A0 PciHostBlock[1];
> > +} PHYTIUM_PCI_HOST_BRIDGE;
> > +
> > +#pragma pack ()
> > +
> > +
> > +#endif // SYSTEM_SERVICE_INTERFACE_H_
> > diff --git a/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/Plat= formLib.c b/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib.c > > new file mode 100644
> > index 000000000000..6a8d22657489
> > --- /dev/null
> > +++ b/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib= .c
> > @@ -0,0 +1,137 @@
> > +/** @file
> > +=C2=A0 Library for Phytium platform.
> > +
> > +=C2=A0 Copyright (C) 2020, Phytium Technology Co Ltd. All rights= reserved.<BR>
> > +
> > +=C2=A0 SPDX-License-Identifier: BSD-2-Clause-Patent
> > +
> > +**/
> > +
> > +#include <Library/ArmPlatformLib.h>
> > +#include <Library/DebugLib.h>
> > +#include <Library/IoLib.h>
> > +#include <Library/PcdLib.h>
> > +#include <Ppi/ArmMpCoreInfo.h>
> > +
> > +ARM_CORE_INFO mPhytiumMpCoreInfoTable[] =3D {
> > +=C2=A0 {
> > +=C2=A0 =C2=A0 0x0, 0x0,=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 // Cluster 0, Core 0
> > +
> > +=C2=A0 =C2=A0 // MP Core MailBox Set/Get/Clear Addresses and Cle= ar Value
> > +=C2=A0 =C2=A0 (EFI_PHYSICAL_ADDRESS)0,
> > +=C2=A0 =C2=A0 (EFI_PHYSICAL_ADDRESS)0,
> > +=C2=A0 =C2=A0 (EFI_PHYSICAL_ADDRESS)0,
> > +=C2=A0 =C2=A0 (UINT64)0xFFFFFFFF
> > +=C2=A0 }
> > +};
> > +
> > +/*
> > +=C2=A0 This function geted the current Boot Mode.
> > +
> > +=C2=A0 This function returns the boot reason on the platform. > > +
> > +=C2=A0 @return=C2=A0 =C2=A0Return the current Boot Mode of the p= latform.
> > +
> > +*/
> > +EFI_BOOT_MODE
> > +ArmPlatformGetBootMode (
> > +=C2=A0 VOID
> > +=C2=A0 )
> > +{
> > +=C2=A0 return BOOT_WITH_FULL_CONFIGURATION;
> > +}
> > +
> > +
> > +/**
> > +=C2=A0 Initialize controllers that must setup in the normal worl= d.
> > +
> > +=C2=A0 This function is called by the ArmPlatformPkg/Pei or ArmP= latformPkg/Pei/PlatformPeim
> > +=C2=A0 in the PEI phase.
> > +
> > +=C2=A0 @retval=C2=A0 =C2=A0 =C2=A0 EFI_SUCCESS=C2=A0 =C2=A0 ArmP= latformInitialize() is executed successfully.
> > +
> > +**/
> > +RETURN_STATUS
> > +ArmPlatformInitialize (
> > +=C2=A0 IN=C2=A0 UINTN=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0MpId
> > +=C2=A0 )
> > +{
> > +=C2=A0 return RETURN_SUCCESS;
> > +}
> > +
> > +
> > +/**
> > +=C2=A0 This function Inited the system (or sometimes called perm= anent) memory.
> > +
> > +=C2=A0 This memory is generally represented by the DRAM.
> > +
> > +=C2=A0 @param[in]=C2=A0 =C2=A0None.
> > +
> > +=C2=A0 @retval=C2=A0 =C2=A0 =C2=A0 None.
> > +
> > +**/
> > +VOID
> > +ArmPlatformInitializeSystemMemory (
> > +=C2=A0 VOID
> > +=C2=A0 )
> > +{
> > +=C2=A0 // Nothing to do here
> > +}
> > +
> > +
> > +/**
> > +=C2=A0 This function geted the information of core.
> > +
> > +=C2=A0 @param[out]=C2=A0 CoreCount=C2=A0 =C2=A0 =C2=A0 The count= of CoreInfoTable.
> > +=C2=A0 @param[out]=C2=A0 ArmCoreTable=C2=A0 =C2=A0The pointer of= CoreInfoTable.
> > +
> > +=C2=A0 @retval=C2=A0 =C2=A0 =C2=A0 EFI_SUCCESS=C2=A0 =C2=A0 PreP= eiCoreGetMpCoreInfo() is executed successfully.
> > +
> > +**/
> > +EFI_STATUS
> > +PrePeiCoreGetMpCoreInfo (
> > +=C2=A0 OUT UINTN=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0*CoreCount,
> > +=C2=A0 OUT ARM_CORE_INFO=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0**ArmCoreTable
> > +=C2=A0 )
> > +{
> > +=C2=A0 *CoreCount=C2=A0 =C2=A0 =3D PcdGet32 (PcdCoreCount);
> > +=C2=A0 *ArmCoreTable =3D mPhytiumMpCoreInfoTable;
> > +
> > +=C2=A0 return EFI_SUCCESS;
> > +}
> > +
> > +//
> > +// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpi= Guid is
> > +// undefined in the contect of PrePeiCore
> > +//
> > +EFI_GUID mArmMpCoreInfoPpiGuid =3D ARM_MP_CORE_INFO_PPI_GUID; > > +ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi =3D { PrePeiCoreGetMpCoreInf= o };
> > +
> > +EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] =3D
> > +{
> > +=C2=A0 {
> > +=C2=A0 =C2=A0 EFI_PEI_PPI_DESCRIPTOR_PPI,
> > +=C2=A0 =C2=A0 &mArmMpCoreInfoPpiGuid,
> > +=C2=A0 =C2=A0 &mMpCoreInfoPpi
> > +=C2=A0 }
> > +};
> > +
> > +
> > +/**
> > +=C2=A0 This function geted the information of Ppitable.
> > +
> > +=C2=A0 @param[out]=C2=A0 PpiListSize=C2=A0 =C2=A0 =C2=A0 The siz= e of Ppitable.
> > +=C2=A0 @param[out]=C2=A0 PpiList=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 The pointer of Ppitable.
> > +
> > +=C2=A0 @retval=C2=A0 =C2=A0 =C2=A0 None.
> > +
> > +**/
> > +VOID
> > +ArmPlatformGetPlatformPpiList (
> > +=C2=A0 OUT UINTN=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0*PpiListSize,
> > +=C2=A0 OUT EFI_PEI_PPI_DESCRIPTOR=C2=A0 **PpiList
> > +=C2=A0 )
> > +{
> > +=C2=A0 *PpiListSize =3D sizeof (gPlatformPpiTable);
> > +=C2=A0 *PpiList =3D gPlatformPpiTable;
> > +}
> > diff --git a/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/Plat= formLibMem.c b/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLibM= em.c
> > new file mode 100644
> > index 000000000000..7e54cb6e744f
> > --- /dev/null
> > +++ b/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib= Mem.c
> > @@ -0,0 +1,156 @@
> > +/** @file
> > +=C2=A0 Library of memory map for Phytium platform.
> > +
> > +=C2=A0 Copyright (C) 2020, Phytium Technology Co Ltd. All rights= reserved.<BR>
> > +
> > +=C2=A0 SPDX-License-Identifier: BSD-2-Clause-Patent
> > +
> > +**/
> > +
> > +#include <Library/ArmPlatformLib.h>
> > +#include <Library/DebugLib.h>
> > +#include <Library/HobLib.h>
> > +#include <Library/PcdLib.h>
> > +#include <Library/MemoryAllocationLib.h>
> > +#include <Library/ArmSmcLib.h>
> > +#include <SystemServiceInterface.h>
> > +
> > +// Number of Virtual Memory Map Descriptors
> > +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 32
> > +
> > +// DDR attributes
> > +#define DDR_ATTRIBUTES_CACHED=C2=A0 =C2=A0 =C2=A0 ARM_MEMORY_REG= ION_ATTRIBUTE_WRITE_BACK
> > +#define DDR_ATTRIBUTES_UNCACHED=C2=A0 =C2=A0 ARM_MEMORY_REGION_A= TTRIBUTE_UNCACHED_UNBUFFERED
> > +
> > +/**
> > +=C2=A0 Return the Virtual Memory Map of your platform
> > +
> > +=C2=A0 This Virtual Memory Map is used by MemoryInitPei Module t= o initialize the MMU on your platform.
> > +
> > +=C2=A0 @param[out]=C2=A0 VirtualMemoryMap=C2=A0 Array of ARM_MEM= ORY_REGION_DESCRIPTOR describing a Physical-to-
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0Virtual Memory mappi= ng. This array must be ended by a zero-filled
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0entry
> > +**/
> > +VOID
> > +ArmPlatformGetVirtualMemoryMap (
> > +=C2=A0 IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
> > +=C2=A0 )
> > +{
> > +=C2=A0 ARM_MEMORY_REGION_ATTRIBUTES=C2=A0 CacheAttributes;
> > +=C2=A0 ARM_MEMORY_REGION_DESCRIPTOR=C2=A0 *VirtualMemoryTable; > > +=C2=A0 EFI_RESOURCE_ATTRIBUTE_TYPE=C2=A0 =C2=A0ResourceAttribute= s;
> > +=C2=A0 MEMORY_BLOCK=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 *MemBlock;
> > +=C2=A0 MEMORY_INFO=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0*MemInfo;
> > +=C2=A0 ARM_SMC_ARGS=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 ArmSmcArgs;
> > +=C2=A0 UINT32=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 MemBlockCnt;
> > +=C2=A0 UINT32=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 Index1;
> > +=C2=A0 UINT32=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 Index2;
> > +
> > +=C2=A0 MemBlock =3D NULL;
> > +=C2=A0 MemInfo=C2=A0 =3D NULL;
> > +=C2=A0 MemBlockCnt =3D 0;
> > +=C2=A0 Index1=C2=A0 =C2=A0 =C2=A0 =3D 0;
> > +=C2=A0 Index2=C2=A0 =C2=A0 =C2=A0 =3D 0;
> > +=C2=A0 CacheAttributes =3D ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BAC= K;
> > +
> > +=C2=A0 ASSERT (VirtualMemoryMap !=3D NULL);
> > +=C2=A0 VirtualMemoryTable =3D (ARM_MEMORY_REGION_DESCRIPTOR*)All= ocatePages \
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0(EFI_SIZE_TO_PAGES (sizeof (ARM_MEMORY_REGION_DE= SCRIPTOR) * \
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
> > +=C2=A0 if (VirtualMemoryTable =3D=3D NULL) {
> > +=C2=A0 =C2=A0 return;
> > +=C2=A0 }
> > +
> > +=C2=A0 ResourceAttributes =3D
> > +=C2=A0 =C2=A0 EFI_RESOURCE_ATTRIBUTE_PRESENT |
> > +=C2=A0 =C2=A0 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
> > +=C2=A0 =C2=A0 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
> > +=C2=A0 =C2=A0 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
> > +=C2=A0 =C2=A0 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | > > +=C2=A0 =C2=A0 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
> > +=C2=A0 =C2=A0 EFI_RESOURCE_ATTRIBUTE_TESTED;
> > +
> > +=C2=A0 MemInfo =3D AllocatePages (1);
> > +=C2=A0 ASSERT (MemInfo !=3D NULL);
> > +
> > +=C2=A0 ArmSmcArgs.Arg0 =3D PHYTIUM_OEM_SVC_MEM_REGIONS;
> > +=C2=A0 ArmSmcArgs.Arg1 =3D (UINTN) MemInfo;
> > +=C2=A0 ArmSmcArgs.Arg2 =3D EFI_PAGE_SIZE;
> > +=C2=A0 ArmCallSmc (&ArmSmcArgs);
> > +=C2=A0 if (ArmSmcArgs.Arg0 =3D=3D 0) {
> > +=C2=A0 =C2=A0 MemBlockCnt =3D MemInfo->MemBlockCount;
> > +=C2=A0 =C2=A0 MemBlock =3D MemInfo->MemBlock;
> > +=C2=A0 } else {
> > +=C2=A0 =C2=A0 ASSERT (FALSE);
> > +=C2=A0 }
> > +
> > +=C2=A0 //Soc Io Space
> > +=C2=A0 VirtualMemoryTable[Index1].PhysicalBase=C2=A0 =C2=A0=3D P= cdGet64 (PcdSystemIoBase);
> > +=C2=A0 VirtualMemoryTable[Index1].VirtualBase=C2=A0 =C2=A0 =3D P= cdGet64 (PcdSystemIoBase);
> > +=C2=A0 VirtualMemoryTable[Index1].Length=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0=3D PcdGet64 (PcdSystemIoSize);
> > +=C2=A0 VirtualMemoryTable[Index1].Attributes=C2=A0 =C2=A0 =C2=A0= =3D ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
> > +
> > +=C2=A0 //
> > +=C2=A0 // PCI Configuration Space
> > +=C2=A0 //
> > +=C2=A0 VirtualMemoryTable[++Index1].PhysicalBase=C2=A0 =3D PcdGe= t64 (PcdPciConfigBase);
> > +=C2=A0 VirtualMemoryTable[Index1].VirtualBase=C2=A0 =C2=A0 =C2= =A0=3D PcdGet64 (PcdPciConfigBase);
> > +=C2=A0 VirtualMemoryTable[Index1].Length=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =3D PcdGet64 (PcdPciConfigSize);
> > +=C2=A0 VirtualMemoryTable[Index1].Attributes=C2=A0 =C2=A0 =C2=A0= =3D ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
> > +
> > +=C2=A0 //
> > +=C2=A0 // PCI Memory Space
> > +=C2=A0 //
> > +=C2=A0 VirtualMemoryTable[++Index1].PhysicalBase=C2=A0 =3D PcdGe= t64 (PcdPciIoBase) + PcdGet64 (PcdPciIoTranslation);
> > +=C2=A0 VirtualMemoryTable[Index1].VirtualBase=C2=A0 =C2=A0 =C2= =A0=3D PcdGet64 (PcdPciIoBase) + PcdGet64 (PcdPciIoTranslation);
> > +=C2=A0 VirtualMemoryTable[Index1].Length=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =3D PcdGet64 (PcdPciIoSize);
> > +=C2=A0 VirtualMemoryTable[Index1].Attributes=C2=A0 =C2=A0 =C2=A0= =3D ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
> > +
> > +=C2=A0 //
> > +=C2=A0 // PCI Memory Space
> > +=C2=A0 //
> > +=C2=A0 VirtualMemoryTable[++Index1].PhysicalBase=C2=A0 =3D PcdGe= t32 (PcdPciMmio32Base);
> > +=C2=A0 VirtualMemoryTable[Index1].VirtualBase=C2=A0 =C2=A0 =C2= =A0=3D PcdGet32 (PcdPciMmio32Base);
> > +=C2=A0 VirtualMemoryTable[Index1].Length=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =3D PcdGet32 (PcdPciMmio32Size);
> > +=C2=A0 VirtualMemoryTable[Index1].Attributes=C2=A0 =C2=A0 =C2=A0= =3D ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
> > +
> > +=C2=A0 //
> > +=C2=A0 // 64-bit PCI Memory Space
> > +=C2=A0 //
> > +=C2=A0 VirtualMemoryTable[++Index1].PhysicalBase=C2=A0 =3D PcdGe= t64 (PcdPciMmio64Base);
> > +=C2=A0 VirtualMemoryTable[Index1].VirtualBase=C2=A0 =C2=A0 =C2= =A0=3D PcdGet64 (PcdPciMmio64Base);
> > +=C2=A0 VirtualMemoryTable[Index1].Length=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =3D PcdGet64 (PcdPciMmio64Size);
> > +=C2=A0 VirtualMemoryTable[Index1].Attributes=C2=A0 =C2=A0 =C2=A0= =3D ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
> > +
> > +=C2=A0 //DDR
> > +=C2=A0 for (Index2 =3D 0; Index2 < MemBlockCnt; Index2++) { > > +=C2=A0 =C2=A0 VirtualMemoryTable[++Index1].PhysicalBase =3D MemB= lock->MemStart;
> > +=C2=A0 =C2=A0 VirtualMemoryTable[Index1].VirtualBase=C2=A0 =C2= =A0 =3D MemBlock->MemStart;
> > +=C2=A0 =C2=A0 VirtualMemoryTable[Index1].Length=C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0=3D MemBlock->MemSize;
> > +=C2=A0 =C2=A0 VirtualMemoryTable[Index1].Attributes=C2=A0 =C2=A0= =C2=A0=3D CacheAttributes;
> > +
> > +=C2=A0 =C2=A0 BuildResourceDescriptorHob (
> > +=C2=A0 =C2=A0 =C2=A0 EFI_RESOURCE_SYSTEM_MEMORY,
> > +=C2=A0 =C2=A0 =C2=A0 ResourceAttributes,
> > +=C2=A0 =C2=A0 =C2=A0 MemBlock->MemStart,
> > +=C2=A0 =C2=A0 =C2=A0 MemBlock->MemSize
> > +=C2=A0 =C2=A0 =C2=A0 );
> > +
> > +=C2=A0 =C2=A0 MemBlock++;
> > +=C2=A0 }
> > +
> > +=C2=A0 // End of Table
> > +=C2=A0 VirtualMemoryTable[++Index1].PhysicalBase =3D 0;
> > +=C2=A0 VirtualMemoryTable[Index1].VirtualBase=C2=A0 =C2=A0 =3D 0= ;
> > +=C2=A0 VirtualMemoryTable[Index1].Length=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0=3D 0;
> > +=C2=A0 VirtualMemoryTable[Index1].Attributes=C2=A0 =C2=A0 =C2=A0= =3D (ARM_MEMORY_REGION_ATTRIBUTES)0;
> > +
> > +
> > +=C2=A0 for (Index2 =3D 0; Index2 < Index1; Index2++) {
> > +=C2=A0 =C2=A0 DEBUG ((DEBUG_ERROR, "PhysicalBase %12lx Virt= ualBase %12lx Length %12lx Attributes %12lx\n",\
> > +=C2=A0 =C2=A0 =C2=A0 VirtualMemoryTable[Index2].PhysicalBase, Vi= rtualMemoryTable[Index2].VirtualBase, \
> > +=C2=A0 =C2=A0 =C2=A0 VirtualMemoryTable[Index2].Length, VirtualM= emoryTable[Index2].Attributes));
> > +=C2=A0 }
> > +
> > +=C2=A0 *VirtualMemoryMap =3D VirtualMemoryTable;
> > +}
> > diff --git a/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/AArc= h64/PhytiumPlatformHelper.S b/Silicon/Phytium/FT2000-4Pkg/Library/PlatformL= ib/AArch64/PhytiumPlatformHelper.S
> > new file mode 100644
> > index 000000000000..cce23b786197
> > --- /dev/null
> > +++ b/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/AArch64/Phy= tiumPlatformHelper.S
> > @@ -0,0 +1,76 @@
> > +#
> > +#=C2=A0 Copyright (c) 2011-2013, ARM Limited. All rights reserve= d.
> > +#
> > +#=C2=A0 This program and the accompanying materials
> > +#=C2=A0 are licensed and made available under the terms and cond= itions of the BSD License
> > +#=C2=A0 which accompanies this distribution.=C2=A0 The full text= of the license may be found at
> > +#=C2=A0 http://opensource.org/licenses/bsd-= license.php
> > +#
> > +#=C2=A0 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN &= quot;AS IS" BASIS,
> > +#=C2=A0 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHE= R EXPRESS OR IMPLIED.
> > +#
> > +#
> > +
> > +#include <AsmMacroIoLibV8.h>
> > +#include <Base.h>
> > +#include <Library/ArmLib.h>
> > +#include <Library/PcdLib.h>
> > +#include <AutoGen.h>
> > +
> > +.text
> > +.align 2
> > +
> > +GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
> > +GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
> > +GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
> > +GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
> > +
> > +PrimaryCoreMpid:=C2=A0 .word=C2=A0 =C2=A0 0x0
> > +
> > +
> > +ASM_PFX(ArmPlatformPeiBootAction):
> > +=C2=A0 // Save MPIDR_EL1[23:0] in a variable.
> > +=C2=A0 mov=C2=A0 =C2=A0x20, x30
> > +=C2=A0 bl=C2=A0 =C2=A0 ASM_PFX(ArmReadMpidr)
> > +=C2=A0 lsl=C2=A0 =C2=A0w0, w0, #8
> > +=C2=A0 lsr=C2=A0 =C2=A0w0, w0, #8
> > +=C2=A0 ldr=C2=A0 =C2=A0x1, =3DPrimaryCoreMpid
> > +=C2=A0 str=C2=A0 =C2=A0w0, [x1]
> > +=C2=A0 ret=C2=A0 =C2=A0x20
> > +
> > +//UINTN
> > +//ArmPlatformGetPrimaryCoreMpId (
> > +//=C2=A0 VOID
> > +//=C2=A0 );
> > +ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
> > +=C2=A0 ldr=C2=A0 =C2=A0x0, =3DPrimaryCoreMpid
> > +=C2=A0 ldr=C2=A0 =C2=A0w0, [x0]
> > +=C2=A0 ret
> > +
> > +//UINTN
> > +//ArmPlatformIsPrimaryCore (
> > +//=C2=A0 IN UINTN MpId
> > +//=C2=A0 );
> > +ASM_PFX(ArmPlatformIsPrimaryCore):
> > +=C2=A0 mov=C2=A0 =C2=A0x20, x30
> > +=C2=A0 bl=C2=A0 =C2=A0 ASM_PFX(ArmReadMpidr)
> > +=C2=A0 lsl=C2=A0 =C2=A0w0, w0, #8
> > +=C2=A0 lsr=C2=A0 =C2=A0w0, w0, #8
> > +=C2=A0 ldr=C2=A0 =C2=A0x1, =3DPrimaryCoreMpid
> > +=C2=A0 ldr=C2=A0 =C2=A0w1, [x1]
> > +=C2=A0 cmp=C2=A0 =C2=A0w0, w1
> > +=C2=A0 cset=C2=A0 x0, eq
> > +=C2=A0 ret=C2=A0 =C2=A0x20
> > +
> > +//UINTN
> > +//ArmPlatformGetCorePosition (
> > +//=C2=A0 IN UINTN MpId
> > +//=C2=A0 );
> > +// With this function: CorePos =3D (ClusterId * 4) + CoreId
> > +ASM_PFX(ArmPlatformGetCorePosition):
> > +=C2=A0 and=C2=A0 =C2=A0x1, x0, #ARM_CORE_MASK
> > +=C2=A0 and=C2=A0 =C2=A0x0, x0, #ARM_CLUSTER_MASK
> > +=C2=A0 add=C2=A0 =C2=A0x0, x1, x0, LSR #6
> > +=C2=A0 ret
> > +
> > +ASM_FUNCTION_REMOVE_IF_UNREFERENCED
> > diff --git a/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.fd= f.inc b/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.fdf.inc
> > new file mode 100644
> > index 000000000000..641266c6012f
> > --- /dev/null
> > +++ b/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.fdf.inc > > @@ -0,0 +1,119 @@
> > +## @file
> > +# This package provides common open source Phytium silicon modul= es.
> > +#
> > +# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights res= erved.
> > +#
> > +# SPDX-License-Identifier:BSD-2-Clause-Patent
> > +#
> > +##
> > +
> > +################################################################= ############
> > +# Example of a DXE_DRIVER FFS file with a Checksum encapsulation= section=C2=A0 =C2=A0#
> > +################################################################= ############
> > +#
> > +#[Rule.Common.DXE_DRIVER]
> > +#=C2=A0 FILE DRIVER =3D $(NAMED_GUID) {
> > +#=C2=A0 =C2=A0 DXE_DEPEX=C2=A0 =C2=A0 DXE_DEPEX=C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0Optional $(INF_OUTPUT)/$(MODULE_NAME)= .depex
> > +#=C2=A0 =C2=A0 COMPRESS PI_STD {
> > +#=C2=A0 =C2=A0 =C2=A0 GUIDED {
> > +#=C2=A0 =C2=A0 =C2=A0 =C2=A0 PE32=C2=A0 =C2=A0 =C2=A0PE32=C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 $(INF_OUTPUT= )/$(MODULE_NAME).efi
> > +#=C2=A0 =C2=A0 =C2=A0 =C2=A0 UI=C2=A0 =C2=A0 =C2=A0 =C2=A0STRING= =3D"$(MODULE_NAME)" Optional
> > +#=C2=A0 =C2=A0 =C2=A0 =C2=A0 VERSION=C2=A0 STRING=3D"$(INF_= VERSION)" Optional BUILD_NUM=3D$(BUILD_NUMBER)
> > +#=C2=A0 =C2=A0 =C2=A0 }
> > +#=C2=A0 =C2=A0 }
> > +#=C2=A0 }
> > +#
> > +################################################################= ############
> > +
> > +[Rule.Common.SEC]
> > +=C2=A0 FILE SEC =3D $(NAMED_GUID) RELOCS_STRIPPED FIXED {
> > +=C2=A0 =C2=A0 TE=C2=A0 TE Align =3D Auto=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0$(INF_OUTPUT)/$(MODULE_NAME).efi
> > +=C2=A0 }
> > +
> > +[Rule.Common.PEI_CORE]
> > +=C2=A0 FILE PEI_CORE =3D $(NAMED_GUID) FIXED {
> > +=C2=A0 =C2=A0 TE=C2=A0 =C2=A0 =C2=A0TE Align =3D Auto=C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 $(INF_OUTPUT)/$(MODULE_NAME).efi
> > +=C2=A0 =C2=A0 UI=C2=A0 =C2=A0 =C2=A0STRING =3D"$(MODULE_NAM= E)" Optional
> > +=C2=A0 }
> > +
> > +[Rule.Common.PEIM]
> > +=C2=A0 FILE PEIM =3D $(NAMED_GUID) FIXED {
> > +=C2=A0 =C2=A0 =C2=A0PEI_DEPEX PEI_DEPEX Optional=C2=A0 =C2=A0 = =C2=A0 =C2=A0$(INF_OUTPUT)/$(MODULE_NAME).depex
> > +=C2=A0 =C2=A0 =C2=A0TE=C2=A0 =C2=A0 =C2=A0 =C2=A0TE Align =3D Au= to=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0$(INF_OUTPUT)/$(MODULE_NAME).efi=
> > +=C2=A0 =C2=A0 =C2=A0UI=C2=A0 =C2=A0 =C2=A0 =C2=A0STRING=3D"= $(MODULE_NAME)" Optional
> > +=C2=A0 }
> > +
> > +[Rule.Common.PEIM.TIANOCOMPRESSED]
> > +=C2=A0 FILE PEIM =3D $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
> > +=C2=A0 =C2=A0 PEI_DEPEX PEI_DEPEX Optional=C2=A0 =C2=A0 =C2=A0 = =C2=A0 $(INF_OUTPUT)/$(MODULE_NAME).depex
> > +=C2=A0 =C2=A0 GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCES= SING_REQUIRED =3D TRUE {
> > +=C2=A0 =C2=A0 =C2=A0 PE32=C2=A0 =C2=A0 =C2=A0 PE32=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 $(INF_OUTPUT)/$(MOD= ULE_NAME).efi
> > +=C2=A0 =C2=A0 =C2=A0 UI=C2=A0 =C2=A0 =C2=A0 =C2=A0 STRING=3D&quo= t;$(MODULE_NAME)" Optional
> > +=C2=A0 =C2=A0 }
> > +=C2=A0 }
> > +
> > +[Rule.Common.DXE_CORE]
> > +=C2=A0 FILE DXE_CORE =3D $(NAMED_GUID) {
> > +=C2=A0 =C2=A0 PE32=C2=A0 =C2=A0 =C2=A0PE32=C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0$(INF_OUTPUT)= /$(MODULE_NAME).efi
> > +=C2=A0 =C2=A0 UI=C2=A0 =C2=A0 =C2=A0 =C2=A0STRING=3D"$(MODU= LE_NAME)" Optional
> > +=C2=A0 }
> > +
> > +[Rule.Common.UEFI_DRIVER]
> > +=C2=A0 FILE DRIVER =3D $(NAMED_GUID) {
> > +=C2=A0 =C2=A0 DXE_DEPEX=C2=A0 =C2=A0 DXE_DEPEX=C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 Optional $(INF_OUTPUT)/$(MODULE_NAME).depex=
> > +=C2=A0 =C2=A0 PE32=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0PE32=C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0$(INF_OUTPUT)= /$(MODULE_NAME).efi
> > +=C2=A0 =C2=A0 UI=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0STRING= =3D"$(MODULE_NAME)" Optional
> > +=C2=A0 }
> > +
> > +[Rule.Common.DXE_DRIVER]
> > +=C2=A0 FILE DRIVER =3D $(NAMED_GUID) {
> > +=C2=A0 =C2=A0 DXE_DEPEX=C2=A0 =C2=A0 DXE_DEPEX=C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 Optional $(INF_OUTPUT)/$(MODULE_NAME).depex=
> > +=C2=A0 =C2=A0 PE32=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0PE32=C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0$(INF_OUTPUT)= /$(MODULE_NAME).efi
> > +=C2=A0 =C2=A0 UI=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0STRING= =3D"$(MODULE_NAME)" Optional
> > +=C2=A0 }
> > +
> > +[Rule.Common.DXE_RUNTIME_DRIVER]
> > +=C2=A0 FILE DRIVER =3D $(NAMED_GUID) {
> > +=C2=A0 =C2=A0 DXE_DEPEX=C2=A0 =C2=A0 DXE_DEPEX=C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 Optional $(INF_OUTPUT)/$(MODULE_NAME).depex=
> > +=C2=A0 =C2=A0 PE32=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0PE32=C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0$(INF_OUTPUT)= /$(MODULE_NAME).efi
> > +=C2=A0 =C2=A0 UI=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0STRING= =3D"$(MODULE_NAME)" Optional
> > +=C2=A0 }
> > +
> > +[Rule.Common.UEFI_APPLICATION]
> > +=C2=A0 FILE APPLICATION =3D $(NAMED_GUID) {
> > +=C2=A0 =C2=A0 UI=C2=A0 =C2=A0 =C2=A0STRING =3D"$(MODULE_NAM= E)"=C2=A0 =C2=A0 =C2=A0Optional
> > +=C2=A0 =C2=A0 PE32=C2=A0 =C2=A0PE32=C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0$(INF_OUTPUT)= /$(MODULE_NAME).efi
> > +=C2=A0 }
> > +
> > +[Rule.Common.UEFI_DRIVER.BINARY]
> > +=C2=A0 FILE DRIVER =3D $(NAMED_GUID) {
> > +=C2=A0 =C2=A0 DXE_DEPEX DXE_DEPEX Optional=C2=A0 =C2=A0 =C2=A0 |= .depex
> > +=C2=A0 =C2=A0 PE32=C2=A0 =C2=A0 =C2=A0 PE32=C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 |.efi
> > +=C2=A0 =C2=A0 UI=C2=A0 =C2=A0 =C2=A0 =C2=A0 STRING=3D"$(MOD= ULE_NAME)" Optional
> > +=C2=A0 =C2=A0 VERSION=C2=A0 =C2=A0STRING=3D"$(INF_VERSION)&= quot; Optional BUILD_NUM=3D$(BUILD_NUMBER)
> > +=C2=A0 }
> > +
> > +[Rule.Common.UEFI_APPLICATION.BINARY]
> > +=C2=A0 FILE APPLICATION =3D $(NAMED_GUID) {
> > +=C2=A0 =C2=A0 PE32=C2=A0 =C2=A0 =C2=A0 PE32=C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 |.efi
> > +=C2=A0 =C2=A0 UI=C2=A0 =C2=A0 =C2=A0 =C2=A0 STRING=3D"$(MOD= ULE_NAME)" Optional
> > +=C2=A0 =C2=A0 VERSION=C2=A0 =C2=A0STRING=3D"$(INF_VERSION)&= quot; Optional BUILD_NUM=3D$(BUILD_NUMBER)
> > +=C2=A0 }
> > +
> > +[Rule.Common.USER_DEFINED.BIOSINFO]
> > +=C2=A0 FILE FREEFORM =3D $(NAMED_GUID) {
> > +=C2=A0 =C2=A0 RAW BIN Align =3D 16 $(INF_OUTPUT)/$(MODULE_NAME).= acpi
> > +=C2=A0 }
> > +
> > +[Rule.Common.UEFI_APPLICATION.UI]
> > +=C2=A0 FILE APPLICATION =3D $(NAMED_GUID) {
> > +=C2=A0 =C2=A0 PE32=C2=A0 =C2=A0 =C2=A0 PE32=C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0$(INF_OUTPUT)/$(MODU= LE_NAME).efi
> > +=C2=A0 =C2=A0 UI=C2=A0 =C2=A0 =C2=A0 =C2=A0 STRING=3D"Enter= Setup"
> > +=C2=A0 =C2=A0 VERSION=C2=A0 =C2=A0STRING=3D"$(INF_VERSION)&= quot; Optional BUILD_NUM=3D$(BUILD_NUMBER)
> > +=C2=A0 }
> > +
> > +[Rule.Common.USER_DEFINED.ACPITABLE]
> > +=C2=A0 FILE FREEFORM =3D $(NAMED_GUID) {
> > +=C2=A0 =C2=A0 RAW ACPI=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0|.acpi
> > +=C2=A0 =C2=A0 RAW ASL=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 |.aml
> > +=C2=A0 }
> > --
> > 2.25.1
> >





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