From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pj1-f51.google.com (mail-pj1-f51.google.com [209.85.216.51]) by mx.groups.io with SMTP id smtpd.web09.4420.1644563562897567121 for ; Thu, 10 Feb 2022 23:12:43 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@9elements.com header.s=google header.b=Je2fDwJX; spf=pass (domain: 9elements.com, ip: 209.85.216.51, mailfrom: patrick.rudolph@9elements.com) Received: by mail-pj1-f51.google.com with SMTP id h14-20020a17090a130e00b001b88991a305so11043235pja.3 for ; Thu, 10 Feb 2022 23:12:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=9elements.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=CoV2ix4h4kBo7V3pMw2ASq1GdakdJtOqHwOb0R3PzRc=; b=Je2fDwJXtKCMtNwWvLH8SCaXq+bNqMWO4d2ecF6txVTy5tKb9oox1tFPy3C1iPANuv 6y8eyN/GfbemUBiO9Q6A97crGjKh5A6TL8N46EdMXHT37jLYd6YaZ983Qxk//ppvmMUv 7C7JEhx3i+ETjmoCqAKqgj8lFOPr8Gogc2wh2KhQkfar9JHW4L93aiUTOajM/49nwIQ5 5ZUH06NiMprtL4whzneMy2uiBIH+hTWV3pU9I6a/XspztwFZl9irKse++1gIxGFr1hFL j1xuxrNz1D2BA4mI6ZgfkXj69LVIAWXtrbtG2OBjXJ1p753cLv4AIh45QzOW2NFrEbdv W6tA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=CoV2ix4h4kBo7V3pMw2ASq1GdakdJtOqHwOb0R3PzRc=; b=OVpRpjlEUyiihvH6GHxgNQvd7t1pa4Jc1gf//7nfLGSW9d5e68nh3cZH1PdG6xAGfT F+q7vxlwb2wW/AOd18NsvlNuGgv2yHQV0pI6C26t4U640ROBQwgVNRaSdiDz2e0c0QsA wKqalrq7qWK96IEAoMUbtTW3d22xslcSA0qgbz7ImMh4/SdG9pQaS2Pk/aIKxtEIyCGF Rxuw0JYoIomWYbFUF8MbN9rRzDyD9nxFCYqHt0GH2B2pMg8+LEFiFqqzEIiiOeUh08hj MbkjQDJI4ZrfrkqyyPWysOBrcRYYs9HIwYL4xClwpXj5TWoQRdzN0wDLMBPnzgZjnBi6 dOvw== X-Gm-Message-State: AOAM531E/C9S4gP7+VOMl5SG705bhieUEmDslAgpSeCwQCBKV8EAH8ID dDrWwtd1GAh38QEl0NM9jL+Fuik3Wp4LvFUvMppVI2+3HcZ4JA== X-Google-Smtp-Source: ABdhPJybyw+gT6N413TUllerOm3u8WyKoyOnb+oK14N5Q+V48IPjD2IlEBDTJKXLvset1QW4w9UmDw9CYUxiUhaR3Ug= X-Received: by 2002:a17:902:c40b:: with SMTP id k11mr254804plk.94.1644563562449; Thu, 10 Feb 2022 23:12:42 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: "Patrick Rudolph" Date: Fri, 11 Feb 2022 08:12:31 +0100 Message-ID: Subject: Re: [edk2-devel] [PATCH 16/18] UefiCpuPkg: Disable MTRR programming for UefiPayloadPkg To: devel@edk2.groups.io, michael.d.kinney@intel.com Cc: "Rhodes, Sean" , "Dong, Eric" Content-Type: text/plain; charset="UTF-8" Hi Mike, I don't see this covered by the PI specification (it's soo huge). Which chapter describes this? The original issue was a boot hang observed on real hardware as the MtrrLib can't handle specific corner cases. Not calling into MtrrLib fixes the issue. An alternative approach would be to fix the corner case handling, or introduce and use a MtrrLibNull where necessary. Regards, Patrick Rudolph On Thu, Feb 10, 2022 at 11:06 PM Michael D Kinney wrote: > > Hi Sean, > > By disabling the MTRR lib in this way, the UefiPayloadPkg has no means to > adjust cachability if it needs to in the future, and it breaks conformance > with the PI Specification. > > What modules in the UefiPayloadPkg are changing cachability? Is that appropriate? > Should those modules be updates to not make those requests instead? > > Just want to know if this alternate method of preventing MTRR changes was > evaluated. > > Thanks, > > Mike > > > -----Original Message----- > > From: devel@edk2.groups.io On Behalf Of Sean Rhodes > > Sent: Thursday, February 10, 2022 1:28 PM > > To: devel@edk2.groups.io > > Cc: Dong, Eric ; Patrick Rudolph > > Subject: [edk2-devel] [PATCH 16/18] UefiCpuPkg: Disable MTRR programming for UefiPayloadPkg > > > > From: Patrick Rudolph > > > > The MTRRs have already been programmed by FSB. > > > > Signed-off-by: Patrick Rudolph > > --- > > UefiCpuPkg/Library/MtrrLib/MtrrLib.c | 4 ++++ > > UefiCpuPkg/Library/MtrrLib/MtrrLib.inf | 2 +- > > UefiCpuPkg/UefiCpuPkg.dec | 4 ++++ > > UefiCpuPkg/UefiCpuPkg.uni | 8 ++++++-- > > UefiPayloadPkg/UefiPayloadPkg.dsc | 4 ++++ > > 5 files changed, 19 insertions(+), 3 deletions(-) > > > > diff --git a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c > > index e5c862c83d..8734bae2f0 100644 > > --- a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c > > +++ b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c > > @@ -2845,6 +2845,10 @@ IsMtrrSupported ( > > CPUID_VERSION_INFO_EDX Edx; > > > > MSR_IA32_MTRRCAP_REGISTER MtrrCap; > > > > > > > > + if (PcdGetBool (PcdCpuDisableMtrrProgramming)) { > > > > + return FALSE; > > > > + } > > > > + > > > > // > > > > // Check CPUID(1).EDX[12] for MTRR capability > > > > // > > > > diff --git a/UefiCpuPkg/Library/MtrrLib/MtrrLib.inf b/UefiCpuPkg/Library/MtrrLib/MtrrLib.inf > > index 4c9ea2def3..afc0bcc724 100644 > > --- a/UefiCpuPkg/Library/MtrrLib/MtrrLib.inf > > +++ b/UefiCpuPkg/Library/MtrrLib/MtrrLib.inf > > @@ -15,7 +15,6 @@ > > VERSION_STRING = 1.0 > > > > LIBRARY_CLASS = MtrrLib > > > > > > > > - > > > > # > > > > # The following information is for reference only and not required by the build tools. > > > > # > > > > @@ -37,4 +36,5 @@ > > > > > > [Pcd] > > > > gUefiCpuPkgTokenSpaceGuid.PcdCpuNumberOfReservedVariableMtrrs ## SOMETIMES_CONSUMES > > > > + gUefiCpuPkgTokenSpaceGuid.PcdCpuDisableMtrrProgramming ## CONSUMES > > > > > > > > diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec > > index 7de66fde67..a2a4ecc094 100644 > > --- a/UefiCpuPkg/UefiCpuPkg.dec > > +++ b/UefiCpuPkg/UefiCpuPkg.dec > > @@ -217,6 +217,10 @@ > > # @Prompt SMM Code Access Check. > > > > gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable|TRUE|BOOLEAN|0x60000013 > > > > > > > > + ## Disables MTRR programming in case it's already programmed by FSB. > > > > + # @Prompt Disable MTRR programming. > > > > + gUefiCpuPkgTokenSpaceGuid.PcdCpuDisableMtrrProgramming|FALSE|BOOLEAN|0x00000017 > > > > + > > > > ## Specifies the number of variable MTRRs reserved for OS use. The default number of > > > > # MTRRs reserved for OS use is 2. > > > > # @Prompt Number of reserved variable MTRRs. > > > > diff --git a/UefiCpuPkg/UefiCpuPkg.uni b/UefiCpuPkg/UefiCpuPkg.uni > > index 219c1963bf..3db0063f50 100644 > > --- a/UefiCpuPkg/UefiCpuPkg.uni > > +++ b/UefiCpuPkg/UefiCpuPkg.uni > > @@ -140,9 +140,13 @@ > > > > > > #string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuHotPlugDataAddress_HELP #language en-US "Contains the pointer to a CPU Hot Plug > > Data structure if CPU hot-plug is supported." > > > > > > > > -#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuNumberOfReservedVariableMtrrs_PROMPT #language en-US "Number of reserved variable > > MTRRs" > > > > +#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuDisableMtrrProgramming_PROMPT #language en-US "Number of reserved variable MTRRs" > > > > > > > > -#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuNumberOfReservedVariableMtrrs_HELP #language en-US "Specifies the number of > > variable MTRRs reserved for OS use." > > > > +#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuDisableMtrrProgramming_HELP #language en-US "Specifies the number of variable > > MTRRs reserved for OS use." > > > > + > > > > +#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuNumberOfReservedVariableMtrrs_PROMPT #language en-US "Disable MTRR programming." > > > > + > > > > +#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuNumberOfReservedVariableMtrrs_HELP #language en-US "Disables MTRR programming in > > case it's already programmed by FSB." > > > > > > > > #string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuApLoopMode_PROMPT #language en-US "The AP wait loop state" > > > > > > > > diff --git a/UefiPayloadPkg/UefiPayloadPkg.dsc b/UefiPayloadPkg/UefiPayloadPkg.dsc > > index c8562d592b..afec9109c1 100644 > > --- a/UefiPayloadPkg/UefiPayloadPkg.dsc > > +++ b/UefiPayloadPkg/UefiPayloadPkg.dsc > > @@ -37,6 +37,7 @@ > > DEFINE BOOT_MANAGER_ESCAPE = FALSE > > > > DEFINE BOOTSPLASH_IMAGE = FALSE > > > > DEFINE FOLLOW_BGRT_SPEC = FALSE > > > > + DEFINE MTRR_PROGRAMMING = TRUE > > > > DEFINE PLATFORM_BOOT_TIMEOUT = 3 > > > > # > > > > # SBL: UEFI payload for Slim Bootloader > > > > @@ -412,6 +413,9 @@ > > > > > > gUefiPayloadPkgTokenSpaceGuid.PcdAbove4GMemory|$(ABOVE_4G_MEMORY) > > > > > > > > + # Disable MTRR programming > > > > + gUefiCpuPkgTokenSpaceGuid.PcdCpuDisableMtrrProgramming|$(MTRR_PROGRAMMING) > > > > + > > > > [PcdsPatchableInModule.X64] > > > > gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister|$(RTC_INDEX_REGISTER) > > > > gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister|$(RTC_TARGET_REGISTER) > > > > -- > > 2.32.0 > > > > > > > > -=-=-=-=-=-= > > Groups.io Links: You receive all messages sent to this group. > > View/Reply Online (#86587): https://edk2.groups.io/g/devel/message/86587 > > Mute This Topic: https://groups.io/mt/89056162/1643496 > > Group Owner: devel+owner@edk2.groups.io > > Unsubscribe: https://edk2.groups.io/g/devel/unsub [michael.d.kinney@intel.com] > > -=-=-=-=-=-= > > > > > > > >