From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by mx.groups.io with SMTP id smtpd.web11.22607.1684849055231174124 for ; Tue, 23 May 2023 06:37:35 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=rtURnwR6; spf=pass (domain: kernel.org, ip: 139.178.84.217, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id C0B606327D for ; Tue, 23 May 2023 13:37:34 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2C847C433EF for ; Tue, 23 May 2023 13:37:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1684849054; bh=8T7Ph0KsNUpLub/4bZqRgngsaOshYSLLl4mqcpR/gSM=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=rtURnwR6hvN8x2GsicVS7MLn3MaB+VLvM6GLbOjlME0+Ngk43LpClUl60x6rsi8bF Mnh+ZrPYnH7QOv8YnGf+pz+ew4I3n16/qv09heQYb9Q6ihfanSW2qgKqv8G9JCUenB NyqNfpyRrw15fexgcY82wgQFxFbpj6kOtmkdznEvBGtRqSAY+JhFpfNp9O0bI4Vx7Z aanfEd8tGLOZFJEjUVYp6RChYHsJzxI/15CzhNOf1TthJOpDD38y5pOUXl/6Zbyhcu s+hE/6I/Ma7AvIr46DUhIPhQblmWDcsfA4/QXDHrT/QY5QiHursd7PsGsXEdq+m8Rc TjvM2iJbRouPg== Received: by mail-lf1-f43.google.com with SMTP id 2adb3069b0e04-4f3bb61f860so3414615e87.3 for ; Tue, 23 May 2023 06:37:34 -0700 (PDT) X-Gm-Message-State: AC+VfDyrggixLVZinaJv/McOH2/vNxl4rFuX04OpkQvjArgBXq/oaLuc XgaGukl5eFZ09f4rkSthHQzilosOYxpgM5l2xk8= X-Google-Smtp-Source: ACHHUZ6zUHaMmE4fTH90wjw9HgZAVfl+rabn1Mnbn4X5Oa/JNgY9fUju+s1rPasM7r8rpi8G+MpTiQJDzmjBxc5kheQ= X-Received: by 2002:a19:a416:0:b0:4f2:579d:6867 with SMTP id q22-20020a19a416000000b004f2579d6867mr4384063lfc.20.1684849052170; Tue, 23 May 2023 06:37:32 -0700 (PDT) MIME-Version: 1.0 References: <20230523130421.10804-1-sami.mujawar@arm.com> <20230523130421.10804-11-sami.mujawar@arm.com> In-Reply-To: <20230523130421.10804-11-sami.mujawar@arm.com> From: "Ard Biesheuvel" Date: Tue, 23 May 2023 15:37:20 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v1 10/12] ArmPkg: Prevent SgiId from setting RES0 bits of GICD_SGIR To: Sami Mujawar Cc: devel@edk2.groups.io, ardb+tianocore@kernel.org, quic_llindhol@quicinc.com, neil.jones@blaize.com, pedro.falcato@gmail.com, pierre.gondois@arm.com, Matteo.Carlini@arm.com, Akanksha.Jain2@arm.com, Ben.Adderson@arm.com, Sibel.Allinson@arm.com, nd@arm.com Content-Type: text/plain; charset="UTF-8" On Tue, 23 May 2023 at 15:04, Sami Mujawar wrote: > > GICD_SGIR is a 32-bit register, of which INTID is bits [3:0] > and Bits [14:4] is RES0. Since SgiId parameter in the function > ArmGicSendSgiTo () is UINT8, mask unused bits of SgiId before > writing to the GICD_SGIR register to prevent accidental setting > of the RES0 bits. > > Signed-off-by: Sami Mujawar Reviewed-by: Ard Biesheuvel > --- > ArmPkg/Drivers/ArmGic/ArmGicLib.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmGicLib.c > index df61e3aad4a7899eaa888cb248ad2a285c7f317d..0127cca3bf0567bc80702f415e9cbb9bd2709fbc 100644 > --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c > +++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c > @@ -1,6 +1,6 @@ > /** @file > * > -* Copyright (c) 2011-2021, Arm Limited. All rights reserved. > +* Copyright (c) 2011-2023, Arm Limited. All rights reserved. > * > * SPDX-License-Identifier: BSD-2-Clause-Patent > * > @@ -148,7 +148,9 @@ ArmGicSendSgiTo ( > { > MmioWrite32 ( > GicDistributorBase + ARM_GIC_ICDSGIR, > - ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | SgiId > + ((TargetListFilter & 0x3) << 24) | > + ((CPUTargetList & 0xFF) << 16) | > + (SgiId & 0xF) > ); > } > > -- > 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' >