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From: "Ard Biesheuvel" <ardb@kernel.org>
To: edk2-devel-groups-io <devel@edk2.groups.io>,
	Gerd Hoffmann <kraxel@redhat.com>
Cc: "Pawel Polawski" <ppolawsk@redhat.com>,
	"Liming Gao" <gaoliming@byosoft.com.cn>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>,
	"Jiewen Yao" <jiewen.yao@intel.com>,
	"Abner Chang" <abner.chang@hpe.com>,
	"Ard Biesheuvel" <ardb+tianocore@kernel.org>,
	"Ray Ni" <ray.ni@intel.com>, "Hao A Wu" <hao.a.wu@intel.com>,
	"Jian J Wang" <jian.j.wang@intel.com>,
	"Jordan Justen" <jordan.l.justen@intel.com>,
	"Leif Lindholm" <leif@nuviainc.com>
Subject: Re: [edk2-devel] [PATCH 3/6] OvmfPkg/PlatformPei: unfix PcdPciExpressBaseAddress
Date: Thu, 16 Dec 2021 13:50:18 +0100	[thread overview]
Message-ID: <CAMj1kXE6scSk2SD+_2_trjYQ8bj+tVYj+xDTPbFWVbN1qeuq4w@mail.gmail.com> (raw)
In-Reply-To: <20211216095037.1843149-4-kraxel@redhat.com>

On Thu, 16 Dec 2021 at 10:50, Gerd Hoffmann <kraxel@redhat.com> wrote:
>
> Will be set by FdtPciHostBridgeLib, so it can't be an fixed when we
> want use that library.
>
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>

What guarantees that these accesses only ever see the correct, updated value?

> ---
>  OvmfPkg/PlatformPei/PlatformPei.inf | 2 +-
>  OvmfPkg/PlatformPei/MemDetect.c     | 4 ++--
>  OvmfPkg/PlatformPei/Platform.c      | 4 ++--
>  3 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf b/OvmfPkg/PlatformPei/PlatformPei.inf
> index 8ef404168c45..44bf482e855a 100644
> --- a/OvmfPkg/PlatformPei/PlatformPei.inf
> +++ b/OvmfPkg/PlatformPei/PlatformPei.inf
> @@ -92,6 +92,7 @@ [Pcd]
>    gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes
>    gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase
>    gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress
> +  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
>    gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
>    gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
>    gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved
> @@ -114,7 +115,6 @@ [Pcd]
>  [FixedPcd]
>    gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase
>    gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidSize
> -  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
>    gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS
>    gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory
>    gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType
> diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
> index fb38e3c39d8e..81378eaf9b4c 100644
> --- a/OvmfPkg/PlatformPei/MemDetect.c
> +++ b/OvmfPkg/PlatformPei/MemDetect.c
> @@ -154,8 +154,8 @@ QemuUc32BaseInitialization (
>      // [PcdPciExpressBaseAddress, 4GB) range require a very small number of
>      // variable MTRRs (preferably 1 or 2).
>      //
> -    ASSERT (FixedPcdGet64 (PcdPciExpressBaseAddress) <= MAX_UINT32);
> -    mQemuUc32Base = (UINT32)FixedPcdGet64 (PcdPciExpressBaseAddress);
> +    ASSERT (PcdGet64 (PcdPciExpressBaseAddress) <= MAX_UINT32);
> +    mQemuUc32Base = (UINT32)PcdGet64 (PcdPciExpressBaseAddress);
>      return;
>    }
>
> diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
> index d0323c645162..27ada0c17577 100644
> --- a/OvmfPkg/PlatformPei/Platform.c
> +++ b/OvmfPkg/PlatformPei/Platform.c
> @@ -171,7 +171,7 @@ MemMapInitialization (
>      // The MMCONFIG area is expected to fall between the top of low RAM and
>      // the base of the 32-bit PCI host aperture.
>      //
> -    PciExBarBase = FixedPcdGet64 (PcdPciExpressBaseAddress);
> +    PciExBarBase = PcdGet64 (PcdPciExpressBaseAddress);
>      ASSERT (TopOfLowRam <= PciExBarBase);
>      ASSERT (PciExBarBase <= MAX_UINT32 - SIZE_256MB);
>      PciBase = (UINT32)(PciExBarBase + SIZE_256MB);
> @@ -302,7 +302,7 @@ PciExBarInitialization (
>    // determined in AddressWidthInitialization(), i.e., 36 bits, will suffice
>    // for DXE's page tables to cover the MMCONFIG area.
>    //
> -  PciExBarBase.Uint64 = FixedPcdGet64 (PcdPciExpressBaseAddress);
> +  PciExBarBase.Uint64 = PcdGet64 (PcdPciExpressBaseAddress);
>    ASSERT ((PciExBarBase.Uint32[1] & MCH_PCIEXBAR_HIGHMASK) == 0);
>    ASSERT ((PciExBarBase.Uint32[0] & MCH_PCIEXBAR_LOWMASK) == 0);
>
> --
> 2.33.1
>
>
>
> 
>
>

  reply	other threads:[~2021-12-16 12:50 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-16  9:50 [PATCH 0/6] OvmfPkg/Microvm/pcie: add pcie support Gerd Hoffmann
2021-12-16  9:50 ` [PATCH 1/6] PciHostBridge: io range is not mandatory Gerd Hoffmann
2021-12-16  9:53   ` [edk2-devel] " Ard Biesheuvel
2021-12-16  9:50 ` [PATCH 2/6] FdtPciHostBridgeLib: " Gerd Hoffmann
2021-12-16  9:50 ` [PATCH 3/6] OvmfPkg/PlatformPei: unfix PcdPciExpressBaseAddress Gerd Hoffmann
2021-12-16 12:50   ` Ard Biesheuvel [this message]
2021-12-17  6:33     ` [edk2-devel] " Gerd Hoffmann
2021-12-16  9:50 ` [PATCH 4/6] OvmfPkg/Microvm/pcie: no vbeshim please Gerd Hoffmann
2021-12-16  9:50 ` [PATCH 5/6] OvmfPkg/Microvm/pcie: mPhysMemAddressWidth tweak Gerd Hoffmann
2021-12-16  9:50 ` [PATCH 6/6] OvmfPkg/Microvm/pcie: add pcie support Gerd Hoffmann

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