From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by mx.groups.io with SMTP id smtpd.web12.10085.1639659034010426115 for ; Thu, 16 Dec 2021 04:50:34 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=py8ahTFM; spf=pass (domain: kernel.org, ip: 139.178.84.217, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id CD35B61DC5 for ; Thu, 16 Dec 2021 12:50:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B0730C36AE9 for ; Thu, 16 Dec 2021 12:50:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1639659031; bh=fT+a0eWwh/ZC5VhddkQBZ0+sQ2Lg/8JaeH4Gxi6XYuE=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=py8ahTFMEwZP4/Asn2Ddc8RBk5g15lyGrnUFKWZ0H37N2U3IrqR+B86IgpiYaD1m2 +5/Tr4+IsjQDIAx9nV4eiyK+5/QCcVcvAYEi3Cd5Zb1uTuhGJ+wueHi5byNdF8u68o Rn+3m4GfJpvCy7PwcmAksnQJzi2OS2F2vJhAlzNtFRjirpOCVUg88waDXivpudkUre YxG1TN436bClpBRjwszEqTQS+3Rf6hw+Bj/qecaD4l/EOEdzv4o5bSK4aD8//7vGpl hZgwzZlu5/pFnEtp8s07xziLKpvKaXh91GftCSbR4ErVCanDdbdQocbikLd9hr4LsD GPTdokmhWNKww== Received: by mail-wm1-f54.google.com with SMTP id z4-20020a1c7e04000000b0032fb900951eso1645026wmc.4 for ; Thu, 16 Dec 2021 04:50:31 -0800 (PST) X-Gm-Message-State: AOAM530oF+3HEAuKIxbyXTCGN+212aVP/2iWAfZCxJyfgjjOEWgSvGEq lo/A6POK4dt/cHj38b3efM3IrfZMA8AwjvuxFlU= X-Google-Smtp-Source: ABdhPJzA3rSoqCfIoulIJw+QnWQ93kF9U6W8XIbeCsAxDF2e0dLWOLuqkYFaRg+d0ajkPcnfNq91vasyQDBCrM1dnsc= X-Received: by 2002:a7b:cd93:: with SMTP id y19mr4777945wmj.190.1639659029915; Thu, 16 Dec 2021 04:50:29 -0800 (PST) MIME-Version: 1.0 References: <20211216095037.1843149-1-kraxel@redhat.com> <20211216095037.1843149-4-kraxel@redhat.com> In-Reply-To: <20211216095037.1843149-4-kraxel@redhat.com> From: "Ard Biesheuvel" Date: Thu, 16 Dec 2021 13:50:18 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [edk2-devel] [PATCH 3/6] OvmfPkg/PlatformPei: unfix PcdPciExpressBaseAddress To: edk2-devel-groups-io , Gerd Hoffmann Cc: Pawel Polawski , Liming Gao , =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= , Jiewen Yao , Abner Chang , Ard Biesheuvel , Ray Ni , Hao A Wu , Jian J Wang , Jordan Justen , Leif Lindholm Content-Type: text/plain; charset="UTF-8" On Thu, 16 Dec 2021 at 10:50, Gerd Hoffmann wrote: > > Will be set by FdtPciHostBridgeLib, so it can't be an fixed when we > want use that library. > > Signed-off-by: Gerd Hoffmann What guarantees that these accesses only ever see the correct, updated value? > --- > OvmfPkg/PlatformPei/PlatformPei.inf | 2 +- > OvmfPkg/PlatformPei/MemDetect.c | 4 ++-- > OvmfPkg/PlatformPei/Platform.c | 4 ++-- > 3 files changed, 5 insertions(+), 5 deletions(-) > > diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf b/OvmfPkg/PlatformPei/PlatformPei.inf > index 8ef404168c45..44bf482e855a 100644 > --- a/OvmfPkg/PlatformPei/PlatformPei.inf > +++ b/OvmfPkg/PlatformPei/PlatformPei.inf > @@ -92,6 +92,7 @@ [Pcd] > gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes > gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase > gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress > + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress > gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize > gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize > gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved > @@ -114,7 +115,6 @@ [Pcd] > [FixedPcd] > gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase > gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidSize > - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType > diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c > index fb38e3c39d8e..81378eaf9b4c 100644 > --- a/OvmfPkg/PlatformPei/MemDetect.c > +++ b/OvmfPkg/PlatformPei/MemDetect.c > @@ -154,8 +154,8 @@ QemuUc32BaseInitialization ( > // [PcdPciExpressBaseAddress, 4GB) range require a very small number of > // variable MTRRs (preferably 1 or 2). > // > - ASSERT (FixedPcdGet64 (PcdPciExpressBaseAddress) <= MAX_UINT32); > - mQemuUc32Base = (UINT32)FixedPcdGet64 (PcdPciExpressBaseAddress); > + ASSERT (PcdGet64 (PcdPciExpressBaseAddress) <= MAX_UINT32); > + mQemuUc32Base = (UINT32)PcdGet64 (PcdPciExpressBaseAddress); > return; > } > > diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c > index d0323c645162..27ada0c17577 100644 > --- a/OvmfPkg/PlatformPei/Platform.c > +++ b/OvmfPkg/PlatformPei/Platform.c > @@ -171,7 +171,7 @@ MemMapInitialization ( > // The MMCONFIG area is expected to fall between the top of low RAM and > // the base of the 32-bit PCI host aperture. > // > - PciExBarBase = FixedPcdGet64 (PcdPciExpressBaseAddress); > + PciExBarBase = PcdGet64 (PcdPciExpressBaseAddress); > ASSERT (TopOfLowRam <= PciExBarBase); > ASSERT (PciExBarBase <= MAX_UINT32 - SIZE_256MB); > PciBase = (UINT32)(PciExBarBase + SIZE_256MB); > @@ -302,7 +302,7 @@ PciExBarInitialization ( > // determined in AddressWidthInitialization(), i.e., 36 bits, will suffice > // for DXE's page tables to cover the MMCONFIG area. > // > - PciExBarBase.Uint64 = FixedPcdGet64 (PcdPciExpressBaseAddress); > + PciExBarBase.Uint64 = PcdGet64 (PcdPciExpressBaseAddress); > ASSERT ((PciExBarBase.Uint32[1] & MCH_PCIEXBAR_HIGHMASK) == 0); > ASSERT ((PciExBarBase.Uint32[0] & MCH_PCIEXBAR_LOWMASK) == 0); > > -- > 2.33.1 > > > > > >