From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by mx.groups.io with SMTP id smtpd.web11.1983.1627974799657920302 for ; Tue, 03 Aug 2021 00:13:19 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=uA3jjKL5; spf=pass (domain: kernel.org, ip: 198.145.29.99, mailfrom: ardb@kernel.org) Received: by mail.kernel.org (Postfix) with ESMTPSA id C6C7B60F58 for ; Tue, 3 Aug 2021 07:13:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1627974798; bh=88EyyEGZppCdExoEeQrzWJ6B+aVutmShoYfh8KTVm/k=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=uA3jjKL5s9k0Cz35WBCja2GZ9cjsZFaTSZEnpBNOztCaHqKmkJxVxxC2Wj/SKFsza 3aXnu438/SX0Mxaj+tNltMG9aXmROFZ873aB3g2vdKXOxMxqM5Qoy5afcGc4rJJXgr FGBkPeUr06b9uLEVOoBOMFQht62jEK/xZMCFM/3Mkj11sudgFXB+4uCpe+P5PIpQyr iuQ+ZlZq9oPyu2CE6raj0cc7rvjNlGqSYgqqNDkYkNuHkvAMN08uCK/+U0Dc4slRBt RpV0Oho0cwIaS4WlKSLmJx3wX8KjOYh/um0zF09S3PK7ZktAGgA/NYU0fIDvYAfRBY 2siMPM81YUS7Q== Received: by mail-oo1-f42.google.com with SMTP id b25-20020a4ac2990000b0290263aab95660so4988556ooq.13 for ; Tue, 03 Aug 2021 00:13:18 -0700 (PDT) X-Gm-Message-State: AOAM532YW+OLkG1SPIboOL/knX9TfrFcicMGFKR7xsAaRCLTNnxkNfws xRMG806M4fNVMZNPvTfAUajLqUPnmEMBlk9mVnc= X-Google-Smtp-Source: ABdhPJwtGzOVBAANgLww1GOvwyAp+7gRglDujLuBv9T/yo2FsVmmLkSBY9BpnSk617U4wNqUK/QjFbl6ufVz1CNf78I= X-Received: by 2002:a4a:414e:: with SMTP id x75mr13435757ooa.13.1627974798184; Tue, 03 Aug 2021 00:13:18 -0700 (PDT) MIME-Version: 1.0 References: <20210802050051.2831716-1-mw@semihalf.com> In-Reply-To: <20210802050051.2831716-1-mw@semihalf.com> From: "Ard Biesheuvel" Date: Tue, 3 Aug 2021 09:13:07 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [edk2-platforms PATCH 0/6] Marvell multiple PCIE support To: Marcin Wojtas Cc: edk2-devel-groups-io , Leif Lindholm , Ard Biesheuvel , Grzegorz Jaszczyk , Grzegorz Bernacki , upstream@semihalf.com, Samer El-Haj-Mahmoud , Jon Nettleton Content-Type: text/plain; charset="UTF-8" On Mon, 2 Aug 2021 at 07:01, Marcin Wojtas wrote: > > This patchset is a preparation for adding a new platform > (CN913x CEx7 Evaluation Board). It modifies a common > Marvell code in order to enable multiple PCIE controllers. > Moreover a default interrupt map is reworked, so that to > support all CP11x south bridge units. > Last but not least, a custom initialization sequence > can be executed thanks to a new board description library > extension. > > More details can be found in the commit logs. > The patchest is publicly available in the github: > https://github.com/semihalf-wojtas-marcin/edk2-platforms/commits/pcie-r20210802 > > Best regards, > Marcin > > Kamil Koczurek (1): > Marvell: Armada7k8k/OcteonTx: Add multiple PCIE ports support > > Marcin Wojtas (5): > Marvell: Armada7k8k/OcteonTx: Allow memory mapping for more config > spaces > Marvell: Armada7k8k/OcteonTx: Allow tuning PCIE config space size > Marvell: Armada7k8kPciHostBridgeLib: Remove ECAM base limitation > Marvell: Armada7k8k/OcteonTX: Enable additional board configuration > Marvell: IcuLib: Rework default interrupt map > Pushed as d84c0545f4b4..73ccc21d918c Thanks, > Platform/Marvell/Cn913xDb/Cn9130DbA.dsc.inc | 7 -- > Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 7 -- > Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf | 1 + > Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf | 1 + > Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciSegmentLib/PciSegmentLib.inf | 11 +- > Silicon/Marvell/Armada7k8k/AcpiTables/IcuInterrupts.h | 48 ++++---- > Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 10 ++ > Silicon/Marvell/Library/IcuLib/IcuLib.h | 6 +- > Silicon/Marvell/OcteonTx/AcpiTables/T91/IcuInterrupts.h | 61 +++++++---- > Platform/Marvell/Armada70x0Db/Armada70x0DbBoardDescLib/Armada70x0DbBoardDescLib.c | 11 ++ > Platform/Marvell/Armada80x0Db/Armada80x0DbBoardDescLib/Armada80x0DbBoardDescLib.c | 11 ++ > Platform/Marvell/Cn913xDb/BoardDescriptionLib/Cn9130DbABoardDescLib.c | 11 ++ > Platform/Marvell/Cn913xDb/BoardDescriptionLib/Cn9132DbABoardDescLib.c | 11 ++ > Platform/SolidRun/Armada80x0McBin/Armada80x0McBinBoardDescLib/Armada80x0McBinBoardDescLib.c | 11 ++ > Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.c | 2 + > Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.c | 18 ++- > Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLib.c | 15 ++- > Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLibConstructor.c | 1 - > Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciSegmentLib/PciSegmentLib.c | 69 +++++++++++- > Silicon/Marvell/Library/IcuLib/IcuLib.c | 115 ++++++-------------- > 20 files changed, 267 insertions(+), 160 deletions(-) > > -- > 2.29.0 >