From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by mx.groups.io with SMTP id smtpd.web11.26700.1685610651425236772 for ; Thu, 01 Jun 2023 02:10:51 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=nPId3nxt; spf=pass (domain: kernel.org, ip: 139.178.84.217, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id F36A064241 for ; Thu, 1 Jun 2023 09:10:50 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 67290C4339B for ; Thu, 1 Jun 2023 09:10:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1685610650; bh=cCvDqP7qFRwLlTHKXCn7hPNm6TmCJXpq127RKeddJRo=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=nPId3nxthxmGIHZqCfKSdH+VkhxRXKhTk5c2zKOZNa/Pj8rEwHqbz6mEKGzm/Dar5 QOR4tal6yQq1RskGJMmA8Scd63E6t2B6TjtxaMNrTEqwL7m5mF6AdxQHLiVc6YgtZw AOPpBGLQwp84FaUVkQbWj+R8hvLb+sJE5e0POLXlohfDOUuKEfd3h+vtAL3OSds6D4 /YA7YkQRczj2QqBAtdWFJ2zV3gOo0f96xqISt9rJg3ehvRatOKkBee3lo87G1yuqXG QA7yENnxAPu7x9S2agRUWDsOlo2q8q0s5/H/fRqCNo/yQYqJkhmC1IpUj6pNfIeQi3 NQ9WgCjpHDH+Q== Received: by mail-lj1-f172.google.com with SMTP id 38308e7fff4ca-2af30a12e84so8390381fa.0 for ; Thu, 01 Jun 2023 02:10:50 -0700 (PDT) X-Gm-Message-State: AC+VfDw7t/6xYhmPlBOiSQVeZpy1bGEliWmo2S2uIdOM/oYHV9OTgZln th1H/bBT7I7mIt3EhYwIEi9dYALXi0y0Q9sApDA= X-Google-Smtp-Source: ACHHUZ63KUW0lvYUNSZMTHFvbpmVm6mBso37W1BEko1V5pcMczFTasEYZ9/sQjutjqxMGWTGxRDWeILtPFLWPTKDzWk= X-Received: by 2002:a2e:9c46:0:b0:2b0:a4b1:df6 with SMTP id t6-20020a2e9c46000000b002b0a4b10df6mr3003532ljj.49.1685610648444; Thu, 01 Jun 2023 02:10:48 -0700 (PDT) MIME-Version: 1.0 References: <175E4526EDF648E7.27409@groups.io> <32fc0480-020f-f5f4-f626-2ba6a1713e6f@loongson.cn> In-Reply-To: From: "Ard Biesheuvel" Date: Thu, 1 Jun 2023 11:10:37 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [edk2-devel] [edk2-platforms][PATCH V2 1/1] Platform/Loongson: Set Dxe common page size to 16k To: Chao Li Cc: devel@edk2.groups.io, lixianglai@loongson.cn, Ard Biesheuvel , Bibo Mao , Leif Lindholm , Liming Gao , Michael D Kinney Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, 1 Jun 2023 at 10:08, Chao Li wrote: > > Reviewed-by: Chao Li > Pushed as 406291d3dfa7..eaaf3edafa66 > > Thanks, > Chao > =E5=9C=A8 2023/6/1 14:56, xianglai =E5=86=99=E9=81=93: > > There has been no response for a long time, welcome to give me some sugge= stions for this patch. > > > On 5/12/23 10:42 AM, xianglai wrote: > > The loongarch qemu tcg code section is 16K aligned by default. > When UEFI keep 4K alignment, the code section and data section > of UEFI are loaded into the same page by qemu, and when the data > is written to the page containing the code section, it will cause > qemu to refresh TB, resulting in qemu running slowly.Therefore, > setting Dxe to 16K alignment can ensure that the code section is > loaded into a page separately, avoid qemu repeatedly refreshing TB, > and speed up the execution speed of qemu. > > The following shows the impact of Dxe 4K alignment and 16K alignment > on image size: > > DXE 4k alignment: > DXEFV.FV 7.2M > After compression: > FVMAIN_COMPACT.Fv 3.4M > QEMU_EFI.fd 3.7M > > DXE 16k alignment: > DXEFV.FV 9.5M > After compression: > FVMAIN_COMPACT.Fv 3.4M > QEMU_EFI.fd 3.7M > > Cc: Ard Biesheuvel > Cc: Bibo Mao > Cc: Chao Li > Cc: Leif Lindholm > Cc: Liming Gao > Cc: Michael D Kinney > Signed-off-by: xianglai li > --- > Platform/Loongson/LoongArchQemuPkg/Loongson.dsc | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc b/Platform/L= oongson/LoongArchQemuPkg/Loongson.dsc > index 6875e39cc6..13b27d84b8 100644 > --- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc > +++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc > @@ -61,8 +61,13 @@ > [BuildOptions.LOONGARCH64.EDKII.SEC] > *_*_*_CC_FLAGS =3D > +# > +# default page size is 16K for loongarch qemu tcg > +# code section separated with data section with 16K page alignment, else= data > +# write operation in the same page with code section will cause qemu TB = flush > +# > [BuildOptions.common.EDKII.DXE_CORE,BuildOptions.common.EDKII.DXE_DRIVE= R,BuildOptions.common.EDKII.UEFI_DRIVER,BuildOptions.common.EDKII.UEFI_APPL= ICATION] > - GCC:*_*_*_DLINK_FLAGS =3D -z common-page-size=3D0x1000 > + GCC:*_*_*_DLINK_FLAGS =3D -z common-page-size=3D0x4000 > [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER] > GCC:*_*_LOONGARCH64_DLINK_FLAGS =3D -z common-page-size=3D0x10000 > > > > > >=20 >