From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by mx.groups.io with SMTP id smtpd.web11.4545.1685962281275801613 for ; Mon, 05 Jun 2023 03:51:21 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=CQIjHduy; spf=pass (domain: kernel.org, ip: 139.178.84.217, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 58AC7612FF for ; Mon, 5 Jun 2023 10:51:20 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BD4F4C4339B for ; Mon, 5 Jun 2023 10:51:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1685962279; bh=bTx0ggC/YaiPRNMLpbbyH7QmHP+reYI4pNbRqvMtguY=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=CQIjHduyXffSCcdVSZEZAXQHlh+slSEwHEUaJqzui7rMUwgVNQI0NmRntppMALjMi rKmeLR7kgpyLPeUgICu2Qtfg8LvSgu4ZjjnNnhXUXCDlNXH7vtVaY3oWKUVv4DcMHx /feIhizQaUmCJ9EYWq3HSDbyeqlLKUoR/Z+BIjWGF4aL412lSH2LsO/mgYvJwZ4nD7 NMTgtrlY+voN564yCs77sMlxxgLqNEccRo0KRFepV8oGeInSMUvvrXwE6OBD1N1qA5 vNWDvTj4b6bQWcuY6u1k3Q+svu79B2yhBFGOapG/N1hJsPZpm1qAkUmKhezfMZeGHw fdO4kPg5/+sSg== Received: by mail-lj1-f176.google.com with SMTP id 38308e7fff4ca-2b1b72dc2feso29880451fa.3 for ; Mon, 05 Jun 2023 03:51:19 -0700 (PDT) X-Gm-Message-State: AC+VfDxVo995djTc3r6eKETgp9Fch++uhRC7mRRVUaCibT0SdG3Ss3QW 6OsYQbX4QC6aCrSMka2JUKs7J8hbVGdcqiOMxBQ= X-Google-Smtp-Source: ACHHUZ5vq5pXSJBVR6Wjp2E/9W6eowfV5PYMGd1bZU0c7c0rJhjb+bIb2xfotl6pmKhlytMgvxX8++U7VVqndvUk6uc= X-Received: by 2002:a2e:86d0:0:b0:2b1:b095:c5cd with SMTP id n16-20020a2e86d0000000b002b1b095c5cdmr4212630ljj.0.1685962272787; Mon, 05 Jun 2023 03:51:12 -0700 (PDT) MIME-Version: 1.0 References: <20230605104913.117643-1-wangyuquan1236@phytium.com.cn> In-Reply-To: <20230605104913.117643-1-wangyuquan1236@phytium.com.cn> From: "Ard Biesheuvel" Date: Mon, 5 Jun 2023 12:51:01 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 0/3] use XHCI to replace EHCI To: Yuquan Wang Cc: ardb+tianocore@kernel.org, quic_llindhol@quicinc.com, quic_ggregory@quicinc.com, rad@semihalf.com, chenbaozi@phytium.com.cn, devel@edk2.groups.io Content-Type: text/plain; charset="UTF-8" On Mon, 5 Jun 2023 at 12:50, Yuquan Wang wrote: > > This patchset implements XHCI on sbsa-ref board to replace EHCI. > As sbsa-ref does not have DRAM below 4G, it cannot utilize EHCI > that only has 32-bit DMA capablity. Now this board has XHCI as > an available usb controller with 64-bit DMA capablity. > > Yuquan Wang (3): > Platform/Qemu/SbsaQemu/SbsaQemu.dsc: define XHCI Pcd settings > SbsaQemu: Drivers: Add initial support for XHCI > SbsaQemu: AcpiTables: Add XHCI info into DSDT > Why are you sending the same series 3 times within an hour? > Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 6 +- > .../Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 4 +- > Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 125 ++---------------- > .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 40 ++++-- > .../SbsaQemuPlatformDxe.inf | 2 + > Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 4 +- > 6 files changed, 53 insertions(+), 128 deletions(-) > > -- > 2.34.1 >