From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from sin.source.kernel.org (sin.source.kernel.org [145.40.73.55]) by mx.groups.io with SMTP id smtpd.web08.4056.1648707967313146021 for ; Wed, 30 Mar 2022 23:26:07 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=Itudgh6l; spf=pass (domain: kernel.org, ip: 145.40.73.55, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 344EECE20CC for ; Thu, 31 Mar 2022 06:26:04 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A05F7C34110 for ; Thu, 31 Mar 2022 06:26:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1648707962; bh=UX2fZCyUZ+5CMq/v/VaqrMD9PhHO9G0jX1Xibrw6Ez8=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=Itudgh6lUGGqJY6cCuyufoo3H8lrluZ1zhuFbCnpjTy3tKJ79HdiJfDvOufWvpT2p lBb7NQogspDBSGutLBdEpp+9rFzwi4FvxdTd5Tdix768CRKzZD11sl9vZdswLFMSxg vhSGEJPiIHNjUCSK/hvFyJXCQj2pRCxulSz2bnlFHTkfh91ylhbNauFRETHn4YTlzo BSEzWS5oPoEsLTfdUK+HwyWrSRMfNzFxoNdF15/f+CEbucmZkbIuYEWAW8CPyFjnze t7GR479+NAIHGPHmYcOR5AkJzjamvCSNFMuuk418iQoNhqOx+eWV0SwMxLj3WQ+DxM ySBIKElvhheIw== Received: by mail-oi1-f179.google.com with SMTP id v75so24403843oie.1 for ; Wed, 30 Mar 2022 23:26:02 -0700 (PDT) X-Gm-Message-State: AOAM530JjdEwwT/QHhTQ616Q47AVYREnlNmBkS99I1obD5PHQkG1kH6g 3hcBN/o6JBctL20EXxxP0gAMnivvi2+fOdcyxPw= X-Google-Smtp-Source: ABdhPJzyozsgDTvt8mRGzhWeCEccEBM2fbaou8xTs14doBMuZ1lefJP8DyexpHnKFSJt28UOybu8hN78sPIJZNdsFGE= X-Received: by 2002:aca:674c:0:b0:2d9:c460:707c with SMTP id b12-20020aca674c000000b002d9c460707cmr2070231oiy.126.1648707961703; Wed, 30 Mar 2022 23:26:01 -0700 (PDT) MIME-Version: 1.0 References: <5b99fc3587bec6bd7552ec8aeda76501f1a7b935.1648664943.git.sean@starlabs.systems> <9e5f18683a8877ab4cf04210f2047e4e20157c75.1648664943.git.sean@starlabs.systems> In-Reply-To: <9e5f18683a8877ab4cf04210f2047e4e20157c75.1648664943.git.sean@starlabs.systems> From: "Ard Biesheuvel" Date: Thu, 31 Mar 2022 08:25:50 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [edk2-devel] [PATCH 2/2] OvmfPkg: Fix PciHostBridgeLibScan To: edk2-devel-groups-io , sean@starlabs.systems Cc: Patrick Rudolph , Ard Biesheuvel , Jiewen Yao , Jordan Justen , Gerd Hoffmann Content-Type: text/plain; charset="UTF-8" On Wed, 30 Mar 2022 at 20:29, Sean Rhodes wrote: > > From: Patrick Rudolph > > Don't assume a 64bit register always holds an address greater than 4GB. > Check the value in the register and decide which Aperature it should be > assigned to. > > The same code caused an issue on real hardware. It's unclear if this is an > issue here as well, as it's intended to run on emulated hardware only. > Do you have a link to such a supported issue? Or could you elaborate? Does it have to do with running out of 64-bit BAR space for resource that could be located in a 32-bit region as well? > Cc: Ard Biesheuvel > Cc: Jiewen Yao > Cc: Jordan Justen > Cc: Gerd Hoffmann > Signed-off-by: Patrick Rudolph > --- > .../PciHostBridgeLibScan/ScanForRootBridges.c | 12 ++++++++---- > 1 file changed, 8 insertions(+), 4 deletions(-) > > diff --git a/OvmfPkg/Library/PciHostBridgeLibScan/ScanForRootBridges.c b/OvmfPkg/Library/PciHostBridgeLibScan/ScanForRootBridges.c > index 5fb02a89b9..1ff96be57f 100644 > --- a/OvmfPkg/Library/PciHostBridgeLibScan/ScanForRootBridges.c > +++ b/OvmfPkg/Library/PciHostBridgeLibScan/ScanForRootBridges.c > @@ -331,14 +331,18 @@ ScanForRootBridges ( > Base = ((UINT32)Pci.Bridge.PrefetchableMemoryBase & 0xfff0) << 16; > Limit = (((UINT32)Pci.Bridge.PrefetchableMemoryLimit & 0xfff0) > << 16) | 0xfffff; > - MemAperture = &Mem; > if (Value == BIT0) { > - Base |= LShiftU64 (Pci.Bridge.PrefetchableBaseUpper32, 32); > - Limit |= LShiftU64 (Pci.Bridge.PrefetchableLimitUpper32, 32); > - MemAperture = &MemAbove4G; > + Base |= LShiftU64 (Pci.Bridge.PrefetchableBaseUpper32, 32); > + Limit |= LShiftU64 (Pci.Bridge.PrefetchableLimitUpper32, 32); > } > > if (Base < Limit) { > + if (Base < BASE_4GB) { > + MemAperture = &Mem; > + } else { > + MemAperture = &MemAbove4G; > + } > + > if (MemAperture->Base > Base) { > MemAperture->Base = Base; > } > -- > 2.32.0 > > > > ------------ > Groups.io Links: You receive all messages sent to this group. > View/Reply Online (#88266): https://edk2.groups.io/g/devel/message/88266 > Mute This Topic: https://groups.io/mt/90138165/5717338 > Group Owner: devel+owner@edk2.groups.io > Unsubscribe: https://edk2.groups.io/g/devel/unsub [ardb+tianocore@kernel.org] > ------------ > >