From: "Ard Biesheuvel" <ardb@kernel.org>
To: John Chew <yuinyee.chew@starfivetech.com>
Cc: devel@edk2.groups.io, mindachen1987 <minda.chen@starfivetech.com>,
Sunil V L <sunilvl@ventanamicro.com>,
Leif Lindholm <quic_llindhol@quicinc.com>,
Michael D Kinney <michael.d.kinney@intel.com>,
Li Yong <yong.li@intel.com>
Subject: Re: [edk2-devel] [PATCH v3 4/5] DesignWare/DwEmmcDxe: Add handling for SDMMC
Date: Wed, 22 Nov 2023 16:47:16 +0100 [thread overview]
Message-ID: <CAMj1kXEuo=O_hweB8fiHg+t6gV77Mv9-mqN8Kt+aaXL4GNpCDw@mail.gmail.com> (raw)
In-Reply-To: <20231103025131.1643-5-yuinyee.chew@starfivetech.com>
On Fri, 3 Nov 2023 at 03:53, John Chew <yuinyee.chew@starfivetech.com> wrote:
>
> From: mindachen1987 <minda.chen@starfivetech.com>
>
> Add base address PCD for eMMC and SDMMC
> Add application command for SDMMC
> Add PCD for Ultra High Speed (UHS) option
>
Why is this a single patch? If your commit log contains an enumeration
of the changes, it is usually a strong hint that you need to split up
the patch.
> Cc: Sunil V L <sunilvl@ventanamicro.com>
> Cc: Leif Lindholm <quic_llindhol@quicinc.com>
> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Li Yong <yong.li@intel.com>
> Co-authored-by: John Chew <yuinyee.chew@starfivetech.com>
> Signed-off-by: mindachen1987 <minda.chen@starfivetech.com>
> ---
> Silicon/Synopsys/DesignWare/DesignWare.dec | 2 +
> Silicon/Synopsys/DesignWare/DesignWare.dsc | 1 +
> Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmc.h | 64 +++----
> Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c | 183 +++++++++++++-------
> Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf | 1 +
> Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/{DwEmmcDxe.inf => DwSdmmcDxe.inf} | 9 +-
> 6 files changed, 158 insertions(+), 102 deletions(-)
>
> diff --git a/Silicon/Synopsys/DesignWare/DesignWare.dec b/Silicon/Synopsys/DesignWare/DesignWare.dec
> index 751370a8b1af..91aca7568b08 100755
> --- a/Silicon/Synopsys/DesignWare/DesignWare.dec
> +++ b/Silicon/Synopsys/DesignWare/DesignWare.dec
> @@ -31,4 +31,6 @@ [PcdsFixedAtBuild.common]
> gDesignWareTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz|0x0|UINT32|0x00000003
> gDesignWareTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz|0x0|UINT32|0x00000004
> gDesignWareTokenSpaceGuid.PcdDwEmmcDxeFifoDepth|0x0|UINT32|0x00000005
> + gDesignWareTokenSpaceGuid.PcdDwSdDxeBaseAddress|0x0|UINT32|0x00000006
> + gDesignWareTokenSpaceGuid.PcdDwEmmcDxeUHSEn|TRUE|BOOLEAN|0x00000007
> gDesignWareTokenSpaceGuid.PcdDwEmmcDxeCPULittleEndian|FALSE|BOOLEAN|0x00000008
> diff --git a/Silicon/Synopsys/DesignWare/DesignWare.dsc b/Silicon/Synopsys/DesignWare/DesignWare.dsc
> index b5a7b38e142e..7ebec358851e 100755
> --- a/Silicon/Synopsys/DesignWare/DesignWare.dsc
> +++ b/Silicon/Synopsys/DesignWare/DesignWare.dsc
> @@ -43,3 +43,4 @@ [LibraryClasses]
> [Components]
> Silicon/Synopsys/DesignWare/Drivers/DwEmacSnpDxe/DwEmacSnpDxe.inf
> Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf
> + Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwSdmmcDxe.inf
> diff --git a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmc.h b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmc.h
> index 3347418006c7..5d2e6d4055a4 100644
> --- a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmc.h
> +++ b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmc.h
> @@ -18,38 +18,38 @@
> #include <Protocol/EmbeddedGpio.h>
>
> // DW MMC Registers
> -#define DWEMMC_CTRL ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x000)
> -#define DWEMMC_PWREN ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x004)
> -#define DWEMMC_CLKDIV ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x008)
> -#define DWEMMC_CLKSRC ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x00c)
> -#define DWEMMC_CLKENA ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x010)
> -#define DWEMMC_TMOUT ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x014)
> -#define DWEMMC_CTYPE ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x018)
> -#define DWEMMC_BLKSIZ ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x01c)
> -#define DWEMMC_BYTCNT ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x020)
> -#define DWEMMC_INTMASK ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x024)
> -#define DWEMMC_CMDARG ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x028)
> -#define DWEMMC_CMD ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x02c)
> -#define DWEMMC_RESP0 ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x030)
> -#define DWEMMC_RESP1 ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x034)
> -#define DWEMMC_RESP2 ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x038)
> -#define DWEMMC_RESP3 ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x03c)
> -#define DWEMMC_RINTSTS ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x044)
> -#define DWEMMC_STATUS ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x048)
> -#define DWEMMC_FIFOTH ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x04c)
> -#define DWEMMC_TCBCNT ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x05c)
> -#define DWEMMC_TBBCNT ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x060)
> -#define DWEMMC_DEBNCE ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x064)
> -#define DWEMMC_HCON ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x070)
> -#define DWEMMC_UHSREG ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x074)
> -#define DWEMMC_BMOD ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x080)
> -#define DWEMMC_DBADDR ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x088)
> -#define DWEMMC_IDSTS ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x08c)
> -#define DWEMMC_IDINTEN ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x090)
> -#define DWEMMC_DSCADDR ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x094)
> -#define DWEMMC_BUFADDR ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x098)
> -#define DWEMMC_CARDTHRCTL ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0X100)
> -#define DWEMMC_DATA ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0X200)
> +#define DWEMMC_CTRL ((PcdDwDxeBaseAddress) + 0x000)
> +#define DWEMMC_PWREN ((PcdDwDxeBaseAddress) + 0x004)
> +#define DWEMMC_CLKDIV ((PcdDwDxeBaseAddress) + 0x008)
> +#define DWEMMC_CLKSRC ((PcdDwDxeBaseAddress) + 0x00c)
> +#define DWEMMC_CLKENA ((PcdDwDxeBaseAddress) + 0x010)
> +#define DWEMMC_TMOUT ((PcdDwDxeBaseAddress) + 0x014)
> +#define DWEMMC_CTYPE ((PcdDwDxeBaseAddress) + 0x018)
> +#define DWEMMC_BLKSIZ ((PcdDwDxeBaseAddress) + 0x01c)
> +#define DWEMMC_BYTCNT ((PcdDwDxeBaseAddress) + 0x020)
> +#define DWEMMC_INTMASK ((PcdDwDxeBaseAddress) + 0x024)
> +#define DWEMMC_CMDARG ((PcdDwDxeBaseAddress) + 0x028)
> +#define DWEMMC_CMD ((PcdDwDxeBaseAddress) + 0x02c)
> +#define DWEMMC_RESP0 ((PcdDwDxeBaseAddress) + 0x030)
> +#define DWEMMC_RESP1 ((PcdDwDxeBaseAddress) + 0x034)
> +#define DWEMMC_RESP2 ((PcdDwDxeBaseAddress) + 0x038)
> +#define DWEMMC_RESP3 ((PcdDwDxeBaseAddress) + 0x03c)
> +#define DWEMMC_RINTSTS ((PcdDwDxeBaseAddress) + 0x044)
> +#define DWEMMC_STATUS ((PcdDwDxeBaseAddress) + 0x048)
> +#define DWEMMC_FIFOTH ((PcdDwDxeBaseAddress) + 0x04c)
> +#define DWEMMC_TCBCNT ((PcdDwDxeBaseAddress) + 0x05c)
> +#define DWEMMC_TBBCNT ((PcdDwDxeBaseAddress) + 0x060)
> +#define DWEMMC_DEBNCE ((PcdDwDxeBaseAddress) + 0x064)
> +#define DWEMMC_HCON ((PcdDwDxeBaseAddress) + 0x070)
> +#define DWEMMC_UHSREG ((PcdDwDxeBaseAddress) + 0x074)
> +#define DWEMMC_BMOD ((PcdDwDxeBaseAddress) + 0x080)
> +#define DWEMMC_DBADDR ((PcdDwDxeBaseAddress) + 0x088)
> +#define DWEMMC_IDSTS ((PcdDwDxeBaseAddress) + 0x08c)
> +#define DWEMMC_IDINTEN ((PcdDwDxeBaseAddress) + 0x090)
> +#define DWEMMC_DSCADDR ((PcdDwDxeBaseAddress) + 0x094)
> +#define DWEMMC_BUFADDR ((PcdDwDxeBaseAddress) + 0x098)
> +#define DWEMMC_CARDTHRCTL ((PcdDwDxeBaseAddress) + 0X100)
> +#define DWEMMC_DATA ((PcdDwDxeBaseAddress) + 0X200)
>
> #define CMD_UPDATE_CLK 0x80202000
> #define CMD_START_BIT (1 << 31)
> diff --git a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c
> index edda28a45d7c..39e4d994fcd4 100644
> --- a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c
> +++ b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c
> @@ -25,12 +25,18 @@
>
> #include <Protocol/MmcHost.h>
>
> +#ifdef CONFIG_DWEMMC
> +#define PcdDwDxeBaseAddress ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress))
> +#elif CONFIG_DWSDMMC
> +#define PcdDwDxeBaseAddress ((UINT32)PcdGet32 (PcdDwSdDxeBaseAddress))
> +#endif
> #include "DwEmmc.h"
>
> -#define DWEMMC_DESC_PAGE 1
> -#define DWEMMC_BLOCK_SIZE 512
> -#define DWEMMC_DMA_BUF_SIZE (512 * 8)
> -#define DWEMMC_MAX_DESC_PAGES 512
> +#define DWEMMC_DESC_PAGE 1
> +#define DWEMMC_BLOCK_SIZE 512
> +#define DWEMMC_DMA_BUF_SIZE (512 * 8)
> +#define DWEMMC_MAX_DESC_PAGES 512
> +#define DWMCI_SD_READ_MASK(X) ((0xFFFFF0&X) == 0xFFFFF0)
>
> typedef struct {
> UINT32 Des0;
> @@ -44,6 +50,7 @@ DWEMMC_IDMAC_DESCRIPTOR *gpIdmacDesc;
> EFI_GUID mDwEmmcDevicePathGuid = EFI_CALLER_ID_GUID;
> STATIC UINT32 mDwEmmcCommand;
> STATIC UINT32 mDwEmmcArgument;
> +STATIC UINT32 LastExecutedCommand = (UINT32) -1;
>
> EFI_STATUS
> DwEmmcReadBlockData (
> @@ -204,6 +211,7 @@ DwEmmcNotifyState (
> ASSERT (!EFI_ERROR (Status));
> // Wait clock stable
> MicroSecondDelay (100);
> + MmioWrite32 (DWEMMC_CTYPE, 0);
>
> MmioWrite32 (DWEMMC_RINTSTS, ~0);
> MmioWrite32 (DWEMMC_INTMASK, 0);
> @@ -314,68 +322,106 @@ DwEmmcSendCommand (
> UINT32 Cmd = 0;
> EFI_STATUS Status = EFI_SUCCESS;
>
> - switch (MMC_GET_INDX(MmcCmd)) {
> - case MMC_INDX(0):
> - Cmd = BIT_CMD_SEND_INIT;
> - break;
> - case MMC_INDX(1):
> - Cmd = BIT_CMD_RESPONSE_EXPECT;
> - break;
> - case MMC_INDX(2):
> - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_LONG_RESPONSE |
> - BIT_CMD_CHECK_RESPONSE_CRC | BIT_CMD_SEND_INIT;
> - break;
> - case MMC_INDX(3):
> - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC |
> - BIT_CMD_SEND_INIT;
> - break;
> - case MMC_INDX(7):
> - if (Argument)
> + if (LastExecutedCommand == MMC_INDX(55)) {
> + switch (MMC_GET_INDX(MmcCmd)) {
> + case MMC_INDX(1):
> + Cmd = BIT_CMD_RESPONSE_EXPECT;
> + break;
> + // Application command
> + case MMC_INDX(6):
> + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC;
> + break;
> + case MMC_INDX(41):
> + Cmd = BIT_CMD_RESPONSE_EXPECT;
> + break;
> + case MMC_INDX(51):
> + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC |
> + BIT_CMD_DATA_EXPECTED | BIT_CMD_READ |
> + BIT_CMD_WAIT_PRVDATA_COMPLETE;
> + break;
> + default:
> + DEBUG ((DEBUG_ERROR, "%a: Unrecognized App command: %d\n", __func__, MMC_GET_INDX(MmcCmd)));
> + break;
> + }
> + } else {
> + switch (MMC_GET_INDX(MmcCmd)) {
> + case MMC_INDX(0):
> + Cmd = BIT_CMD_SEND_INIT;
> + break;
> + case MMC_INDX(1):
> + Cmd = BIT_CMD_RESPONSE_EXPECT;
> + break;
> + case MMC_INDX(2):
> + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_LONG_RESPONSE |
> + BIT_CMD_CHECK_RESPONSE_CRC | BIT_CMD_SEND_INIT;
> + break;
> + case MMC_INDX(3):
> + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC |
> + BIT_CMD_SEND_INIT;
> + break;
> + case MMC_INDX(7):
> + if (Argument) {
> + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC;
> + } else {
> + Cmd = 0;
> + }
> + break;
> + case MMC_INDX(8):
> + if (Argument) {
> + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC |
> + BIT_CMD_WAIT_PRVDATA_COMPLETE;
> + } else {
> + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC |
> + BIT_CMD_DATA_EXPECTED | BIT_CMD_READ |
> + BIT_CMD_WAIT_PRVDATA_COMPLETE;
> + }
> + break;
> + case MMC_INDX(9):
> + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC |
> + BIT_CMD_LONG_RESPONSE;
> + break;
> + case MMC_INDX(12):
> + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC |
> + BIT_CMD_STOP_ABORT_CMD;
> + break;
> + case MMC_INDX(13):
> + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC |
> + BIT_CMD_WAIT_PRVDATA_COMPLETE;
> + break;
> + case MMC_INDX(16):
> + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC |
> + /* BIT_CMD_DATA_EXPECTED | BIT_CMD_READ | */
> + BIT_CMD_WAIT_PRVDATA_COMPLETE;
> + break;
> + case MMC_INDX(6):
> + if DWMCI_SD_READ_MASK(Argument) {
> + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC |
> + BIT_CMD_DATA_EXPECTED | BIT_CMD_READ |
> + BIT_CMD_WAIT_PRVDATA_COMPLETE;
> + } else {
> Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC;
> - else
> - Cmd = 0;
> - break;
> - case MMC_INDX(8):
> - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC |
> - BIT_CMD_DATA_EXPECTED | BIT_CMD_READ |
> - BIT_CMD_WAIT_PRVDATA_COMPLETE;
> - break;
> - case MMC_INDX(9):
> - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC |
> - BIT_CMD_LONG_RESPONSE;
> - break;
> - case MMC_INDX(12):
> - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC |
> - BIT_CMD_STOP_ABORT_CMD;
> - break;
> - case MMC_INDX(13):
> - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC |
> - BIT_CMD_WAIT_PRVDATA_COMPLETE;
> - break;
> - case MMC_INDX(16):
> - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC |
> - BIT_CMD_DATA_EXPECTED | BIT_CMD_READ |
> - BIT_CMD_WAIT_PRVDATA_COMPLETE;
> - break;
> - case MMC_INDX(17):
> - case MMC_INDX(18):
> - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC |
> - BIT_CMD_DATA_EXPECTED | BIT_CMD_READ |
> - BIT_CMD_WAIT_PRVDATA_COMPLETE;
> - break;
> - case MMC_INDX(24):
> - case MMC_INDX(25):
> - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC |
> - BIT_CMD_DATA_EXPECTED | BIT_CMD_WRITE |
> - BIT_CMD_WAIT_PRVDATA_COMPLETE;
> - break;
> - case MMC_INDX(30):
> - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC |
> - BIT_CMD_DATA_EXPECTED;
> - break;
> - default:
> - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC;
> - break;
> + }
> + break;
> + case MMC_INDX(17):
> + case MMC_INDX(18):
> + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC |
> + BIT_CMD_DATA_EXPECTED | BIT_CMD_READ |
> + BIT_CMD_WAIT_PRVDATA_COMPLETE;
> + break;
> + case MMC_INDX(24):
> + case MMC_INDX(25):
> + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC |
> + BIT_CMD_DATA_EXPECTED | BIT_CMD_WRITE |
> + BIT_CMD_WAIT_PRVDATA_COMPLETE;
> + break;
> + case MMC_INDX(30):
> + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC |
> + BIT_CMD_DATA_EXPECTED;
> + break;
> + default:
> + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC;
> + break;
> + }
> }
>
> Cmd |= MMC_GET_INDX(MmcCmd) | BIT_CMD_USE_HOLD_REG | BIT_CMD_START;
> @@ -385,6 +431,9 @@ DwEmmcSendCommand (
> } else {
> Status = SendCommand (Cmd, Argument);
> }
> +
> + LastExecutedCommand = MMC_GET_INDX(MmcCmd);
> +
> return Status;
> }
>
> @@ -475,7 +524,6 @@ PrepareDmaData (
>
> Cnt = (Length + DWEMMC_DMA_BUF_SIZE - 1) / DWEMMC_DMA_BUF_SIZE;
> Blks = (Length + DWEMMC_BLOCK_SIZE - 1) / DWEMMC_BLOCK_SIZE;
> - Length = DWEMMC_BLOCK_SIZE * Blks;
>
> for (Idx = 0; Idx < Cnt; Idx++) {
> (IdmacDesc + Idx)->Des0 = DWEMMC_IDMAC_DES0_OWN | DWEMMC_IDMAC_DES0_CH |
> @@ -660,6 +708,9 @@ DwEmmcSetIos (
> switch (TimingMode) {
> case EMMCHS52DDR1V2:
> case EMMCHS52DDR1V8:
> + if (!FixedPcdGetBool (PcdDwEmmcDxeUHSEn)) {
> + return EFI_UNSUPPORTED;
> + }
> Data |= 1 << 16;
> break;
> case EMMCHS52:
> diff --git a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf
> index 0bd78d5a05ad..4e8dd7bcd7dc 100644
> --- a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf
> +++ b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf
> @@ -51,6 +51,7 @@ [Pcd]
> gDesignWareTokenSpaceGuid.PcdDwEmmcDxeFifoDepth
> gDesignWareTokenSpaceGuid.PcdDwPermitObsoleteDrivers
> gDesignWareTokenSpaceGuid.PcdDwEmmcDxeCPULittleEndian
> + gDesignWareTokenSpaceGuid.PcdDwEmmcDxeUHSEn
>
> [Depex]
> TRUE
> diff --git a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwSdmmcDxe.inf
> similarity index 77%
> copy from Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf
> copy to Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwSdmmcDxe.inf
> index 0bd78d5a05ad..efbf3bff56bd 100644
> --- a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf
> +++ b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwSdmmcDxe.inf
> @@ -1,5 +1,5 @@
> #/** @file
> -# INF file for the eMMC Host Protocol implementation for the DesignWare MMC.
> +# INF file for the SdMMC Host Protocol implementation for the DesignWare MMC.
> #
> # WARNING:
> # This driver fails to follow the UEFI driver model without a good
> @@ -14,8 +14,8 @@
>
> [Defines]
> INF_VERSION = 0x00010019
> - BASE_NAME = DwEmmcDxe
> - FILE_GUID = b549f005-4bd4-4020-a0cb-06f42bda68c3
> + BASE_NAME = DwSdmmcDxe
> + FILE_GUID = b549f005-4bd4-4020-a0cb-06f5478a68c3
> MODULE_TYPE = DXE_DRIVER
> VERSION_STRING = 1.0
>
> @@ -45,11 +45,12 @@ [Protocols]
> gEmbeddedMmcHostProtocolGuid
>
> [Pcd]
> - gDesignWareTokenSpaceGuid.PcdDwEmmcDxeBaseAddress
> + gDesignWareTokenSpaceGuid.PcdDwSdDxeBaseAddress
> gDesignWareTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz
> gDesignWareTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz
> gDesignWareTokenSpaceGuid.PcdDwEmmcDxeFifoDepth
> gDesignWareTokenSpaceGuid.PcdDwPermitObsoleteDrivers
> + gDesignWareTokenSpaceGuid.PcdDwEmmcDxeUHSEn
> gDesignWareTokenSpaceGuid.PcdDwEmmcDxeCPULittleEndian
>
> [Depex]
> --
> 2.34.1
>
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next prev parent reply other threads:[~2023-11-22 15:47 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-03 2:51 [edk2-devel] [PATCH v3 0/5] Designware MMCDXE changes and enhancement John Chew
2023-11-03 2:51 ` [edk2-devel] [PATCH v3 1/5] DesignWare/DwEmmcDxe: Enabled Internal IDMAC interrupt RX/TX register John Chew
2023-11-22 15:41 ` Ard Biesheuvel
2023-11-27 7:10 ` John Chew
2023-11-03 2:51 ` [edk2-devel] [PATCH v3 2/5] DesignWare/DwEmmcDxe: Add CPU little endian option John Chew
2023-11-22 15:45 ` Ard Biesheuvel
2023-11-27 7:09 ` John Chew
2023-11-03 2:51 ` [edk2-devel] [PATCH v3 3/5] DesignWare/DwEmmcDxe: Remove ARM dependency library John Chew
2023-11-22 15:46 ` Ard Biesheuvel
2023-11-03 2:51 ` [edk2-devel] [PATCH v3 4/5] DesignWare/DwEmmcDxe: Add handling for SDMMC John Chew
2023-11-22 15:47 ` Ard Biesheuvel [this message]
2023-11-03 2:51 ` [edk2-devel] [PATCH v3 5/5] DesignWare/DwEmmcDxe: Force DMA buffer to allocate below 4GB John Chew
2023-11-22 15:49 ` Ard Biesheuvel
2023-11-07 1:09 ` [edk2-devel] [PATCH v3 0/5] Designware MMCDXE changes and enhancement John Chew
2023-11-22 4:06 ` John Chew
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