From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 2DC14AC138F for ; Wed, 22 Nov 2023 15:47:31 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=uqEGxjg6YzgJURfvS28XAgCIL0KjLElePGFRwcAT6lg=; c=relaxed/simple; d=groups.io; h=MIME-Version:References:In-Reply-To:From:Date:Message-ID:Subject:To:Cc:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type; s=20140610; t=1700668050; v=1; b=PzihSYHH4a/LpIWe9U1d04d0EZtl0n4zNR7HeY/sWSeIiaL3NKZiIXc8GcioQceuk+tuymN9 eoIqfbkrg+ewkT5GOGBblA/0ttOQSwAEhkAk31RTGopWweQDbmuUOSUDPJmeKRYFogmli/xljAd sGByHpgDRmB4fWCxdOYAtT2s= X-Received: by 127.0.0.2 with SMTP id hJZIYY7687511x3z0ERw17Ui; Wed, 22 Nov 2023 07:47:30 -0800 X-Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by mx.groups.io with SMTP id smtpd.web11.22856.1700668050110147461 for ; Wed, 22 Nov 2023 07:47:30 -0800 X-Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 63AB361E36 for ; Wed, 22 Nov 2023 15:47:29 +0000 (UTC) X-Received: by smtp.kernel.org (Postfix) with ESMTPSA id E57CDC433C7 for ; Wed, 22 Nov 2023 15:47:28 +0000 (UTC) X-Received: by mail-lj1-f181.google.com with SMTP id 38308e7fff4ca-2c6b30aca06so85738631fa.3 for ; Wed, 22 Nov 2023 07:47:28 -0800 (PST) X-Gm-Message-State: gcbcVvHTb9SzOvqBmtjmCbUWx7686176AA= X-Google-Smtp-Source: AGHT+IHJ7e0b6Cv0gYBDMVbgOw5ZJYS3vXmiQaThQIwsKR0jn/vyEp9u9tvSNA86ocD4HhLA4CM41+7ozYobfcQp3NU= X-Received: by 2002:a2e:a69f:0:b0:2c8:8b23:7ec8 with SMTP id q31-20020a2ea69f000000b002c88b237ec8mr1591866lje.16.1700668047112; Wed, 22 Nov 2023 07:47:27 -0800 (PST) MIME-Version: 1.0 References: <20231103025131.1643-1-yuinyee.chew@starfivetech.com> <20231103025131.1643-5-yuinyee.chew@starfivetech.com> In-Reply-To: <20231103025131.1643-5-yuinyee.chew@starfivetech.com> From: "Ard Biesheuvel" Date: Wed, 22 Nov 2023 16:47:16 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [edk2-devel] [PATCH v3 4/5] DesignWare/DwEmmcDxe: Add handling for SDMMC To: John Chew Cc: devel@edk2.groups.io, mindachen1987 , Sunil V L , Leif Lindholm , Michael D Kinney , Li Yong Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ardb@kernel.org List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: Content-Type: text/plain; charset="UTF-8" X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=PzihSYHH; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=kernel.org (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io On Fri, 3 Nov 2023 at 03:53, John Chew wrote: > > From: mindachen1987 > > Add base address PCD for eMMC and SDMMC > Add application command for SDMMC > Add PCD for Ultra High Speed (UHS) option > Why is this a single patch? If your commit log contains an enumeration of the changes, it is usually a strong hint that you need to split up the patch. > Cc: Sunil V L > Cc: Leif Lindholm > Cc: Ard Biesheuvel > Cc: Michael D Kinney > Cc: Li Yong > Co-authored-by: John Chew > Signed-off-by: mindachen1987 > --- > Silicon/Synopsys/DesignWare/DesignWare.dec | 2 + > Silicon/Synopsys/DesignWare/DesignWare.dsc | 1 + > Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmc.h | 64 +++---- > Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c | 183 +++++++++++++------- > Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf | 1 + > Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/{DwEmmcDxe.inf => DwSdmmcDxe.inf} | 9 +- > 6 files changed, 158 insertions(+), 102 deletions(-) > > diff --git a/Silicon/Synopsys/DesignWare/DesignWare.dec b/Silicon/Synopsys/DesignWare/DesignWare.dec > index 751370a8b1af..91aca7568b08 100755 > --- a/Silicon/Synopsys/DesignWare/DesignWare.dec > +++ b/Silicon/Synopsys/DesignWare/DesignWare.dec > @@ -31,4 +31,6 @@ [PcdsFixedAtBuild.common] > gDesignWareTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz|0x0|UINT32|0x00000003 > gDesignWareTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz|0x0|UINT32|0x00000004 > gDesignWareTokenSpaceGuid.PcdDwEmmcDxeFifoDepth|0x0|UINT32|0x00000005 > + gDesignWareTokenSpaceGuid.PcdDwSdDxeBaseAddress|0x0|UINT32|0x00000006 > + gDesignWareTokenSpaceGuid.PcdDwEmmcDxeUHSEn|TRUE|BOOLEAN|0x00000007 > gDesignWareTokenSpaceGuid.PcdDwEmmcDxeCPULittleEndian|FALSE|BOOLEAN|0x00000008 > diff --git a/Silicon/Synopsys/DesignWare/DesignWare.dsc b/Silicon/Synopsys/DesignWare/DesignWare.dsc > index b5a7b38e142e..7ebec358851e 100755 > --- a/Silicon/Synopsys/DesignWare/DesignWare.dsc > +++ b/Silicon/Synopsys/DesignWare/DesignWare.dsc > @@ -43,3 +43,4 @@ [LibraryClasses] > [Components] > Silicon/Synopsys/DesignWare/Drivers/DwEmacSnpDxe/DwEmacSnpDxe.inf > Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf > + Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwSdmmcDxe.inf > diff --git a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmc.h b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmc.h > index 3347418006c7..5d2e6d4055a4 100644 > --- a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmc.h > +++ b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmc.h > @@ -18,38 +18,38 @@ > #include > > // DW MMC Registers > -#define DWEMMC_CTRL ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x000) > -#define DWEMMC_PWREN ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x004) > -#define DWEMMC_CLKDIV ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x008) > -#define DWEMMC_CLKSRC ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x00c) > -#define DWEMMC_CLKENA ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x010) > -#define DWEMMC_TMOUT ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x014) > -#define DWEMMC_CTYPE ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x018) > -#define DWEMMC_BLKSIZ ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x01c) > -#define DWEMMC_BYTCNT ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x020) > -#define DWEMMC_INTMASK ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x024) > -#define DWEMMC_CMDARG ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x028) > -#define DWEMMC_CMD ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x02c) > -#define DWEMMC_RESP0 ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x030) > -#define DWEMMC_RESP1 ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x034) > -#define DWEMMC_RESP2 ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x038) > -#define DWEMMC_RESP3 ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x03c) > -#define DWEMMC_RINTSTS ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x044) > -#define DWEMMC_STATUS ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x048) > -#define DWEMMC_FIFOTH ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x04c) > -#define DWEMMC_TCBCNT ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x05c) > -#define DWEMMC_TBBCNT ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x060) > -#define DWEMMC_DEBNCE ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x064) > -#define DWEMMC_HCON ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x070) > -#define DWEMMC_UHSREG ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x074) > -#define DWEMMC_BMOD ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x080) > -#define DWEMMC_DBADDR ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x088) > -#define DWEMMC_IDSTS ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x08c) > -#define DWEMMC_IDINTEN ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x090) > -#define DWEMMC_DSCADDR ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x094) > -#define DWEMMC_BUFADDR ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x098) > -#define DWEMMC_CARDTHRCTL ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0X100) > -#define DWEMMC_DATA ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0X200) > +#define DWEMMC_CTRL ((PcdDwDxeBaseAddress) + 0x000) > +#define DWEMMC_PWREN ((PcdDwDxeBaseAddress) + 0x004) > +#define DWEMMC_CLKDIV ((PcdDwDxeBaseAddress) + 0x008) > +#define DWEMMC_CLKSRC ((PcdDwDxeBaseAddress) + 0x00c) > +#define DWEMMC_CLKENA ((PcdDwDxeBaseAddress) + 0x010) > +#define DWEMMC_TMOUT ((PcdDwDxeBaseAddress) + 0x014) > +#define DWEMMC_CTYPE ((PcdDwDxeBaseAddress) + 0x018) > +#define DWEMMC_BLKSIZ ((PcdDwDxeBaseAddress) + 0x01c) > +#define DWEMMC_BYTCNT ((PcdDwDxeBaseAddress) + 0x020) > +#define DWEMMC_INTMASK ((PcdDwDxeBaseAddress) + 0x024) > +#define DWEMMC_CMDARG ((PcdDwDxeBaseAddress) + 0x028) > +#define DWEMMC_CMD ((PcdDwDxeBaseAddress) + 0x02c) > +#define DWEMMC_RESP0 ((PcdDwDxeBaseAddress) + 0x030) > +#define DWEMMC_RESP1 ((PcdDwDxeBaseAddress) + 0x034) > +#define DWEMMC_RESP2 ((PcdDwDxeBaseAddress) + 0x038) > +#define DWEMMC_RESP3 ((PcdDwDxeBaseAddress) + 0x03c) > +#define DWEMMC_RINTSTS ((PcdDwDxeBaseAddress) + 0x044) > +#define DWEMMC_STATUS ((PcdDwDxeBaseAddress) + 0x048) > +#define DWEMMC_FIFOTH ((PcdDwDxeBaseAddress) + 0x04c) > +#define DWEMMC_TCBCNT ((PcdDwDxeBaseAddress) + 0x05c) > +#define DWEMMC_TBBCNT ((PcdDwDxeBaseAddress) + 0x060) > +#define DWEMMC_DEBNCE ((PcdDwDxeBaseAddress) + 0x064) > +#define DWEMMC_HCON ((PcdDwDxeBaseAddress) + 0x070) > +#define DWEMMC_UHSREG ((PcdDwDxeBaseAddress) + 0x074) > +#define DWEMMC_BMOD ((PcdDwDxeBaseAddress) + 0x080) > +#define DWEMMC_DBADDR ((PcdDwDxeBaseAddress) + 0x088) > +#define DWEMMC_IDSTS ((PcdDwDxeBaseAddress) + 0x08c) > +#define DWEMMC_IDINTEN ((PcdDwDxeBaseAddress) + 0x090) > +#define DWEMMC_DSCADDR ((PcdDwDxeBaseAddress) + 0x094) > +#define DWEMMC_BUFADDR ((PcdDwDxeBaseAddress) + 0x098) > +#define DWEMMC_CARDTHRCTL ((PcdDwDxeBaseAddress) + 0X100) > +#define DWEMMC_DATA ((PcdDwDxeBaseAddress) + 0X200) > > #define CMD_UPDATE_CLK 0x80202000 > #define CMD_START_BIT (1 << 31) > diff --git a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c > index edda28a45d7c..39e4d994fcd4 100644 > --- a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c > +++ b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c > @@ -25,12 +25,18 @@ > > #include > > +#ifdef CONFIG_DWEMMC > +#define PcdDwDxeBaseAddress ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress)) > +#elif CONFIG_DWSDMMC > +#define PcdDwDxeBaseAddress ((UINT32)PcdGet32 (PcdDwSdDxeBaseAddress)) > +#endif > #include "DwEmmc.h" > > -#define DWEMMC_DESC_PAGE 1 > -#define DWEMMC_BLOCK_SIZE 512 > -#define DWEMMC_DMA_BUF_SIZE (512 * 8) > -#define DWEMMC_MAX_DESC_PAGES 512 > +#define DWEMMC_DESC_PAGE 1 > +#define DWEMMC_BLOCK_SIZE 512 > +#define DWEMMC_DMA_BUF_SIZE (512 * 8) > +#define DWEMMC_MAX_DESC_PAGES 512 > +#define DWMCI_SD_READ_MASK(X) ((0xFFFFF0&X) == 0xFFFFF0) > > typedef struct { > UINT32 Des0; > @@ -44,6 +50,7 @@ DWEMMC_IDMAC_DESCRIPTOR *gpIdmacDesc; > EFI_GUID mDwEmmcDevicePathGuid = EFI_CALLER_ID_GUID; > STATIC UINT32 mDwEmmcCommand; > STATIC UINT32 mDwEmmcArgument; > +STATIC UINT32 LastExecutedCommand = (UINT32) -1; > > EFI_STATUS > DwEmmcReadBlockData ( > @@ -204,6 +211,7 @@ DwEmmcNotifyState ( > ASSERT (!EFI_ERROR (Status)); > // Wait clock stable > MicroSecondDelay (100); > + MmioWrite32 (DWEMMC_CTYPE, 0); > > MmioWrite32 (DWEMMC_RINTSTS, ~0); > MmioWrite32 (DWEMMC_INTMASK, 0); > @@ -314,68 +322,106 @@ DwEmmcSendCommand ( > UINT32 Cmd = 0; > EFI_STATUS Status = EFI_SUCCESS; > > - switch (MMC_GET_INDX(MmcCmd)) { > - case MMC_INDX(0): > - Cmd = BIT_CMD_SEND_INIT; > - break; > - case MMC_INDX(1): > - Cmd = BIT_CMD_RESPONSE_EXPECT; > - break; > - case MMC_INDX(2): > - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_LONG_RESPONSE | > - BIT_CMD_CHECK_RESPONSE_CRC | BIT_CMD_SEND_INIT; > - break; > - case MMC_INDX(3): > - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | > - BIT_CMD_SEND_INIT; > - break; > - case MMC_INDX(7): > - if (Argument) > + if (LastExecutedCommand == MMC_INDX(55)) { > + switch (MMC_GET_INDX(MmcCmd)) { > + case MMC_INDX(1): > + Cmd = BIT_CMD_RESPONSE_EXPECT; > + break; > + // Application command > + case MMC_INDX(6): > + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC; > + break; > + case MMC_INDX(41): > + Cmd = BIT_CMD_RESPONSE_EXPECT; > + break; > + case MMC_INDX(51): > + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | > + BIT_CMD_DATA_EXPECTED | BIT_CMD_READ | > + BIT_CMD_WAIT_PRVDATA_COMPLETE; > + break; > + default: > + DEBUG ((DEBUG_ERROR, "%a: Unrecognized App command: %d\n", __func__, MMC_GET_INDX(MmcCmd))); > + break; > + } > + } else { > + switch (MMC_GET_INDX(MmcCmd)) { > + case MMC_INDX(0): > + Cmd = BIT_CMD_SEND_INIT; > + break; > + case MMC_INDX(1): > + Cmd = BIT_CMD_RESPONSE_EXPECT; > + break; > + case MMC_INDX(2): > + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_LONG_RESPONSE | > + BIT_CMD_CHECK_RESPONSE_CRC | BIT_CMD_SEND_INIT; > + break; > + case MMC_INDX(3): > + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | > + BIT_CMD_SEND_INIT; > + break; > + case MMC_INDX(7): > + if (Argument) { > + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC; > + } else { > + Cmd = 0; > + } > + break; > + case MMC_INDX(8): > + if (Argument) { > + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | > + BIT_CMD_WAIT_PRVDATA_COMPLETE; > + } else { > + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | > + BIT_CMD_DATA_EXPECTED | BIT_CMD_READ | > + BIT_CMD_WAIT_PRVDATA_COMPLETE; > + } > + break; > + case MMC_INDX(9): > + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | > + BIT_CMD_LONG_RESPONSE; > + break; > + case MMC_INDX(12): > + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | > + BIT_CMD_STOP_ABORT_CMD; > + break; > + case MMC_INDX(13): > + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | > + BIT_CMD_WAIT_PRVDATA_COMPLETE; > + break; > + case MMC_INDX(16): > + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | > + /* BIT_CMD_DATA_EXPECTED | BIT_CMD_READ | */ > + BIT_CMD_WAIT_PRVDATA_COMPLETE; > + break; > + case MMC_INDX(6): > + if DWMCI_SD_READ_MASK(Argument) { > + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | > + BIT_CMD_DATA_EXPECTED | BIT_CMD_READ | > + BIT_CMD_WAIT_PRVDATA_COMPLETE; > + } else { > Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC; > - else > - Cmd = 0; > - break; > - case MMC_INDX(8): > - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | > - BIT_CMD_DATA_EXPECTED | BIT_CMD_READ | > - BIT_CMD_WAIT_PRVDATA_COMPLETE; > - break; > - case MMC_INDX(9): > - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | > - BIT_CMD_LONG_RESPONSE; > - break; > - case MMC_INDX(12): > - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | > - BIT_CMD_STOP_ABORT_CMD; > - break; > - case MMC_INDX(13): > - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | > - BIT_CMD_WAIT_PRVDATA_COMPLETE; > - break; > - case MMC_INDX(16): > - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | > - BIT_CMD_DATA_EXPECTED | BIT_CMD_READ | > - BIT_CMD_WAIT_PRVDATA_COMPLETE; > - break; > - case MMC_INDX(17): > - case MMC_INDX(18): > - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | > - BIT_CMD_DATA_EXPECTED | BIT_CMD_READ | > - BIT_CMD_WAIT_PRVDATA_COMPLETE; > - break; > - case MMC_INDX(24): > - case MMC_INDX(25): > - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | > - BIT_CMD_DATA_EXPECTED | BIT_CMD_WRITE | > - BIT_CMD_WAIT_PRVDATA_COMPLETE; > - break; > - case MMC_INDX(30): > - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | > - BIT_CMD_DATA_EXPECTED; > - break; > - default: > - Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC; > - break; > + } > + break; > + case MMC_INDX(17): > + case MMC_INDX(18): > + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | > + BIT_CMD_DATA_EXPECTED | BIT_CMD_READ | > + BIT_CMD_WAIT_PRVDATA_COMPLETE; > + break; > + case MMC_INDX(24): > + case MMC_INDX(25): > + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | > + BIT_CMD_DATA_EXPECTED | BIT_CMD_WRITE | > + BIT_CMD_WAIT_PRVDATA_COMPLETE; > + break; > + case MMC_INDX(30): > + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | > + BIT_CMD_DATA_EXPECTED; > + break; > + default: > + Cmd = BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC; > + break; > + } > } > > Cmd |= MMC_GET_INDX(MmcCmd) | BIT_CMD_USE_HOLD_REG | BIT_CMD_START; > @@ -385,6 +431,9 @@ DwEmmcSendCommand ( > } else { > Status = SendCommand (Cmd, Argument); > } > + > + LastExecutedCommand = MMC_GET_INDX(MmcCmd); > + > return Status; > } > > @@ -475,7 +524,6 @@ PrepareDmaData ( > > Cnt = (Length + DWEMMC_DMA_BUF_SIZE - 1) / DWEMMC_DMA_BUF_SIZE; > Blks = (Length + DWEMMC_BLOCK_SIZE - 1) / DWEMMC_BLOCK_SIZE; > - Length = DWEMMC_BLOCK_SIZE * Blks; > > for (Idx = 0; Idx < Cnt; Idx++) { > (IdmacDesc + Idx)->Des0 = DWEMMC_IDMAC_DES0_OWN | DWEMMC_IDMAC_DES0_CH | > @@ -660,6 +708,9 @@ DwEmmcSetIos ( > switch (TimingMode) { > case EMMCHS52DDR1V2: > case EMMCHS52DDR1V8: > + if (!FixedPcdGetBool (PcdDwEmmcDxeUHSEn)) { > + return EFI_UNSUPPORTED; > + } > Data |= 1 << 16; > break; > case EMMCHS52: > diff --git a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf > index 0bd78d5a05ad..4e8dd7bcd7dc 100644 > --- a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf > +++ b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf > @@ -51,6 +51,7 @@ [Pcd] > gDesignWareTokenSpaceGuid.PcdDwEmmcDxeFifoDepth > gDesignWareTokenSpaceGuid.PcdDwPermitObsoleteDrivers > gDesignWareTokenSpaceGuid.PcdDwEmmcDxeCPULittleEndian > + gDesignWareTokenSpaceGuid.PcdDwEmmcDxeUHSEn > > [Depex] > TRUE > diff --git a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwSdmmcDxe.inf > similarity index 77% > copy from Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf > copy to Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwSdmmcDxe.inf > index 0bd78d5a05ad..efbf3bff56bd 100644 > --- a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf > +++ b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwSdmmcDxe.inf > @@ -1,5 +1,5 @@ > #/** @file > -# INF file for the eMMC Host Protocol implementation for the DesignWare MMC. > +# INF file for the SdMMC Host Protocol implementation for the DesignWare MMC. > # > # WARNING: > # This driver fails to follow the UEFI driver model without a good > @@ -14,8 +14,8 @@ > > [Defines] > INF_VERSION = 0x00010019 > - BASE_NAME = DwEmmcDxe > - FILE_GUID = b549f005-4bd4-4020-a0cb-06f42bda68c3 > + BASE_NAME = DwSdmmcDxe > + FILE_GUID = b549f005-4bd4-4020-a0cb-06f5478a68c3 > MODULE_TYPE = DXE_DRIVER > VERSION_STRING = 1.0 > > @@ -45,11 +45,12 @@ [Protocols] > gEmbeddedMmcHostProtocolGuid > > [Pcd] > - gDesignWareTokenSpaceGuid.PcdDwEmmcDxeBaseAddress > + gDesignWareTokenSpaceGuid.PcdDwSdDxeBaseAddress > gDesignWareTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz > gDesignWareTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz > gDesignWareTokenSpaceGuid.PcdDwEmmcDxeFifoDepth > gDesignWareTokenSpaceGuid.PcdDwPermitObsoleteDrivers > + gDesignWareTokenSpaceGuid.PcdDwEmmcDxeUHSEn > gDesignWareTokenSpaceGuid.PcdDwEmmcDxeCPULittleEndian > > [Depex] > -- > 2.34.1 > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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