From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by mx.groups.io with SMTP id smtpd.web11.473.1672940368827709542 for ; Thu, 05 Jan 2023 09:39:29 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=eIXu6W2L; spf=pass (domain: kernel.org, ip: 145.40.68.75, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 4AA20B81B82 for ; Thu, 5 Jan 2023 17:39:26 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6B626C43398 for ; Thu, 5 Jan 2023 17:39:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1672940364; bh=wVNSDTpGPBkVVHt3sptM1XFtNAtejgx3XHCLB5bY/os=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=eIXu6W2Lx7HKY3z07Z51nSmEky/+ZVR73/vY1A7IOfLCOM0OY4es47eY+JS+M559V 9s4aNpOKtoCvyNkBgSRPicrnzYQQuvgV9YySpWTJowINVZTzEKw/SC+U3MR+8fqPd5 Abbwud+qgOMIPlxEP36VuHq2IYJGIGxVWNgRAwyJgX5ekvpft62qiD13h+MUV76Eg2 8W8/8O8sipcYnXmhggeF0U+j/VOmY4WAgudkVuJf7/h/ZknxcMLvnkX+rjBB1Yj3yy bi5TUI3FVkwHbJ40s0fRnNVTFPj6nxq81BZldzOvrOqKERKmzbQHa3Fxao08HkIWnE 6d9gY7/giwraA== Received: by mail-lj1-f178.google.com with SMTP id g14so39339915ljh.10 for ; Thu, 05 Jan 2023 09:39:24 -0800 (PST) X-Gm-Message-State: AFqh2koXNOWABX7nbw5c3WxO8eKCkctNK7iQCq3djY+lLevMLA0GtyOJ ZEOU9i4uTjFUB6k0tkb7EAAZ0nHgDbEBLJVBRpk= X-Google-Smtp-Source: AMrXdXusYCj6abazAL+FeYVMYPGVOlr8QvUeJSLGW4PFyNYCjAzJz9W7Wktz3XwEF7u9y3CUInP0yhCCt3gjfc+xarw= X-Received: by 2002:a2e:a901:0:b0:27f:ef88:3ecb with SMTP id j1-20020a2ea901000000b0027fef883ecbmr688523ljq.189.1672940362390; Thu, 05 Jan 2023 09:39:22 -0800 (PST) MIME-Version: 1.0 References: <20230104153727.345236-1-rebecca@quicinc.com> In-Reply-To: <20230104153727.345236-1-rebecca@quicinc.com> From: "Ard Biesheuvel" Date: Thu, 5 Jan 2023 18:39:11 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v4 0/3] ArmPkg,MdeModulePkg: Implement EFI_MP_SERVICES_PROTOCOL for AArch64 and add an MpServicesTest application to exercise it To: Rebecca Cran Cc: devel@edk2.groups.io, Sami Mujawar , Ard Biesheuvel , Leif Lindholm , Jian J Wang , Liming Gao , Tiger Liu Content-Type: text/plain; charset="UTF-8" On Wed, 4 Jan 2023 at 16:37, Rebecca Cran wrote: > > Implement EFI_MP_SERVICES_PROTOCOL based on PSCI calls for AArch64, and > add an MpServicesTest application to exercise it. > > Changes from v3: > > Removed Ard's 'Reviewed-by' line from the commits since the code has changed > sufficiently that it's no longer valid. > > Rebecca Cran (3): > ArmPkg: Add GET_MPIDR_AFFINITY_BITS and MPIDR_MT_BIT to ArmLib.h > ArmPkg: implement EFI_MP_SERVICES_PROTOCOL based on PSCI calls > MdeModulePkg: Add new Application/MpServicesTest application > > ArmPkg/ArmPkg.dsc | 1 + > MdeModulePkg/MdeModulePkg.dsc | 2 + > ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf | 56 + > MdeModulePkg/Application/MpServicesTest/MpServicesTest.inf | 40 + > ArmPkg/Drivers/ArmPsciMpServicesDxe/MpServicesInternal.h | 344 ++++ > ArmPkg/Include/Library/ArmLib.h | 16 +- > MdeModulePkg/Application/MpServicesTest/Options.h | 39 + > ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.c | 1847 ++++++++++++++++++++ > MdeModulePkg/Application/MpServicesTest/MpServicesTest.c | 560 ++++++ > MdeModulePkg/Application/MpServicesTest/Options.c | 164 ++ > ArmPkg/Drivers/ArmPsciMpServicesDxe/MpFuncs.S | 57 + > 11 files changed, 3119 insertions(+), 7 deletions(-) Hello Rebecca, Thanks for reposting this. Running the secondaries with MMU and caches on is a huge improvement. I would suggest, though, that we enable the MMU first thing out of reset, and do so from asm code so we don't have to reason about the stack (pushing something with the MMU off and popping it with the MMU on requires cache maintenance as well, and there is no way this can be done from the code itself without help from the compiler) So I propose adding the diff below - note that only the variables holding TCR, MAIR and TTBR0 need cache maintenance now (in addition to the executable image) - everything else will be accessed by the secondaries with the MMU enabled. https://paste.debian.net/1266242/ WIth a tweak to the RPI4 platform that I sent out separately, this all works fine for me (both with and without the diff above applied) -- Ard.