From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by mx.groups.io with SMTP id smtpd.web11.22917.1680176840052182741 for ; Thu, 30 Mar 2023 04:47:20 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=o3HclECu; spf=pass (domain: kernel.org, ip: 145.40.68.75, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 0BF2CB8280C for ; Thu, 30 Mar 2023 11:47:18 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B791DC433D2 for ; Thu, 30 Mar 2023 11:47:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1680176836; bh=sVqqUKPm/t+hbOdYNq6WFmPLe5YOJ91ca/iV50/ODjo=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=o3HclECuJyFIyleXtZxvAgYhhhiQU1tIeNJkkhsh/Gah0Ah5gRoWVQnDU01qUck8o evfmrkzTqEgxqqWksKRnnWO7/InYwiU39jCY9KhxISc4bNo34fo0kxsTGS7B/lvL6e afJjgzga5cyvOpYr+SbmaOS4JTkfDom54M+9HmvZz3MAAH0nevGpucuDFGCv+pk8DF 7PNV44Sz3aq65FY4NDeE5TaZdd2LsG+YG4hJ02zPvueiX+c6zA4Sw6TfkGzOCY7glu I/3vFy6mUClxow06CYnBeaO5KpnTg/EX8c3JYzHjtKvnhO00ros5/R4e8xeyKq/xpD 4otwWPDRfBWSA== Received: by mail-lj1-f177.google.com with SMTP id e9so4008806ljq.4 for ; Thu, 30 Mar 2023 04:47:16 -0700 (PDT) X-Gm-Message-State: AAQBX9eLVYppZraCQV8eVNPUoKDCT7f7ylyG97Dth03A3ltAgJg4YWBT h9zgZuuB+qQWw/aVQAWcf25YvR97flWf1u7L4EY= X-Google-Smtp-Source: AKy350ZZ53htGlqmuX2owPhWbC3WL3FQNETTWFaDVYAQeTkSS9SvPyaYKhGoqgL3rYvLLL34IAI3f4IfPdSV/CNcj+M= X-Received: by 2002:a2e:9d4d:0:b0:298:b375:acfc with SMTP id y13-20020a2e9d4d000000b00298b375acfcmr7069743ljj.2.1680176834669; Thu, 30 Mar 2023 04:47:14 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: "Ard Biesheuvel" Date: Thu, 30 Mar 2023 13:47:03 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [edk2-devel] Is Xcode5ExceptionHandlerAsm.nasm still needed? To: devel@edk2.groups.io, ray.ni@intel.com, Rebecca Cran Cc: Andrew Fish , "Kinney, Michael D" , "Liu, Zhiguang" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable (cc Rebecca) On Thu, 30 Mar 2023 at 12:48, Ard Biesheuvel wrote: > > On Thu, 30 Mar 2023 at 12:16, Ni, Ray wrote: > > > > Andrew, > > > > In UefiCpuPkg\Library\CpuExceptionHandlerLib\X64\, there are two nasm f= iles: ExceptionHandlerAsm.nasm and the other XCODE version. > > > > > > > > The major diff between the two is the second operand in =E2=80=9Cmov ra= x, ASM_PFX(CommonInterruptEntry)=E2=80=9D is patched at runtime by code, in= stead of relying on linker/loader to fix it. > > > > Can I know more background why it=E2=80=99s needed for XCODE? > > > > > > > > Given Apple is switching away from X86 CPU, is the XCODE version still = needed? > > > > > > > > + Mike because I found another commit by you for bug: 565 =E2=80=93 Fix= X64 XCODE5/NASM compatibility issue in UefiCpuPkg MpInitLib (tianocore.org= ). > > > > > > > Yes, we still need it, also for non-Xcode clang + lld > > The problem is that the little code templates use absolute addressing > to refer to the jump targets. This is necessary because these > templates are copied into the vector table, and so they are moved > independently from the code they refer to, and so relative addressing > is not an option here. > > One thing I haven't tried yet is to emit the template code into .data > instead of .text, which /should/ be fine given that the template code > is never executed directly, only the copied versions are executed. I had a quick go at this, and the change below appears to work: it moves the template code into .data, and changes the absolute references to relative ones in the code that executes from where it gets loaded. I'm not sure how to test this, though. --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nas= m +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nas= m @@ -27,7 +27,6 @@ extern ASM_PFX(CommonExceptionHandler) SECTION .data DEFAULT REL -SECTION .text ALIGN 8 @@ -51,6 +50,9 @@ HookAfterStubHeaderBegin: push rax mov rax, HookAfterStubHeaderEnd jmp rax + +SECTION .text + HookAfterStubHeaderEnd: mov rax, rsp and sp, 0xfff0 ; make sure 16-byte aligned for exception context @@ -276,8 +278,7 @@ DrFinish: ; and make sure RSP is 16-byte aligned ; sub rsp, 4 * 8 + 8 - mov rax, ASM_PFX(CommonExceptionHandler) - call rax + call ASM_PFX(CommonExceptionHandler) add rsp, 4 * 8 + 8 cli @@ -384,10 +385,10 @@ DoIret: ; comments here for definition of address map global ASM_PFX(AsmGetTemplateAddressMap) ASM_PFX(AsmGetTemplateAddressMap): - mov rax, AsmIdtVectorBegin + lea rax, AsmIdtVectorBegin mov qword [rcx], rax mov qword [rcx + 0x8], (AsmIdtVectorEnd - AsmIdtVectorBegin) / 32 - mov rax, HookAfterStubHeaderBegin + lea rax, HookAfterStubHeaderBegin mov qword [rcx + 0x10], rax ret